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1/*2 * o2micro.h 1.13 1999/10/25 20:03:343 *4 * The contents of this file are subject to the Mozilla Public License5 * Version 1.1 (the "License"); you may not use this file except in6 * compliance with the License. You may obtain a copy of the License7 * at http://www.mozilla.org/MPL/8 *9 * Software distributed under the License is distributed on an "AS IS"10 * basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See11 * the License for the specific language governing rights and12 * limitations under the License. 13 *14 * The initial developer of the original code is David A. Hinds15 * <dahinds@users.sourceforge.net>.  Portions created by David A. Hinds16 * are Copyright (C) 1999 David A. Hinds.  All Rights Reserved.17 *18 * Alternatively, the contents of this file may be used under the19 * terms of the GNU General Public License version 2 (the "GPL"), in which20 * case the provisions of the GPL are applicable instead of the21 * above.  If you wish to allow the use of your version of this file22 * only under the terms of the GPL and not to allow others to use23 * your version of this file under the MPL, indicate your decision by24 * deleting the provisions above and replace them with the notice and25 * other provisions required by the GPL.  If you do not delete the26 * provisions above, a recipient may use your version of this file27 * under either the MPL or the GPL.28 */29 30#ifndef _LINUX_O2MICRO_H31#define _LINUX_O2MICRO_H32 33/* Additional PCI configuration registers */34 35#define O2_MUX_CONTROL		0x90	/* 32 bit */36#define  O2_MUX_RING_OUT	0x0000000f37#define  O2_MUX_SKTB_ACTV	0x000000f038#define  O2_MUX_SCTA_ACTV_ENA	0x0000010039#define  O2_MUX_SCTB_ACTV_ENA	0x0000020040#define  O2_MUX_SER_IRQ_ROUTE	0x0000e00041#define  O2_MUX_SER_PCI		0x0001000042 43#define  O2_MUX_SKTA_TURBO	0x000c0000	/* for 6833, 6860 */44#define  O2_MUX_SKTB_TURBO	0x0030000045#define  O2_MUX_AUX_VCC_3V	0x0040000046#define  O2_MUX_PCI_VCC_5V	0x0080000047#define  O2_MUX_PME_MUX		0x0f00000048 49/* Additional ExCA registers */50 51#define O2_MODE_A		0x3852#define O2_MODE_A_2		0x26	/* for 6833B, 6860C */53#define  O2_MODE_A_CD_PULSE	0x0454#define  O2_MODE_A_SUSP_EDGE	0x0855#define  O2_MODE_A_HOST_SUSP	0x1056#define  O2_MODE_A_PWR_MASK	0x6057#define  O2_MODE_A_QUIET	0x8058 59#define O2_MODE_B		0x3960#define O2_MODE_B_2		0x2e	/* for 6833B, 6860C */61#define  O2_MODE_B_IDENT	0x0362#define  O2_MODE_B_ID_BSTEP	0x0063#define  O2_MODE_B_ID_CSTEP	0x0164#define  O2_MODE_B_ID_O2	0x0265#define  O2_MODE_B_VS1		0x0466#define  O2_MODE_B_VS2		0x0867#define  O2_MODE_B_IRQ15_RI	0x8068 69#define O2_MODE_C		0x3a70#define  O2_MODE_C_DREQ_MASK	0x0371#define  O2_MODE_C_DREQ_INPACK	0x0172#define  O2_MODE_C_DREQ_WP	0x0273#define  O2_MODE_C_DREQ_BVD2	0x0374#define  O2_MODE_C_ZVIDEO	0x0875#define  O2_MODE_C_IREQ_SEL	0x3076#define  O2_MODE_C_MGMT_SEL	0xc077 78#define O2_MODE_D		0x3b79#define  O2_MODE_D_IRQ_MODE	0x0380#define  O2_MODE_D_PCI_CLKRUN	0x0481#define  O2_MODE_D_CB_CLKRUN	0x0882#define  O2_MODE_D_SKT_ACTV	0x2083#define  O2_MODE_D_PCI_FIFO	0x40	/* for OZ6729, OZ6730 */84#define  O2_MODE_D_W97_IRQ	0x4085#define  O2_MODE_D_ISA_IRQ	0x8086 87#define O2_MHPG_DMA		0x3c88#define  O2_MHPG_CHANNEL	0x0789#define  O2_MHPG_CINT_ENA	0x0890#define  O2_MHPG_CSC_ENA	0x1091 92#define O2_FIFO_ENA		0x3d93#define  O2_FIFO_ZVIDEO_3	0x0894#define  O2_FIFO_PCI_FIFO	0x1095#define  O2_FIFO_POSTWR		0x4096#define  O2_FIFO_BUFFER		0x8097 98#define O2_MODE_E		0x3e99#define  O2_MODE_E_MHPG_DMA	0x01100#define  O2_MODE_E_SPKR_OUT	0x02101#define  O2_MODE_E_LED_OUT	0x08102#define  O2_MODE_E_SKTA_ACTV	0x10103 104#define O2_RESERVED1		0x94105#define O2_RESERVED2		0xD4106#define O2_RES_READ_PREFETCH	0x02107#define O2_RES_WRITE_BURST	0x08108 109static int o2micro_override(struct yenta_socket *socket)110{111	/*112	 * 'reserved' register at 0x94/D4. allows setting read prefetch and write113	 * bursting. read prefetching for example makes the RME Hammerfall DSP114	 * working. for some bridges it is at 0x94, for others at 0xD4. it's115	 * ok to write to both registers on all O2 bridges.116	 * from Eric Still, 02Micro.117	 */118	u8 a, b;119	bool use_speedup;120 121	if (PCI_FUNC(socket->dev->devfn) == 0) {122		a = config_readb(socket, O2_RESERVED1);123		b = config_readb(socket, O2_RESERVED2);124		dev_dbg(&socket->dev->dev, "O2: 0x94/0xD4: %02x/%02x\n", a, b);125 126		switch (socket->dev->device) {127		/*128		 * older bridges have problems with both read prefetch and write129		 * bursting depending on the combination of the chipset, bridge130		 * and the cardbus card. so disable them to be on the safe side.131		 */132		case PCI_DEVICE_ID_O2_6729:133		case PCI_DEVICE_ID_O2_6730:134		case PCI_DEVICE_ID_O2_6812:135		case PCI_DEVICE_ID_O2_6832:136		case PCI_DEVICE_ID_O2_6836:137		case PCI_DEVICE_ID_O2_6933:138			use_speedup = false;139			break;140		default:141			use_speedup = true;142			break;143		}144 145		/* the user may override our decision */146		if (strcasecmp(o2_speedup, "on") == 0)147			use_speedup = true;148		else if (strcasecmp(o2_speedup, "off") == 0)149			use_speedup = false;150		else if (strcasecmp(o2_speedup, "default") != 0)151			dev_warn(&socket->dev->dev,152				"O2: Unknown parameter, using 'default'");153 154		if (use_speedup) {155			dev_info(&socket->dev->dev,156				"O2: enabling read prefetch/write burst. If you experience problems or performance issues, use the yenta_socket parameter 'o2_speedup=off'\n");157			config_writeb(socket, O2_RESERVED1,158				      a | O2_RES_READ_PREFETCH | O2_RES_WRITE_BURST);159			config_writeb(socket, O2_RESERVED2,160				      b | O2_RES_READ_PREFETCH | O2_RES_WRITE_BURST);161		} else {162			dev_info(&socket->dev->dev,163				"O2: disabling read prefetch/write burst. If you experience problems or performance issues, use the yenta_socket parameter 'o2_speedup=on'\n");164			config_writeb(socket, O2_RESERVED1,165				      a & ~(O2_RES_READ_PREFETCH | O2_RES_WRITE_BURST));166			config_writeb(socket, O2_RESERVED2,167				      b & ~(O2_RES_READ_PREFETCH | O2_RES_WRITE_BURST));168		}169	}170 171	return 0;172}173 174static void o2micro_restore_state(struct yenta_socket *socket)175{176	/*177	 * as long as read prefetch is the only thing in178	 * o2micro_override, it's safe to call it from here179	 */180	o2micro_override(socket);181}182 183#endif /* _LINUX_O2MICRO_H */184