363 lines · c
1// SPDX-License-Identifier: GPL-2.0-only2/*======================================================================3 4 Device driver for the PCMCIA control functionality of PXA2xx5 microprocessors.6 7 8 (c) Ian Molton (spyro@f2s.com) 20039 (c) Stefan Eletzhofer (stefan.eletzhofer@inquant.de) 2003,410 11 derived from sa11xx_base.c12 13 Portions created by John G. Dorsey are14 Copyright (C) 1999 John G. Dorsey.15 16 ======================================================================*/17 18#include <linux/module.h>19#include <linux/slab.h>20#include <linux/init.h>21#include <linux/cpufreq.h>22#include <linux/ioport.h>23#include <linux/kernel.h>24#include <linux/spinlock.h>25#include <linux/platform_device.h>26#include <linux/soc/pxa/cpu.h>27#include <linux/soc/pxa/smemc.h>28 29#include <asm/io.h>30#include <asm/irq.h>31#include <asm/mach-types.h>32 33#include <pcmcia/ss.h>34#include <pcmcia/cistpl.h>35 36#include "soc_common.h"37#include "pxa2xx_base.h"38 39/*40 * Personal Computer Memory Card International Association (PCMCIA) sockets41 */42 43#define PCMCIAPrtSp 0x04000000 /* PCMCIA Partition Space [byte] */44#define PCMCIASp (4*PCMCIAPrtSp) /* PCMCIA Space [byte] */45#define PCMCIAIOSp PCMCIAPrtSp /* PCMCIA I/O Space [byte] */46#define PCMCIAAttrSp PCMCIAPrtSp /* PCMCIA Attribute Space [byte] */47#define PCMCIAMemSp PCMCIAPrtSp /* PCMCIA Memory Space [byte] */48 49#define PCMCIA0Sp PCMCIASp /* PCMCIA 0 Space [byte] */50#define PCMCIA0IOSp PCMCIAIOSp /* PCMCIA 0 I/O Space [byte] */51#define PCMCIA0AttrSp PCMCIAAttrSp /* PCMCIA 0 Attribute Space [byte] */52#define PCMCIA0MemSp PCMCIAMemSp /* PCMCIA 0 Memory Space [byte] */53 54#define PCMCIA1Sp PCMCIASp /* PCMCIA 1 Space [byte] */55#define PCMCIA1IOSp PCMCIAIOSp /* PCMCIA 1 I/O Space [byte] */56#define PCMCIA1AttrSp PCMCIAAttrSp /* PCMCIA 1 Attribute Space [byte] */57#define PCMCIA1MemSp PCMCIAMemSp /* PCMCIA 1 Memory Space [byte] */58 59#define _PCMCIA(Nb) /* PCMCIA [0..1] */ \60 (0x20000000 + (Nb) * PCMCIASp)61#define _PCMCIAIO(Nb) _PCMCIA(Nb) /* PCMCIA I/O [0..1] */62#define _PCMCIAAttr(Nb) /* PCMCIA Attribute [0..1] */ \63 (_PCMCIA(Nb) + 2 * PCMCIAPrtSp)64#define _PCMCIAMem(Nb) /* PCMCIA Memory [0..1] */ \65 (_PCMCIA(Nb) + 3 * PCMCIAPrtSp)66 67#define _PCMCIA0 _PCMCIA(0) /* PCMCIA 0 */68#define _PCMCIA0IO _PCMCIAIO(0) /* PCMCIA 0 I/O */69#define _PCMCIA0Attr _PCMCIAAttr(0) /* PCMCIA 0 Attribute */70#define _PCMCIA0Mem _PCMCIAMem(0) /* PCMCIA 0 Memory */71 72#define _PCMCIA1 _PCMCIA(1) /* PCMCIA 1 */73#define _PCMCIA1IO _PCMCIAIO(1) /* PCMCIA 1 I/O */74#define _PCMCIA1Attr _PCMCIAAttr(1) /* PCMCIA 1 Attribute */75#define _PCMCIA1Mem _PCMCIAMem(1) /* PCMCIA 1 Memory */76 77 78#define MCXX_SETUP_MASK (0x7f)79#define MCXX_ASST_MASK (0x1f)80#define MCXX_HOLD_MASK (0x3f)81#define MCXX_SETUP_SHIFT (0)82#define MCXX_ASST_SHIFT (7)83#define MCXX_HOLD_SHIFT (14)84 85static inline u_int pxa2xx_mcxx_hold(u_int pcmcia_cycle_ns,86 u_int mem_clk_10khz)87{88 u_int code = pcmcia_cycle_ns * mem_clk_10khz;89 return (code / 300000) + ((code % 300000) ? 1 : 0) - 1;90}91 92static inline u_int pxa2xx_mcxx_asst(u_int pcmcia_cycle_ns,93 u_int mem_clk_10khz)94{95 u_int code = pcmcia_cycle_ns * mem_clk_10khz;96 return (code / 300000) + ((code % 300000) ? 1 : 0) + 1;97}98 99static inline u_int pxa2xx_mcxx_setup(u_int pcmcia_cycle_ns,100 u_int mem_clk_10khz)101{102 u_int code = pcmcia_cycle_ns * mem_clk_10khz;103 return (code / 100000) + ((code % 100000) ? 1 : 0) - 1;104}105 106/* This function returns the (approximate) command assertion period, in107 * nanoseconds, for a given CPU clock frequency and MCXX_ASST value:108 */109static inline u_int pxa2xx_pcmcia_cmd_time(u_int mem_clk_10khz,110 u_int pcmcia_mcxx_asst)111{112 return (300000 * (pcmcia_mcxx_asst + 1) / mem_clk_10khz);113}114 115static uint32_t pxa2xx_pcmcia_mcmem(int sock, int speed, int clock)116{117 uint32_t val;118 119 val = ((pxa2xx_mcxx_setup(speed, clock)120 & MCXX_SETUP_MASK) << MCXX_SETUP_SHIFT)121 | ((pxa2xx_mcxx_asst(speed, clock)122 & MCXX_ASST_MASK) << MCXX_ASST_SHIFT)123 | ((pxa2xx_mcxx_hold(speed, clock)124 & MCXX_HOLD_MASK) << MCXX_HOLD_SHIFT);125 126 return val;127}128 129static int pxa2xx_pcmcia_mcio(int sock, int speed, int clock)130{131 uint32_t val;132 133 val = ((pxa2xx_mcxx_setup(speed, clock)134 & MCXX_SETUP_MASK) << MCXX_SETUP_SHIFT)135 | ((pxa2xx_mcxx_asst(speed, clock)136 & MCXX_ASST_MASK) << MCXX_ASST_SHIFT)137 | ((pxa2xx_mcxx_hold(speed, clock)138 & MCXX_HOLD_MASK) << MCXX_HOLD_SHIFT);139 140 141 return val;142}143 144static int pxa2xx_pcmcia_mcatt(int sock, int speed, int clock)145{146 uint32_t val;147 148 val = ((pxa2xx_mcxx_setup(speed, clock)149 & MCXX_SETUP_MASK) << MCXX_SETUP_SHIFT)150 | ((pxa2xx_mcxx_asst(speed, clock)151 & MCXX_ASST_MASK) << MCXX_ASST_SHIFT)152 | ((pxa2xx_mcxx_hold(speed, clock)153 & MCXX_HOLD_MASK) << MCXX_HOLD_SHIFT);154 155 156 return val;157}158 159static int pxa2xx_pcmcia_set_timing(struct soc_pcmcia_socket *skt)160{161 unsigned long clk = clk_get_rate(skt->clk) / 10000;162 struct soc_pcmcia_timing timing;163 int sock = skt->nr;164 165 soc_common_pcmcia_get_timing(skt, &timing);166 167 pxa_smemc_set_pcmcia_timing(sock,168 pxa2xx_pcmcia_mcmem(sock, timing.mem, clk),169 pxa2xx_pcmcia_mcatt(sock, timing.attr, clk),170 pxa2xx_pcmcia_mcio(sock, timing.io, clk));171 172 return 0;173}174 175#ifdef CONFIG_CPU_FREQ176 177static int178pxa2xx_pcmcia_frequency_change(struct soc_pcmcia_socket *skt,179 unsigned long val,180 struct cpufreq_freqs *freqs)181{182 switch (val) {183 case CPUFREQ_PRECHANGE:184 if (freqs->new > freqs->old) {185 debug(skt, 2, "new frequency %u.%uMHz > %u.%uMHz, "186 "pre-updating\n",187 freqs->new / 1000, (freqs->new / 100) % 10,188 freqs->old / 1000, (freqs->old / 100) % 10);189 pxa2xx_pcmcia_set_timing(skt);190 }191 break;192 193 case CPUFREQ_POSTCHANGE:194 if (freqs->new < freqs->old) {195 debug(skt, 2, "new frequency %u.%uMHz < %u.%uMHz, "196 "post-updating\n",197 freqs->new / 1000, (freqs->new / 100) % 10,198 freqs->old / 1000, (freqs->old / 100) % 10);199 pxa2xx_pcmcia_set_timing(skt);200 }201 break;202 }203 return 0;204}205#endif206 207void pxa2xx_configure_sockets(struct device *dev, struct pcmcia_low_level *ops)208{209 pxa_smemc_set_pcmcia_socket(1);210}211EXPORT_SYMBOL(pxa2xx_configure_sockets);212 213static const char *skt_names[] = {214 "PCMCIA socket 0",215 "PCMCIA socket 1",216};217 218#define SKT_DEV_INFO_SIZE(n) \219 (sizeof(struct skt_dev_info) + (n)*sizeof(struct soc_pcmcia_socket))220 221int pxa2xx_drv_pcmcia_add_one(struct soc_pcmcia_socket *skt)222{223 skt->res_skt.start = _PCMCIA(skt->nr);224 skt->res_skt.end = _PCMCIA(skt->nr) + PCMCIASp - 1;225 skt->res_skt.name = skt_names[skt->nr];226 skt->res_skt.flags = IORESOURCE_MEM;227 228 skt->res_io.start = _PCMCIAIO(skt->nr);229 skt->res_io.end = _PCMCIAIO(skt->nr) + PCMCIAIOSp - 1;230 skt->res_io.name = "io";231 skt->res_io.flags = IORESOURCE_MEM | IORESOURCE_BUSY;232 233 skt->res_mem.start = _PCMCIAMem(skt->nr);234 skt->res_mem.end = _PCMCIAMem(skt->nr) + PCMCIAMemSp - 1;235 skt->res_mem.name = "memory";236 skt->res_mem.flags = IORESOURCE_MEM;237 238 skt->res_attr.start = _PCMCIAAttr(skt->nr);239 skt->res_attr.end = _PCMCIAAttr(skt->nr) + PCMCIAAttrSp - 1;240 skt->res_attr.name = "attribute";241 skt->res_attr.flags = IORESOURCE_MEM;242 243 return soc_pcmcia_add_one(skt);244}245EXPORT_SYMBOL(pxa2xx_drv_pcmcia_add_one);246 247void pxa2xx_drv_pcmcia_ops(struct pcmcia_low_level *ops)248{249 /* Provide our PXA2xx specific timing routines. */250 ops->set_timing = pxa2xx_pcmcia_set_timing;251#ifdef CONFIG_CPU_FREQ252 ops->frequency_change = pxa2xx_pcmcia_frequency_change;253#endif254}255EXPORT_SYMBOL(pxa2xx_drv_pcmcia_ops);256 257static int pxa2xx_drv_pcmcia_probe(struct platform_device *dev)258{259 int i, ret = 0;260 struct pcmcia_low_level *ops;261 struct skt_dev_info *sinfo;262 struct soc_pcmcia_socket *skt;263 struct clk *clk;264 265 ops = (struct pcmcia_low_level *)dev->dev.platform_data;266 if (!ops) {267 ret = -ENODEV;268 goto err0;269 }270 271 if (cpu_is_pxa320() && ops->nr > 1) {272 dev_err(&dev->dev, "pxa320 supports only one pcmcia slot");273 ret = -EINVAL;274 goto err0;275 }276 277 clk = devm_clk_get(&dev->dev, NULL);278 if (IS_ERR(clk))279 return -ENODEV;280 281 pxa2xx_drv_pcmcia_ops(ops);282 283 sinfo = devm_kzalloc(&dev->dev, SKT_DEV_INFO_SIZE(ops->nr),284 GFP_KERNEL);285 if (!sinfo)286 return -ENOMEM;287 288 sinfo->nskt = ops->nr;289 290 /* Initialize processor specific parameters */291 for (i = 0; i < ops->nr; i++) {292 skt = &sinfo->skt[i];293 294 skt->nr = ops->first + i;295 skt->clk = clk;296 soc_pcmcia_init_one(skt, ops, &dev->dev);297 298 ret = pxa2xx_drv_pcmcia_add_one(skt);299 if (ret)300 goto err1;301 }302 303 pxa2xx_configure_sockets(&dev->dev, ops);304 dev_set_drvdata(&dev->dev, sinfo);305 306 return 0;307 308err1:309 while (--i >= 0)310 soc_pcmcia_remove_one(&sinfo->skt[i]);311 312err0:313 return ret;314}315 316static void pxa2xx_drv_pcmcia_remove(struct platform_device *dev)317{318 struct skt_dev_info *sinfo = platform_get_drvdata(dev);319 int i;320 321 for (i = 0; i < sinfo->nskt; i++)322 soc_pcmcia_remove_one(&sinfo->skt[i]);323}324 325static int pxa2xx_drv_pcmcia_resume(struct device *dev)326{327 struct pcmcia_low_level *ops = (struct pcmcia_low_level *)dev->platform_data;328 329 pxa2xx_configure_sockets(dev, ops);330 return 0;331}332 333static const struct dev_pm_ops pxa2xx_drv_pcmcia_pm_ops = {334 .resume = pxa2xx_drv_pcmcia_resume,335};336 337static struct platform_driver pxa2xx_pcmcia_driver = {338 .probe = pxa2xx_drv_pcmcia_probe,339 .remove_new = pxa2xx_drv_pcmcia_remove,340 .driver = {341 .name = "pxa2xx-pcmcia",342 .pm = &pxa2xx_drv_pcmcia_pm_ops,343 },344};345 346static int __init pxa2xx_pcmcia_init(void)347{348 return platform_driver_register(&pxa2xx_pcmcia_driver);349}350 351static void __exit pxa2xx_pcmcia_exit(void)352{353 platform_driver_unregister(&pxa2xx_pcmcia_driver);354}355 356fs_initcall(pxa2xx_pcmcia_init);357module_exit(pxa2xx_pcmcia_exit);358 359MODULE_AUTHOR("Stefan Eletzhofer <stefan.eletzhofer@inquant.de> and Ian Molton <spyro@f2s.com>");360MODULE_DESCRIPTION("Linux PCMCIA Card Services: PXA2xx core socket driver");361MODULE_LICENSE("GPL");362MODULE_ALIAS("platform:pxa2xx-pcmcia");363