63 lines · c
1/* SPDX-License-Identifier: GPL-2.0 */2/*3 * Copyright (c) 2017, The Linux Foundation. All rights reserved.4 */5 6#ifndef QCOM_PHY_QMP_DP_PHY_H_7#define QCOM_PHY_QMP_DP_PHY_H_8 9/* QMP PHY - DP PHY registers */10#define QSERDES_DP_PHY_REVISION_ID0 0x00011#define QSERDES_DP_PHY_REVISION_ID1 0x00412#define QSERDES_DP_PHY_REVISION_ID2 0x00813#define QSERDES_DP_PHY_REVISION_ID3 0x00c14#define QSERDES_DP_PHY_CFG 0x01015#define QSERDES_DP_PHY_CFG_1 0x01416#define QSERDES_DP_PHY_PD_CTL 0x01817#define QSERDES_DP_PHY_MODE 0x01c18#define QSERDES_DP_PHY_AUX_CFG0 0x02019#define QSERDES_DP_PHY_AUX_CFG1 0x02420#define QSERDES_DP_PHY_AUX_CFG2 0x02821#define QSERDES_DP_PHY_AUX_CFG3 0x02c22#define QSERDES_DP_PHY_AUX_CFG4 0x03023#define QSERDES_DP_PHY_AUX_CFG5 0x03424#define QSERDES_DP_PHY_AUX_CFG6 0x03825#define QSERDES_DP_PHY_AUX_CFG7 0x03c26#define QSERDES_DP_PHY_AUX_CFG8 0x04027#define QSERDES_DP_PHY_AUX_CFG9 0x04428 29/* QSERDES COM_BIAS_EN_CLKBUFLR_EN bits */30# define QSERDES_V3_COM_BIAS_EN 0x000131# define QSERDES_V3_COM_BIAS_EN_MUX 0x000232# define QSERDES_V3_COM_CLKBUF_R_EN 0x000433# define QSERDES_V3_COM_CLKBUF_L_EN 0x000834# define QSERDES_V3_COM_EN_SYSCLK_TX_SEL 0x001035# define QSERDES_V3_COM_CLKBUF_RX_DRIVE_L 0x002036# define QSERDES_V3_COM_CLKBUF_RX_DRIVE_R 0x004037 38/* QPHY_TX_TX_EMP_POST1_LVL bits */39# define DP_PHY_TXn_TX_EMP_POST1_LVL_MASK 0x001f40# define DP_PHY_TXn_TX_EMP_POST1_LVL_MUX_EN 0x002041 42/* QPHY_TX_TX_DRV_LVL bits */43# define DP_PHY_TXn_TX_DRV_LVL_MASK 0x001f44# define DP_PHY_TXn_TX_DRV_LVL_MUX_EN 0x002045 46/* QSERDES_DP_PHY_PD_CTL bits */47# define DP_PHY_PD_CTL_PWRDN 0x00148# define DP_PHY_PD_CTL_PSR_PWRDN 0x00249# define DP_PHY_PD_CTL_AUX_PWRDN 0x00450# define DP_PHY_PD_CTL_LANE_0_1_PWRDN 0x00851# define DP_PHY_PD_CTL_LANE_2_3_PWRDN 0x01052# define DP_PHY_PD_CTL_PLL_PWRDN 0x02053# define DP_PHY_PD_CTL_DP_CLAMP_EN 0x04054 55/* QPHY_DP_PHY_AUX_INTERRUPT_STATUS bits */56# define PHY_AUX_STOP_ERR_MASK 0x0157# define PHY_AUX_DEC_ERR_MASK 0x0258# define PHY_AUX_SYNC_ERR_MASK 0x0459# define PHY_AUX_ALIGN_ERR_MASK 0x0860# define PHY_AUX_REQ_ERR_MASK 0x1061 62#endif63