33 lines · c
1/* Only for QMP V5 PHY - PCS_PCIE registers */2/* SPDX-License-Identifier: GPL-2.0 */3/*4 * Copyright (c) 2017, The Linux Foundation. All rights reserved.5 */6 7#ifndef QCOM_PHY_QMP_PCS_PCIE_V5_H_8#define QCOM_PHY_QMP_PCS_PCIE_V5_H_9 10/* Only for QMP V5 PHY - PCS_PCIE registers */11#define QPHY_V5_PCS_PCIE_POWER_STATE_CONFIG2 0x0c12#define QPHY_V5_PCS_PCIE_POWER_STATE_CONFIG4 0x1413#define QPHY_V5_PCS_PCIE_ENDPOINT_REFCLK_DRIVE 0x2014#define QPHY_V5_PCS_PCIE_L1P1_WAKEUP_DLY_TIME_AUXCLK_L 0x4415#define QPHY_V5_PCS_PCIE_L1P1_WAKEUP_DLY_TIME_AUXCLK_H 0x4816#define QPHY_V5_PCS_PCIE_L1P2_WAKEUP_DLY_TIME_AUXCLK_L 0x4c17#define QPHY_V5_PCS_PCIE_L1P2_WAKEUP_DLY_TIME_AUXCLK_H 0x5018#define QPHY_V5_PCS_PCIE_INT_AUX_CLK_CONFIG1 0x5419#define QPHY_V5_PCS_PCIE_OSC_DTCT_CONFIG1 0x5c20#define QPHY_V5_PCS_PCIE_OSC_DTCT_CONFIG2 0x6021#define QPHY_V5_PCS_PCIE_OSC_DTCT_CONFIG4 0x6822#define QPHY_V5_PCS_PCIE_OSC_DTCT_MODE2_CONFIG2 0x7c23#define QPHY_V5_PCS_PCIE_OSC_DTCT_MODE2_CONFIG4 0x8424#define QPHY_V5_PCS_PCIE_OSC_DTCT_MODE2_CONFIG5 0x8825#define QPHY_V5_PCS_PCIE_OSC_DTCT_MODE2_CONFIG6 0x8c26#define QPHY_V5_PCS_PCIE_OSC_DTCT_ACTIONS 0x9427#define QPHY_V5_PCS_PCIE_EQ_CONFIG1 0xa428#define QPHY_V5_PCS_PCIE_EQ_CONFIG2 0xa829#define QPHY_V5_PCS_PCIE_PRESET_P10_PRE 0xc030#define QPHY_V5_PCS_PCIE_PRESET_P10_POST 0xe431 32#endif33