32 lines · c
1/* SPDX-License-Identifier: GPL-2.0 */2/*3 * Copyright (c) 2017, The Linux Foundation. All rights reserved.4 */5 6#ifndef QCOM_PHY_QMP_PCS_UFS_V4_H_7#define QCOM_PHY_QMP_PCS_UFS_V4_H_8 9/* Only for QMP V4 PHY - UFS PCS registers */10#define QPHY_V4_PCS_UFS_PHY_START 0x00011#define QPHY_V4_PCS_UFS_POWER_DOWN_CONTROL 0x00412#define QPHY_V4_PCS_UFS_SW_RESET 0x00813#define QPHY_V4_PCS_UFS_TIMER_20US_CORECLK_STEPS_MSB 0x00c14#define QPHY_V4_PCS_UFS_TIMER_20US_CORECLK_STEPS_LSB 0x01015#define QPHY_V4_PCS_UFS_PLL_CNTL 0x02c16#define QPHY_V4_PCS_UFS_TX_LARGE_AMP_DRV_LVL 0x03017#define QPHY_V4_PCS_UFS_TX_SMALL_AMP_DRV_LVL 0x03818#define QPHY_V4_PCS_UFS_BIST_FIXED_PAT_CTRL 0x06019#define QPHY_V4_PCS_UFS_TX_HSGEAR_CAPABILITY 0x07420#define QPHY_V4_PCS_UFS_RX_HSGEAR_CAPABILITY 0x0b421#define QPHY_V4_PCS_UFS_DEBUG_BUS_CLKSEL 0x12422#define QPHY_V4_PCS_UFS_LINECFG_DISABLE 0x14823#define QPHY_V4_PCS_UFS_RX_MIN_HIBERN8_TIME 0x15024#define QPHY_V4_PCS_UFS_RX_SIGDET_CTRL2 0x15825#define QPHY_V4_PCS_UFS_TX_PWM_GEAR_BAND 0x16026#define QPHY_V4_PCS_UFS_TX_HS_GEAR_BAND 0x16827#define QPHY_V4_PCS_UFS_READY_STATUS 0x18028#define QPHY_V4_PCS_UFS_TX_MID_TERM_CTRL1 0x1d829#define QPHY_V4_PCS_UFS_MULTI_LANE_CTRL1 0x1e030 31#endif32