35 lines · c
1/* SPDX-License-Identifier: GPL-2.0 */2/*3 * Copyright (c) 2017, The Linux Foundation. All rights reserved.4 */5 6#ifndef QCOM_PHY_QMP_PCS_V5_H_7#define QCOM_PHY_QMP_PCS_V5_H_8 9/* Only for QMP V5 PHY - USB/PCIe PCS registers */10#define QPHY_V5_PCS_SW_RESET 0x00011#define QPHY_V5_PCS_PCS_STATUS1 0x01412#define QPHY_V5_PCS_POWER_DOWN_CONTROL 0x04013#define QPHY_V5_PCS_START_CONTROL 0x04414#define QPHY_V5_PCS_LOCK_DETECT_CONFIG1 0x0c415#define QPHY_V5_PCS_LOCK_DETECT_CONFIG2 0x0c816#define QPHY_V5_PCS_LOCK_DETECT_CONFIG3 0x0cc17#define QPHY_V5_PCS_LOCK_DETECT_CONFIG6 0x0d818#define QPHY_V5_PCS_REFGEN_REQ_CONFIG1 0x0dc19#define QPHY_V5_PCS_G3S2_PRE_GAIN 0x17020#define QPHY_V5_PCS_RX_SIGDET_LVL 0x18821#define QPHY_V5_PCS_RCVR_DTCT_DLY_P1U2_L 0x19022#define QPHY_V5_PCS_RCVR_DTCT_DLY_P1U2_H 0x19423#define QPHY_V5_PCS_RATE_SLEW_CNTRL1 0x19824#define QPHY_V5_PCS_CDR_RESET_TIME 0x1b025#define QPHY_V5_PCS_RX_CONFIG 0x1b026#define QPHY_V5_PCS_ALIGN_DETECT_CONFIG1 0x1c027#define QPHY_V5_PCS_ALIGN_DETECT_CONFIG2 0x1c428#define QPHY_V5_PCS_PCS_TX_RX_CONFIG 0x1d029#define QPHY_V5_PCS_EQ_CONFIG1 0x1dc30#define QPHY_V5_PCS_EQ_CONFIG2 0x1e031#define QPHY_V5_PCS_EQ_CONFIG3 0x1e432#define QPHY_V5_PCS_EQ_CONFIG5 0x1ec33 34#endif35