33 lines · c
1/* SPDX-License-Identifier: GPL-2.0 */2/*3 * Copyright (c) 2023, Linaro Limited4 */5 6#ifndef QCOM_PHY_QMP_PCS_V6_N4_H_7#define QCOM_PHY_QMP_PCS_V6_N4_H_8 9/* Only for QMP V6 N4 PHY - USB/PCIe PCS registers */10#define QPHY_V6_N4_PCS_SW_RESET 0x00011#define QPHY_V6_N4_PCS_PCS_STATUS1 0x01412#define QPHY_V6_N4_PCS_POWER_DOWN_CONTROL 0x04013#define QPHY_V6_N4_PCS_START_CONTROL 0x04414#define QPHY_V6_N4_PCS_POWER_STATE_CONFIG1 0x09015#define QPHY_V6_N4_PCS_LOCK_DETECT_CONFIG1 0x0c416#define QPHY_V6_N4_PCS_LOCK_DETECT_CONFIG2 0x0c817#define QPHY_V6_N4_PCS_LOCK_DETECT_CONFIG3 0x0cc18#define QPHY_V6_N4_PCS_LOCK_DETECT_CONFIG6 0x0d819#define QPHY_V6_N4_PCS_REFGEN_REQ_CONFIG1 0x0dc20#define QPHY_V6_N4_PCS_RX_SIGDET_LVL 0x18821#define QPHY_V6_N4_PCS_RCVR_DTCT_DLY_P1U2_L 0x19022#define QPHY_V6_N4_PCS_RCVR_DTCT_DLY_P1U2_H 0x19423#define QPHY_V6_N4_PCS_RATE_SLEW_CNTRL1 0x19824#define QPHY_V6_N4_PCS_RX_CONFIG 0x1b025#define QPHY_V6_N4_PCS_ALIGN_DETECT_CONFIG1 0x1c026#define QPHY_V6_N4_PCS_ALIGN_DETECT_CONFIG2 0x1c427#define QPHY_V6_N4_PCS_PCS_TX_RX_CONFIG 0x1d028#define QPHY_V6_N4_PCS_EQ_CONFIG1 0x1dc29#define QPHY_V6_N4_PCS_EQ_CONFIG2 0x1e030#define QPHY_V6_N4_PCS_EQ_CONFIG5 0x1ec31 32#endif33