112 lines · c
1 2/* SPDX-License-Identifier: GPL-2.0 */3/*4 * Copyright (c) 2017, The Linux Foundation. All rights reserved.5 */6 7#ifndef QCOM_PHY_QMP_QSERDES_COM_V3_H_8#define QCOM_PHY_QMP_QSERDES_COM_V3_H_9 10/* Only for QMP V3 PHY - QSERDES COM registers */11#define QSERDES_V3_COM_ATB_SEL1 0x00012#define QSERDES_V3_COM_ATB_SEL2 0x00413#define QSERDES_V3_COM_FREQ_UPDATE 0x00814#define QSERDES_V3_COM_BG_TIMER 0x00c15#define QSERDES_V3_COM_SSC_EN_CENTER 0x01016#define QSERDES_V3_COM_SSC_ADJ_PER1 0x01417#define QSERDES_V3_COM_SSC_ADJ_PER2 0x01818#define QSERDES_V3_COM_SSC_PER1 0x01c19#define QSERDES_V3_COM_SSC_PER2 0x02020#define QSERDES_V3_COM_SSC_STEP_SIZE1 0x02421#define QSERDES_V3_COM_SSC_STEP_SIZE2 0x02822#define QSERDES_V3_COM_POST_DIV 0x02c23#define QSERDES_V3_COM_POST_DIV_MUX 0x03024#define QSERDES_V3_COM_BIAS_EN_CLKBUFLR_EN 0x03425#define QSERDES_V3_COM_CLK_ENABLE1 0x03826#define QSERDES_V3_COM_SYS_CLK_CTRL 0x03c27#define QSERDES_V3_COM_SYSCLK_BUF_ENABLE 0x04028#define QSERDES_V3_COM_PLL_EN 0x04429#define QSERDES_V3_COM_PLL_IVCO 0x04830#define QSERDES_V3_COM_CMN_IETRIM 0x04c31#define QSERDES_V3_COM_CMN_IPTRIM 0x05032#define QSERDES_V3_COM_EP_CLOCK_DETECT_CTR 0x05433#define QSERDES_V3_COM_SYSCLK_DET_COMP_STATUS 0x05834#define QSERDES_V3_COM_CLK_EP_DIV 0x05c35#define QSERDES_V3_COM_CP_CTRL_MODE0 0x06036#define QSERDES_V3_COM_CP_CTRL_MODE1 0x06437#define QSERDES_V3_COM_PLL_RCTRL_MODE0 0x06838#define QSERDES_V3_COM_PLL_RCTRL_MODE1 0x06c39#define QSERDES_V3_COM_PLL_CCTRL_MODE0 0x07040#define QSERDES_V3_COM_PLL_CCTRL_MODE1 0x07441#define QSERDES_V3_COM_PLL_CNTRL 0x07842#define QSERDES_V3_COM_BIAS_EN_CTRL_BY_PSM 0x07c43#define QSERDES_V3_COM_SYSCLK_EN_SEL 0x08044#define QSERDES_V3_COM_CML_SYSCLK_SEL 0x08445#define QSERDES_V3_COM_RESETSM_CNTRL 0x08846#define QSERDES_V3_COM_RESETSM_CNTRL2 0x08c47#define QSERDES_V3_COM_LOCK_CMP_EN 0x09048#define QSERDES_V3_COM_LOCK_CMP_CFG 0x09449#define QSERDES_V3_COM_LOCK_CMP1_MODE0 0x09850#define QSERDES_V3_COM_LOCK_CMP2_MODE0 0x09c51#define QSERDES_V3_COM_LOCK_CMP3_MODE0 0x0a052#define QSERDES_V3_COM_LOCK_CMP1_MODE1 0x0a453#define QSERDES_V3_COM_LOCK_CMP2_MODE1 0x0a854#define QSERDES_V3_COM_LOCK_CMP3_MODE1 0x0ac55#define QSERDES_V3_COM_DEC_START_MODE0 0x0b056#define QSERDES_V3_COM_DEC_START_MODE1 0x0b457#define QSERDES_V3_COM_DIV_FRAC_START1_MODE0 0x0b858#define QSERDES_V3_COM_DIV_FRAC_START2_MODE0 0x0bc59#define QSERDES_V3_COM_DIV_FRAC_START3_MODE0 0x0c060#define QSERDES_V3_COM_DIV_FRAC_START1_MODE1 0x0c461#define QSERDES_V3_COM_DIV_FRAC_START2_MODE1 0x0c862#define QSERDES_V3_COM_DIV_FRAC_START3_MODE1 0x0cc63#define QSERDES_V3_COM_INTEGLOOP_INITVAL 0x0d064#define QSERDES_V3_COM_INTEGLOOP_EN 0x0d465#define QSERDES_V3_COM_INTEGLOOP_GAIN0_MODE0 0x0d866#define QSERDES_V3_COM_INTEGLOOP_GAIN1_MODE0 0x0dc67#define QSERDES_V3_COM_INTEGLOOP_GAIN0_MODE1 0x0e068#define QSERDES_V3_COM_INTEGLOOP_GAIN1_MODE1 0x0e469#define QSERDES_V3_COM_VCOCAL_DEADMAN_CTRL 0x0e870#define QSERDES_V3_COM_VCO_TUNE_CTRL 0x0ec71#define QSERDES_V3_COM_VCO_TUNE_MAP 0x0f072#define QSERDES_V3_COM_VCO_TUNE1_MODE0 0x0f473#define QSERDES_V3_COM_VCO_TUNE2_MODE0 0x0f874#define QSERDES_V3_COM_VCO_TUNE1_MODE1 0x0fc75#define QSERDES_V3_COM_VCO_TUNE2_MODE1 0x10076#define QSERDES_V3_COM_VCO_TUNE_INITVAL1 0x10477#define QSERDES_V3_COM_VCO_TUNE_INITVAL2 0x10878#define QSERDES_V3_COM_VCO_TUNE_MINVAL1 0x10c79#define QSERDES_V3_COM_VCO_TUNE_MINVAL2 0x11080#define QSERDES_V3_COM_VCO_TUNE_MAXVAL1 0x11481#define QSERDES_V3_COM_VCO_TUNE_MAXVAL2 0x11882#define QSERDES_V3_COM_VCO_TUNE_TIMER1 0x11c83#define QSERDES_V3_COM_VCO_TUNE_TIMER2 0x12084#define QSERDES_V3_COM_CMN_STATUS 0x12485#define QSERDES_V3_COM_RESET_SM_STATUS 0x12886#define QSERDES_V3_COM_RESTRIM_CODE_STATUS 0x12c87#define QSERDES_V3_COM_PLLCAL_CODE1_STATUS 0x13088#define QSERDES_V3_COM_PLLCAL_CODE2_STATUS 0x13489#define QSERDES_V3_COM_CLK_SELECT 0x13890#define QSERDES_V3_COM_HSCLK_SEL 0x13c91#define QSERDES_V3_COM_INTEGLOOP_BINCODE_STATUS 0x14092#define QSERDES_V3_COM_PLL_ANALOG 0x14493#define QSERDES_V3_COM_CORECLK_DIV_MODE0 0x14894#define QSERDES_V3_COM_CORECLK_DIV_MODE1 0x14c95#define QSERDES_V3_COM_SW_RESET 0x15096#define QSERDES_V3_COM_CORE_CLK_EN 0x15497#define QSERDES_V3_COM_C_READY_STATUS 0x15898#define QSERDES_V3_COM_CMN_CONFIG 0x15c99#define QSERDES_V3_COM_CMN_RATE_OVERRIDE 0x160100#define QSERDES_V3_COM_SVS_MODE_CLK_SEL 0x164101#define QSERDES_V3_COM_DEBUG_BUS0 0x168102#define QSERDES_V3_COM_DEBUG_BUS1 0x16c103#define QSERDES_V3_COM_DEBUG_BUS2 0x170104#define QSERDES_V3_COM_DEBUG_BUS3 0x174105#define QSERDES_V3_COM_DEBUG_BUS_SEL 0x178106#define QSERDES_V3_COM_CMN_MISC1 0x17c107#define QSERDES_V3_COM_CMN_MISC2 0x180108#define QSERDES_V3_COM_CMN_MODE 0x184109#define QSERDES_V3_COM_CMN_VREG_SEL 0x188110 111#endif112