125 lines · c
1/* SPDX-License-Identifier: GPL-2.0 */2/*3 * Copyright (c) 2017, The Linux Foundation. All rights reserved.4 */5 6#ifndef QCOM_PHY_QMP_QSERDES_COM_V5_H_7#define QCOM_PHY_QMP_QSERDES_COM_V5_H_8 9/* Only for QMP V5 PHY - QSERDES COM registers */10#define QSERDES_V5_COM_ATB_SEL1 0x00011#define QSERDES_V5_COM_ATB_SEL2 0x00412#define QSERDES_V5_COM_FREQ_UPDATE 0x00813#define QSERDES_V5_COM_BG_TIMER 0x00c14#define QSERDES_V5_COM_SSC_EN_CENTER 0x01015#define QSERDES_V5_COM_SSC_ADJ_PER1 0x01416#define QSERDES_V5_COM_SSC_ADJ_PER2 0x01817#define QSERDES_V5_COM_SSC_PER1 0x01c18#define QSERDES_V5_COM_SSC_PER2 0x02019#define QSERDES_V5_COM_SSC_STEP_SIZE1_MODE0 0x02420#define QSERDES_V5_COM_SSC_STEP_SIZE2_MODE0 0x02821#define QSERDES_V5_COM_SSC_STEP_SIZE3_MODE0 0x02c22#define QSERDES_V5_COM_SSC_STEP_SIZE1_MODE1 0x03023#define QSERDES_V5_COM_SSC_STEP_SIZE2_MODE1 0x03424#define QSERDES_V5_COM_SSC_STEP_SIZE3_MODE1 0x03825#define QSERDES_V5_COM_POST_DIV 0x03c26#define QSERDES_V5_COM_POST_DIV_MUX 0x04027#define QSERDES_V5_COM_BIAS_EN_CLKBUFLR_EN 0x04428#define QSERDES_V5_COM_CLK_ENABLE1 0x04829#define QSERDES_V5_COM_SYS_CLK_CTRL 0x04c30#define QSERDES_V5_COM_SYSCLK_BUF_ENABLE 0x05031#define QSERDES_V5_COM_PLL_EN 0x05432#define QSERDES_V5_COM_PLL_IVCO 0x05833#define QSERDES_V5_COM_CMN_IETRIM 0x05c34#define QSERDES_V5_COM_CMN_IPTRIM 0x06035#define QSERDES_V5_COM_EP_CLOCK_DETECT_CTRL 0x06436#define QSERDES_V5_COM_SYSCLK_DET_COMP_STATUS 0x06837#define QSERDES_V5_COM_CLK_EP_DIV_MODE0 0x06c38#define QSERDES_V5_COM_CLK_EP_DIV_MODE1 0x07039#define QSERDES_V5_COM_CP_CTRL_MODE0 0x07440#define QSERDES_V5_COM_CP_CTRL_MODE1 0x07841#define QSERDES_V5_COM_PLL_RCTRL_MODE0 0x07c42#define QSERDES_V5_COM_PLL_RCTRL_MODE1 0x08043#define QSERDES_V5_COM_PLL_CCTRL_MODE0 0x08444#define QSERDES_V5_COM_PLL_CCTRL_MODE1 0x08845#define QSERDES_V5_COM_PLL_CNTRL 0x08c46#define QSERDES_V5_COM_BIAS_EN_CTRL_BY_PSM 0x09047#define QSERDES_V5_COM_SYSCLK_EN_SEL 0x09448#define QSERDES_V5_COM_CML_SYSCLK_SEL 0x09849#define QSERDES_V5_COM_RESETSM_CNTRL 0x09c50#define QSERDES_V5_COM_RESETSM_CNTRL2 0x0a051#define QSERDES_V5_COM_LOCK_CMP_EN 0x0a452#define QSERDES_V5_COM_LOCK_CMP_CFG 0x0a853#define QSERDES_V5_COM_LOCK_CMP1_MODE0 0x0ac54#define QSERDES_V5_COM_LOCK_CMP2_MODE0 0x0b055#define QSERDES_V5_COM_LOCK_CMP1_MODE1 0x0b456#define QSERDES_V5_COM_LOCK_CMP2_MODE1 0x0b857#define QSERDES_V5_COM_DEC_START_MODE0 0x0bc58#define QSERDES_V5_COM_DEC_START_MSB_MODE0 0x0c059#define QSERDES_V5_COM_DEC_START_MODE1 0x0c460#define QSERDES_V5_COM_DEC_START_MSB_MODE1 0x0c861#define QSERDES_V5_COM_DIV_FRAC_START1_MODE0 0x0cc62#define QSERDES_V5_COM_DIV_FRAC_START2_MODE0 0x0d063#define QSERDES_V5_COM_DIV_FRAC_START3_MODE0 0x0d464#define QSERDES_V5_COM_DIV_FRAC_START1_MODE1 0x0d865#define QSERDES_V5_COM_DIV_FRAC_START2_MODE1 0x0dc66#define QSERDES_V5_COM_DIV_FRAC_START3_MODE1 0x0e067#define QSERDES_V5_COM_INTEGLOOP_INITVAL 0x0e468#define QSERDES_V5_COM_INTEGLOOP_EN 0x0e869#define QSERDES_V5_COM_INTEGLOOP_GAIN0_MODE0 0x0ec70#define QSERDES_V5_COM_INTEGLOOP_GAIN1_MODE0 0x0f071#define QSERDES_V5_COM_INTEGLOOP_GAIN0_MODE1 0x0f472#define QSERDES_V5_COM_INTEGLOOP_GAIN1_MODE1 0x0f873#define QSERDES_V5_COM_INTEGLOOP_P_PATH_GAIN0 0x0fc74#define QSERDES_V5_COM_INTEGLOOP_P_PATH_GAIN1 0x10075#define QSERDES_V5_COM_VCOCAL_DEADMAN_CTRL 0x10476#define QSERDES_V5_COM_VCO_TUNE_CTRL 0x10877#define QSERDES_V5_COM_VCO_TUNE_MAP 0x10c78#define QSERDES_V5_COM_VCO_TUNE1_MODE0 0x11079#define QSERDES_V5_COM_VCO_TUNE2_MODE0 0x11480#define QSERDES_V5_COM_VCO_TUNE1_MODE1 0x11881#define QSERDES_V5_COM_VCO_TUNE2_MODE1 0x11c82#define QSERDES_V5_COM_VCO_TUNE_INITVAL1 0x12083#define QSERDES_V5_COM_VCO_TUNE_INITVAL2 0x12484#define QSERDES_V5_COM_VCO_TUNE_MINVAL1 0x12885#define QSERDES_V5_COM_VCO_TUNE_MINVAL2 0x12c86#define QSERDES_V5_COM_VCO_TUNE_MAXVAL1 0x13087#define QSERDES_V5_COM_VCO_TUNE_MAXVAL2 0x13488#define QSERDES_V5_COM_VCO_TUNE_TIMER1 0x13889#define QSERDES_V5_COM_VCO_TUNE_TIMER2 0x13c90#define QSERDES_V5_COM_CMN_STATUS 0x14091#define QSERDES_V5_COM_RESET_SM_STATUS 0x14492#define QSERDES_V5_COM_RESTRIM_CODE_STATUS 0x14893#define QSERDES_V5_COM_PLLCAL_CODE1_STATUS 0x14c94#define QSERDES_V5_COM_PLLCAL_CODE2_STATUS 0x15095#define QSERDES_V5_COM_CLK_SELECT 0x15496#define QSERDES_V5_COM_HSCLK_SEL 0x15897#define QSERDES_V5_COM_HSCLK_HS_SWITCH_SEL 0x15c98#define QSERDES_V5_COM_INTEGLOOP_BINCODE_STATUS 0x16099#define QSERDES_V5_COM_PLL_ANALOG 0x164100#define QSERDES_V5_COM_CORECLK_DIV_MODE0 0x168101#define QSERDES_V5_COM_CORECLK_DIV_MODE1 0x16c102#define QSERDES_V5_COM_SW_RESET 0x170103#define QSERDES_V5_COM_CORE_CLK_EN 0x174104#define QSERDES_V5_COM_C_READY_STATUS 0x178105#define QSERDES_V5_COM_CMN_CONFIG 0x17c106#define QSERDES_V5_COM_CMN_RATE_OVERRIDE 0x180107#define QSERDES_V5_COM_SVS_MODE_CLK_SEL 0x184108#define QSERDES_V5_COM_DEBUG_BUS0 0x188109#define QSERDES_V5_COM_DEBUG_BUS1 0x18c110#define QSERDES_V5_COM_DEBUG_BUS2 0x190111#define QSERDES_V5_COM_DEBUG_BUS3 0x194112#define QSERDES_V5_COM_DEBUG_BUS_SEL 0x198113#define QSERDES_V5_COM_CMN_MISC1 0x19c114#define QSERDES_V5_COM_CMN_MODE 0x1a0115#define QSERDES_V5_COM_CMN_MODE_CONTD 0x1a4116#define QSERDES_V5_COM_VCO_DC_LEVEL_CTRL 0x1a8117#define QSERDES_V5_COM_BIN_VCOCAL_CMP_CODE1_MODE0 0x1ac118#define QSERDES_V5_COM_BIN_VCOCAL_CMP_CODE2_MODE0 0x1b0119#define QSERDES_V5_COM_BIN_VCOCAL_CMP_CODE1_MODE1 0x1b4120#define QSERDES_V5_COM_BIN_VCOCAL_CMP_CODE2_MODE1 0x1b8121#define QSERDES_V5_COM_BIN_VCOCAL_HSCLK_SEL 0x1bc122#define QSERDES_V5_COM_RESERVED_1 0x1c0123 124#endif125