141 lines · c
1/* SPDX-License-Identifier: GPL-2.0 */2/*3 * Copyright (c) 2017, The Linux Foundation. All rights reserved.4 */5 6#ifndef QCOM_PHY_QMP_QSERDES_COM_H_7#define QCOM_PHY_QMP_QSERDES_COM_H_8 9/* Only for QMP V2 PHY - QSERDES COM registers */10#define QSERDES_COM_ATB_SEL1 0x00011#define QSERDES_COM_ATB_SEL2 0x00412#define QSERDES_COM_FREQ_UPDATE 0x00813#define QSERDES_COM_BG_TIMER 0x00c14#define QSERDES_COM_SSC_EN_CENTER 0x01015#define QSERDES_COM_SSC_ADJ_PER1 0x01416#define QSERDES_COM_SSC_ADJ_PER2 0x01817#define QSERDES_COM_SSC_PER1 0x01c18#define QSERDES_COM_SSC_PER2 0x02019#define QSERDES_COM_SSC_STEP_SIZE1 0x02420#define QSERDES_COM_SSC_STEP_SIZE2 0x02821#define QSERDES_COM_POST_DIV 0x02c22#define QSERDES_COM_POST_DIV_MUX 0x03023#define QSERDES_COM_BIAS_EN_CLKBUFLR_EN 0x03424#define QSERDES_COM_CLK_ENABLE1 0x03825#define QSERDES_COM_SYS_CLK_CTRL 0x03c26#define QSERDES_COM_SYSCLK_BUF_ENABLE 0x04027#define QSERDES_COM_PLL_EN 0x04428#define QSERDES_COM_PLL_IVCO 0x04829#define QSERDES_COM_LOCK_CMP1_MODE0 0x04c30#define QSERDES_COM_LOCK_CMP2_MODE0 0x05031#define QSERDES_COM_LOCK_CMP3_MODE0 0x05432#define QSERDES_COM_LOCK_CMP1_MODE1 0x05833#define QSERDES_COM_LOCK_CMP2_MODE1 0x05c34#define QSERDES_COM_LOCK_CMP3_MODE1 0x06035#define QSERDES_COM_LOCK_CMP1_MODE2 0x06436#define QSERDES_COM_CMN_RSVD0 0x06437#define QSERDES_COM_LOCK_CMP2_MODE2 0x06838#define QSERDES_COM_EP_CLOCK_DETECT_CTRL 0x06839#define QSERDES_COM_LOCK_CMP3_MODE2 0x06c40#define QSERDES_COM_SYSCLK_DET_COMP_STATUS 0x06c41#define QSERDES_COM_BG_TRIM 0x07042#define QSERDES_COM_CLK_EP_DIV 0x07443#define QSERDES_COM_CP_CTRL_MODE0 0x07844#define QSERDES_COM_CP_CTRL_MODE1 0x07c45#define QSERDES_COM_CP_CTRL_MODE2 0x08046#define QSERDES_COM_CMN_RSVD1 0x08047#define QSERDES_COM_PLL_RCTRL_MODE0 0x08448#define QSERDES_COM_PLL_RCTRL_MODE1 0x08849#define QSERDES_COM_PLL_RCTRL_MODE2 0x08c50#define QSERDES_COM_CMN_RSVD2 0x08c51#define QSERDES_COM_PLL_CCTRL_MODE0 0x09052#define QSERDES_COM_PLL_CCTRL_MODE1 0x09453#define QSERDES_COM_PLL_CCTRL_MODE2 0x09854#define QSERDES_COM_CMN_RSVD3 0x09855#define QSERDES_COM_PLL_CNTRL 0x09c56#define QSERDES_COM_PHASE_SEL_CTRL 0x0a057#define QSERDES_COM_PHASE_SEL_DC 0x0a458#define QSERDES_COM_CORE_CLK_IN_SYNC_SEL 0x0a859#define QSERDES_COM_BIAS_EN_CTRL_BY_PSM 0x0a860#define QSERDES_COM_SYSCLK_EN_SEL 0x0ac61#define QSERDES_COM_CML_SYSCLK_SEL 0x0b062#define QSERDES_COM_RESETSM_CNTRL 0x0b463#define QSERDES_COM_RESETSM_CNTRL2 0x0b864#define QSERDES_COM_RESTRIM_CTRL 0x0bc65#define QSERDES_COM_RESTRIM_CTRL2 0x0c066#define QSERDES_COM_RESCODE_DIV_NUM 0x0c467#define QSERDES_COM_LOCK_CMP_EN 0x0c868#define QSERDES_COM_LOCK_CMP_CFG 0x0cc69#define QSERDES_COM_DEC_START_MODE0 0x0d070#define QSERDES_COM_DEC_START_MODE1 0x0d471#define QSERDES_COM_DEC_START_MODE2 0x0d872#define QSERDES_COM_VCOCAL_DEADMAN_CTRL 0x0d873#define QSERDES_COM_DIV_FRAC_START1_MODE0 0x0dc74#define QSERDES_COM_DIV_FRAC_START2_MODE0 0x0e075#define QSERDES_COM_DIV_FRAC_START3_MODE0 0x0e476#define QSERDES_COM_DIV_FRAC_START1_MODE1 0x0e877#define QSERDES_COM_DIV_FRAC_START2_MODE1 0x0ec78#define QSERDES_COM_DIV_FRAC_START3_MODE1 0x0f079#define QSERDES_COM_DIV_FRAC_START1_MODE2 0x0f480#define QSERDES_COM_VCO_TUNE_MINVAL1 0x0f481#define QSERDES_COM_DIV_FRAC_START2_MODE2 0x0f882#define QSERDES_COM_VCO_TUNE_MINVAL2 0x0f883#define QSERDES_COM_DIV_FRAC_START3_MODE2 0x0fc84#define QSERDES_COM_CMN_RSVD4 0x0fc85#define QSERDES_COM_INTEGLOOP_INITVAL 0x10086#define QSERDES_COM_INTEGLOOP_EN 0x10487#define QSERDES_COM_INTEGLOOP_GAIN0_MODE0 0x10888#define QSERDES_COM_INTEGLOOP_GAIN1_MODE0 0x10c89#define QSERDES_COM_INTEGLOOP_GAIN0_MODE1 0x11090#define QSERDES_COM_INTEGLOOP_GAIN1_MODE1 0x11491#define QSERDES_COM_INTEGLOOP_GAIN0_MODE2 0x11892#define QSERDES_COM_VCO_TUNE_MAXVAL1 0x11893#define QSERDES_COM_INTEGLOOP_GAIN1_MODE2 0x11c94#define QSERDES_COM_VCO_TUNE_MAXVAL2 0x11c95#define QSERDES_COM_RES_TRIM_CONTROL2 0x12096#define QSERDES_COM_VCO_TUNE_CTRL 0x12497#define QSERDES_COM_VCO_TUNE_MAP 0x12898#define QSERDES_COM_VCO_TUNE1_MODE0 0x12c99#define QSERDES_COM_VCO_TUNE2_MODE0 0x130100#define QSERDES_COM_VCO_TUNE1_MODE1 0x134101#define QSERDES_COM_VCO_TUNE2_MODE1 0x138102#define QSERDES_COM_VCO_TUNE1_MODE2 0x13c103#define QSERDES_COM_VCO_TUNE_INITVAL1 0x13c104#define QSERDES_COM_VCO_TUNE2_MODE2 0x140105#define QSERDES_COM_VCO_TUNE_INITVAL2 0x140106#define QSERDES_COM_VCO_TUNE_TIMER1 0x144107#define QSERDES_COM_VCO_TUNE_TIMER2 0x148108#define QSERDES_COM_SAR 0x14c109#define QSERDES_COM_SAR_CLK 0x150110#define QSERDES_COM_SAR_CODE_OUT_STATUS 0x154111#define QSERDES_COM_SAR_CODE_READY_STATUS 0x158112#define QSERDES_COM_CMN_STATUS 0x15c113#define QSERDES_COM_RESET_SM_STATUS 0x160114#define QSERDES_COM_RESTRIM_CODE_STATUS 0x164115#define QSERDES_COM_PLLCAL_CODE1_STATUS 0x168116#define QSERDES_COM_PLLCAL_CODE2_STATUS 0x16c117#define QSERDES_COM_BG_CTRL 0x170118#define QSERDES_COM_CLK_SELECT 0x174119#define QSERDES_COM_HSCLK_SEL 0x178120#define QSERDES_COM_INTEGLOOP_BINCODE_STATUS 0x17c121#define QSERDES_COM_PLL_ANALOG 0x180122#define QSERDES_COM_CORECLK_DIV 0x184123#define QSERDES_COM_SW_RESET 0x188124#define QSERDES_COM_CORE_CLK_EN 0x18c125#define QSERDES_COM_C_READY_STATUS 0x190126#define QSERDES_COM_CMN_CONFIG 0x194127#define QSERDES_COM_CMN_RATE_OVERRIDE 0x198128#define QSERDES_COM_SVS_MODE_CLK_SEL 0x19c129#define QSERDES_COM_DEBUG_BUS0 0x1a0130#define QSERDES_COM_DEBUG_BUS1 0x1a4131#define QSERDES_COM_DEBUG_BUS2 0x1a8132#define QSERDES_COM_DEBUG_BUS3 0x1ac133#define QSERDES_COM_DEBUG_BUS_SEL 0x1b0134#define QSERDES_COM_CMN_MISC1 0x1b4135#define QSERDES_COM_CMN_MISC2 0x1b8136#define QSERDES_COM_CORECLK_DIV_MODE1 0x1bc137#define QSERDES_COM_CORECLK_DIV_MODE2 0x1c0138#define QSERDES_COM_CMN_RSVD5 0x1c4139 140#endif141