234 lines · c
1/* SPDX-License-Identifier: GPL-2.0 */2/*3 * Copyright (c) 2017, The Linux Foundation. All rights reserved.4 */5 6#ifndef QCOM_PHY_QMP_QSERDES_TXRX_V4_H_7#define QCOM_PHY_QMP_QSERDES_TXRX_V4_H_8 9/* Only for QMP V4 PHY - TX registers */10#define QSERDES_V4_TX_BIST_MODE_LANENO 0x00011#define QSERDES_V4_TX_BIST_INVERT 0x00412#define QSERDES_V4_TX_CLKBUF_ENABLE 0x00813#define QSERDES_V4_TX_TX_EMP_POST1_LVL 0x00c14#define QSERDES_V4_TX_TX_IDLE_LVL_LARGE_AMP 0x01015#define QSERDES_V4_TX_TX_DRV_LVL 0x01416#define QSERDES_V4_TX_TX_DRV_LVL_OFFSET 0x01817#define QSERDES_V4_TX_RESET_TSYNC_EN 0x01c18#define QSERDES_V4_TX_PRE_STALL_LDO_BOOST_EN 0x02019#define QSERDES_V4_TX_TX_BAND 0x02420#define QSERDES_V4_TX_SLEW_CNTL 0x02821#define QSERDES_V4_TX_INTERFACE_SELECT 0x02c22#define QSERDES_V4_TX_LPB_EN 0x03023#define QSERDES_V4_TX_RES_CODE_LANE_TX 0x03424#define QSERDES_V4_TX_RES_CODE_LANE_RX 0x03825#define QSERDES_V4_TX_RES_CODE_LANE_OFFSET_TX 0x03c26#define QSERDES_V4_TX_RES_CODE_LANE_OFFSET_RX 0x04027#define QSERDES_V4_TX_PERL_LENGTH1 0x04428#define QSERDES_V4_TX_PERL_LENGTH2 0x04829#define QSERDES_V4_TX_SERDES_BYP_EN_OUT 0x04c30#define QSERDES_V4_TX_DEBUG_BUS_SEL 0x05031#define QSERDES_V4_TX_TRANSCEIVER_BIAS_EN 0x05432#define QSERDES_V4_TX_HIGHZ_DRVR_EN 0x05833#define QSERDES_V4_TX_TX_POL_INV 0x05c34#define QSERDES_V4_TX_PARRATE_REC_DETECT_IDLE_EN 0x06035#define QSERDES_V4_TX_BIST_PATTERN1 0x06436#define QSERDES_V4_TX_BIST_PATTERN2 0x06837#define QSERDES_V4_TX_BIST_PATTERN3 0x06c38#define QSERDES_V4_TX_BIST_PATTERN4 0x07039#define QSERDES_V4_TX_BIST_PATTERN5 0x07440#define QSERDES_V4_TX_BIST_PATTERN6 0x07841#define QSERDES_V4_TX_BIST_PATTERN7 0x07c42#define QSERDES_V4_TX_BIST_PATTERN8 0x08043#define QSERDES_V4_TX_LANE_MODE_1 0x08444#define QSERDES_V4_TX_LANE_MODE_2 0x08845#define QSERDES_V4_TX_LANE_MODE_3 0x08c46#define QSERDES_V4_TX_ATB_SEL1 0x09047#define QSERDES_V4_TX_ATB_SEL2 0x09448#define QSERDES_V4_TX_RCV_DETECT_LVL 0x09849#define QSERDES_V4_TX_RCV_DETECT_LVL_2 0x09c50#define QSERDES_V4_TX_PRBS_SEED1 0x0a051#define QSERDES_V4_TX_PRBS_SEED2 0x0a452#define QSERDES_V4_TX_PRBS_SEED3 0x0a853#define QSERDES_V4_TX_PRBS_SEED4 0x0ac54#define QSERDES_V4_TX_RESET_GEN 0x0b055#define QSERDES_V4_TX_RESET_GEN_MUXES 0x0b456#define QSERDES_V4_TX_TRAN_DRVR_EMP_EN 0x0b857#define QSERDES_V4_TX_TX_INTERFACE_MODE 0x0bc58#define QSERDES_V4_TX_PWM_CTRL 0x0c059#define QSERDES_V4_TX_PWM_ENCODED_OR_DATA 0x0c460#define QSERDES_V4_TX_PWM_GEAR_1_DIVIDER_BAND2 0x0c861#define QSERDES_V4_TX_PWM_GEAR_2_DIVIDER_BAND2 0x0cc62#define QSERDES_V4_TX_PWM_GEAR_3_DIVIDER_BAND2 0x0d063#define QSERDES_V4_TX_PWM_GEAR_4_DIVIDER_BAND2 0x0d464#define QSERDES_V4_TX_PWM_GEAR_1_DIVIDER_BAND0_1 0x0d865#define QSERDES_V4_TX_PWM_GEAR_2_DIVIDER_BAND0_1 0x0dc66#define QSERDES_V4_TX_PWM_GEAR_3_DIVIDER_BAND0_1 0x0e067#define QSERDES_V4_TX_PWM_GEAR_4_DIVIDER_BAND0_1 0x0e468#define QSERDES_V4_TX_VMODE_CTRL1 0x0e869#define QSERDES_V4_TX_ALOG_OBSV_BUS_CTRL_1 0x0ec70#define QSERDES_V4_TX_BIST_STATUS 0x0f071#define QSERDES_V4_TX_BIST_ERROR_COUNT1 0x0f472#define QSERDES_V4_TX_BIST_ERROR_COUNT2 0x0f873#define QSERDES_V4_TX_ALOG_OBSV_BUS_STATUS_1 0x0fc74#define QSERDES_V4_TX_LANE_DIG_CONFIG 0x10075#define QSERDES_V4_TX_PI_QEC_CTRL 0x10476#define QSERDES_V4_TX_PRE_EMPH 0x10877#define QSERDES_V4_TX_SW_RESET 0x10c78#define QSERDES_V4_TX_DCC_OFFSET 0x11079#define QSERDES_V4_TX_DIG_BKUP_CTRL 0x11480#define QSERDES_V4_TX_DEBUG_BUS0 0x11881#define QSERDES_V4_TX_DEBUG_BUS1 0x11c82#define QSERDES_V4_TX_DEBUG_BUS2 0x12083#define QSERDES_V4_TX_DEBUG_BUS3 0x12484#define QSERDES_V4_TX_READ_EQCODE 0x12885#define QSERDES_V4_TX_READ_OFFSETCODE 0x12c86#define QSERDES_V4_TX_IA_ERROR_COUNTER_LOW 0x13087#define QSERDES_V4_TX_IA_ERROR_COUNTER_HIGH 0x13488#define QSERDES_V4_TX_VGA_READ_CODE 0x13889#define QSERDES_V4_TX_VTH_READ_CODE 0x13c90#define QSERDES_V4_TX_DFE_TAP1_READ_CODE 0x14091#define QSERDES_V4_TX_DFE_TAP2_READ_CODE 0x14492#define QSERDES_V4_TX_IDAC_STATUS_I 0x14893#define QSERDES_V4_TX_IDAC_STATUS_IBAR 0x14c94#define QSERDES_V4_TX_IDAC_STATUS_Q 0x15095#define QSERDES_V4_TX_IDAC_STATUS_QBAR 0x15496#define QSERDES_V4_TX_IDAC_STATUS_A 0x15897#define QSERDES_V4_TX_IDAC_STATUS_ABAR 0x15c98#define QSERDES_V4_TX_IDAC_STATUS_SM_ON 0x16099#define QSERDES_V4_TX_IDAC_STATUS_CAL_DONE 0x164100#define QSERDES_V4_TX_IDAC_STATUS_SIGNERROR 0x168101#define QSERDES_V4_TX_DCC_CAL_STATUS 0x16c102 103/* Only for QMP V4 PHY - RX registers */104#define QSERDES_V4_RX_UCDR_FO_GAIN_HALF 0x000105#define QSERDES_V4_RX_UCDR_FO_GAIN_QUARTER 0x004106#define QSERDES_V4_RX_UCDR_FO_GAIN 0x008107#define QSERDES_V4_RX_UCDR_SO_GAIN_HALF 0x00c108#define QSERDES_V4_RX_UCDR_SO_GAIN_QUARTER 0x010109#define QSERDES_V4_RX_UCDR_SO_GAIN 0x014110#define QSERDES_V4_RX_UCDR_SVS_FO_GAIN_HALF 0x018111#define QSERDES_V4_RX_UCDR_SVS_FO_GAIN_QUARTER 0x01c112#define QSERDES_V4_RX_UCDR_SVS_FO_GAIN 0x020113#define QSERDES_V4_RX_UCDR_SVS_SO_GAIN_HALF 0x024114#define QSERDES_V4_RX_UCDR_SVS_SO_GAIN_QUARTER 0x028115#define QSERDES_V4_RX_UCDR_SVS_SO_GAIN 0x02c116#define QSERDES_V4_RX_UCDR_FASTLOCK_FO_GAIN 0x030117#define QSERDES_V4_RX_UCDR_SO_SATURATION_AND_ENABLE 0x034118#define QSERDES_V4_RX_UCDR_FO_TO_SO_DELAY 0x038119#define QSERDES_V4_RX_UCDR_FASTLOCK_COUNT_LOW 0x03c120#define QSERDES_V4_RX_UCDR_FASTLOCK_COUNT_HIGH 0x040121#define QSERDES_V4_RX_UCDR_PI_CONTROLS 0x044122#define QSERDES_V4_RX_UCDR_PI_CTRL2 0x048123#define QSERDES_V4_RX_UCDR_SB2_THRESH1 0x04c124#define QSERDES_V4_RX_UCDR_SB2_THRESH2 0x050125#define QSERDES_V4_RX_UCDR_SB2_GAIN1 0x054126#define QSERDES_V4_RX_UCDR_SB2_GAIN2 0x058127#define QSERDES_V4_RX_AUX_CONTROL 0x05c128#define QSERDES_V4_RX_AUX_DATA_TCOARSE_TFINE 0x060129#define QSERDES_V4_RX_RCLK_AUXDATA_SEL 0x064130#define QSERDES_V4_RX_AC_JTAG_ENABLE 0x068131#define QSERDES_V4_RX_AC_JTAG_INITP 0x06c132#define QSERDES_V4_RX_AC_JTAG_INITN 0x070133#define QSERDES_V4_RX_AC_JTAG_LVL 0x074134#define QSERDES_V4_RX_AC_JTAG_MODE 0x078135#define QSERDES_V4_RX_AC_JTAG_RESET 0x07c136#define QSERDES_V4_RX_RX_TERM_BW 0x080137#define QSERDES_V4_RX_RX_RCVR_IQ_EN 0x084138#define QSERDES_V4_RX_RX_IDAC_I_DC_OFFSETS 0x088139#define QSERDES_V4_RX_RX_IDAC_IBAR_DC_OFFSETS 0x08c140#define QSERDES_V4_RX_RX_IDAC_Q_DC_OFFSETS 0x090141#define QSERDES_V4_RX_RX_IDAC_QBAR_DC_OFFSETS 0x094142#define QSERDES_V4_RX_RX_IDAC_A_DC_OFFSETS 0x098143#define QSERDES_V4_RX_RX_IDAC_ABAR_DC_OFFSETS 0x09c144#define QSERDES_V4_RX_RX_IDAC_EN 0x0a0145#define QSERDES_V4_RX_RX_IDAC_ENABLES 0x0a4146#define QSERDES_V4_RX_RX_IDAC_SIGN 0x0a8147#define QSERDES_V4_RX_RX_HIGHZ_HIGHRATE 0x0ac148#define QSERDES_V4_RX_RX_TERM_AC_BYPASS_DC_COUPLE_OFFSET 0x0b0149#define QSERDES_V4_RX_DFE_1 0x0b4150#define QSERDES_V4_RX_DFE_2 0x0b8151#define QSERDES_V4_RX_DFE_3 0x0bc152#define QSERDES_V4_RX_DFE_4 0x0c0153#define QSERDES_V4_RX_TX_ADAPT_PRE_THRESH1 0x0c4154#define QSERDES_V4_RX_TX_ADAPT_PRE_THRESH2 0x0c8155#define QSERDES_V4_RX_TX_ADAPT_POST_THRESH 0x0cc156#define QSERDES_V4_RX_TX_ADAPT_MAIN_THRESH 0x0d0157#define QSERDES_V4_RX_VGA_CAL_CNTRL1 0x0d4158#define QSERDES_V4_RX_VGA_CAL_CNTRL2 0x0d8159#define QSERDES_V4_RX_GM_CAL 0x0dc160#define QSERDES_V4_RX_RX_VGA_GAIN2_LSB 0x0e0161#define QSERDES_V4_RX_RX_VGA_GAIN2_MSB 0x0e4162#define QSERDES_V4_RX_RX_EQU_ADAPTOR_CNTRL1 0x0e8163#define QSERDES_V4_RX_RX_EQU_ADAPTOR_CNTRL2 0x0ec164#define QSERDES_V4_RX_RX_EQU_ADAPTOR_CNTRL3 0x0f0165#define QSERDES_V4_RX_RX_EQU_ADAPTOR_CNTRL4 0x0f4166#define QSERDES_V4_RX_RX_IDAC_TSETTLE_LOW 0x0f8167#define QSERDES_V4_RX_RX_IDAC_TSETTLE_HIGH 0x0fc168#define QSERDES_V4_RX_RX_IDAC_MEASURE_TIME 0x100169#define QSERDES_V4_RX_RX_IDAC_ACCUMULATOR 0x104170#define QSERDES_V4_RX_RX_EQ_OFFSET_LSB 0x108171#define QSERDES_V4_RX_RX_EQ_OFFSET_MSB 0x10c172#define QSERDES_V4_RX_RX_EQ_OFFSET_ADAPTOR_CNTRL1 0x110173#define QSERDES_V4_RX_RX_OFFSET_ADAPTOR_CNTRL2 0x114174#define QSERDES_V4_RX_SIGDET_ENABLES 0x118175#define QSERDES_V4_RX_SIGDET_CNTRL 0x11c176#define QSERDES_V4_RX_SIGDET_LVL 0x120177#define QSERDES_V4_RX_SIGDET_DEGLITCH_CNTRL 0x124178#define QSERDES_V4_RX_RX_BAND 0x128179#define QSERDES_V4_RX_CDR_FREEZE_UP_DN 0x12c180#define QSERDES_V4_RX_CDR_RESET_OVERRIDE 0x130181#define QSERDES_V4_RX_RX_INTERFACE_MODE 0x134182#define QSERDES_V4_RX_JITTER_GEN_MODE 0x138183#define QSERDES_V4_RX_SJ_AMP1 0x13c184#define QSERDES_V4_RX_SJ_AMP2 0x140185#define QSERDES_V4_RX_SJ_PER1 0x144186#define QSERDES_V4_RX_SJ_PER2 0x148187#define QSERDES_V4_RX_PPM_OFFSET1 0x14c188#define QSERDES_V4_RX_PPM_OFFSET2 0x150189#define QSERDES_V4_RX_SIGN_PPM_PERIOD1 0x154190#define QSERDES_V4_RX_SIGN_PPM_PERIOD2 0x158191#define QSERDES_V4_RX_RX_PWM_ENABLE_AND_DATA 0x15c192#define QSERDES_V4_RX_RX_PWM_GEAR1_TIMEOUT_COUNT 0x160193#define QSERDES_V4_RX_RX_PWM_GEAR2_TIMEOUT_COUNT 0x164194#define QSERDES_V4_RX_RX_PWM_GEAR3_TIMEOUT_COUNT 0x168195#define QSERDES_V4_RX_RX_PWM_GEAR4_TIMEOUT_COUNT 0x16c196#define QSERDES_V4_RX_RX_MODE_00_LOW 0x170197#define QSERDES_V4_RX_RX_MODE_00_HIGH 0x174198#define QSERDES_V4_RX_RX_MODE_00_HIGH2 0x178199#define QSERDES_V4_RX_RX_MODE_00_HIGH3 0x17c200#define QSERDES_V4_RX_RX_MODE_00_HIGH4 0x180201#define QSERDES_V4_RX_RX_MODE_01_LOW 0x184202#define QSERDES_V4_RX_RX_MODE_01_HIGH 0x188203#define QSERDES_V4_RX_RX_MODE_01_HIGH2 0x18c204#define QSERDES_V4_RX_RX_MODE_01_HIGH3 0x190205#define QSERDES_V4_RX_RX_MODE_01_HIGH4 0x194206#define QSERDES_V4_RX_RX_MODE_10_LOW 0x198207#define QSERDES_V4_RX_RX_MODE_10_HIGH 0x19c208#define QSERDES_V4_RX_RX_MODE_10_HIGH2 0x1a0209#define QSERDES_V4_RX_RX_MODE_10_HIGH3 0x1a4210#define QSERDES_V4_RX_RX_MODE_10_HIGH4 0x1a8211#define QSERDES_V4_RX_PHPRE_CTRL 0x1ac212#define QSERDES_V4_RX_PHPRE_INITVAL 0x1b0213#define QSERDES_V4_RX_DFE_EN_TIMER 0x1b4214#define QSERDES_V4_RX_DFE_CTLE_POST_CAL_OFFSET 0x1b8215#define QSERDES_V4_RX_DCC_CTRL1 0x1bc216#define QSERDES_V4_RX_DCC_CTRL2 0x1c0217#define QSERDES_V4_RX_VTH_CODE 0x1c4218#define QSERDES_V4_RX_VTH_MIN_THRESH 0x1c8219#define QSERDES_V4_RX_VTH_MAX_THRESH 0x1cc220#define QSERDES_V4_RX_ALOG_OBSV_BUS_CTRL_1 0x1d0221#define QSERDES_V4_RX_PI_CTRL1 0x1d4222#define QSERDES_V4_RX_PI_CTRL2 0x1d8223#define QSERDES_V4_RX_PI_QUAD 0x1dc224#define QSERDES_V4_RX_IDATA1 0x1e0225#define QSERDES_V4_RX_IDATA2 0x1e4226#define QSERDES_V4_RX_AUX_DATA1 0x1e8227#define QSERDES_V4_RX_AUX_DATA2 0x1ec228#define QSERDES_V4_RX_AC_JTAG_OUTP 0x1f0229#define QSERDES_V4_RX_AC_JTAG_OUTN 0x1f4230#define QSERDES_V4_RX_RX_SIGDET 0x1f8231#define QSERDES_V4_RX_ALOG_OBSV_BUS_STATUS_1 0x1fc232 233#endif234