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1/* SPDX-License-Identifier: GPL-2.0-only */2/*3 * Copyright (c) 2014-2022, NVIDIA CORPORATION. All rights reserved.4 * Copyright (c) 2015, Google Inc.5 */6 7#ifndef __PHY_TEGRA_XUSB_H8#define __PHY_TEGRA_XUSB_H9 10#include <linux/io.h>11#include <linux/iopoll.h>12#include <linux/mutex.h>13#include <linux/workqueue.h>14 15#include <linux/usb/ch9.h>16#include <linux/usb/otg.h>17#include <linux/usb/role.h>18 19/* legacy entry points for backwards-compatibility */20int tegra_xusb_padctl_legacy_probe(struct platform_device *pdev);21int tegra_xusb_padctl_legacy_remove(struct platform_device *pdev);22 23struct phy;24struct phy_provider;25struct platform_device;26struct regulator;27 28/*29 * lanes30 */31struct tegra_xusb_lane_soc {32 const char *name;33 34 unsigned int offset;35 unsigned int shift;36 unsigned int mask;37 38 const char * const *funcs;39 unsigned int num_funcs;40 41 struct {42 unsigned int misc_ctl2;43 } regs;44};45 46struct tegra_xusb_lane {47 const struct tegra_xusb_lane_soc *soc;48 struct tegra_xusb_pad *pad;49 struct device_node *np;50 struct list_head list;51 unsigned int function;52 unsigned int index;53};54 55int tegra_xusb_lane_parse_dt(struct tegra_xusb_lane *lane,56 struct device_node *np);57 58struct tegra_xusb_usb3_lane {59 struct tegra_xusb_lane base;60};61 62static inline struct tegra_xusb_usb3_lane *63to_usb3_lane(struct tegra_xusb_lane *lane)64{65 return container_of(lane, struct tegra_xusb_usb3_lane, base);66}67 68struct tegra_xusb_usb2_lane {69 struct tegra_xusb_lane base;70 71 u32 hs_curr_level_offset;72 bool powered_on;73};74 75static inline struct tegra_xusb_usb2_lane *76to_usb2_lane(struct tegra_xusb_lane *lane)77{78 return container_of(lane, struct tegra_xusb_usb2_lane, base);79}80 81struct tegra_xusb_ulpi_lane {82 struct tegra_xusb_lane base;83};84 85static inline struct tegra_xusb_ulpi_lane *86to_ulpi_lane(struct tegra_xusb_lane *lane)87{88 return container_of(lane, struct tegra_xusb_ulpi_lane, base);89}90 91struct tegra_xusb_hsic_lane {92 struct tegra_xusb_lane base;93 94 u32 strobe_trim;95 u32 rx_strobe_trim;96 u32 rx_data_trim;97 u32 tx_rtune_n;98 u32 tx_rtune_p;99 u32 tx_rslew_n;100 u32 tx_rslew_p;101 bool auto_term;102};103 104static inline struct tegra_xusb_hsic_lane *105to_hsic_lane(struct tegra_xusb_lane *lane)106{107 return container_of(lane, struct tegra_xusb_hsic_lane, base);108}109 110struct tegra_xusb_pcie_lane {111 struct tegra_xusb_lane base;112};113 114static inline struct tegra_xusb_pcie_lane *115to_pcie_lane(struct tegra_xusb_lane *lane)116{117 return container_of(lane, struct tegra_xusb_pcie_lane, base);118}119 120struct tegra_xusb_sata_lane {121 struct tegra_xusb_lane base;122};123 124static inline struct tegra_xusb_sata_lane *125to_sata_lane(struct tegra_xusb_lane *lane)126{127 return container_of(lane, struct tegra_xusb_sata_lane, base);128}129 130struct tegra_xusb_lane_ops {131 struct tegra_xusb_lane *(*probe)(struct tegra_xusb_pad *pad,132 struct device_node *np,133 unsigned int index);134 void (*remove)(struct tegra_xusb_lane *lane);135 void (*iddq_enable)(struct tegra_xusb_lane *lane);136 void (*iddq_disable)(struct tegra_xusb_lane *lane);137 int (*enable_phy_sleepwalk)(struct tegra_xusb_lane *lane, enum usb_device_speed speed);138 int (*disable_phy_sleepwalk)(struct tegra_xusb_lane *lane);139 int (*enable_phy_wake)(struct tegra_xusb_lane *lane);140 int (*disable_phy_wake)(struct tegra_xusb_lane *lane);141 bool (*remote_wake_detected)(struct tegra_xusb_lane *lane);142};143 144bool tegra_xusb_lane_check(struct tegra_xusb_lane *lane, const char *function);145 146/*147 * pads148 */149struct tegra_xusb_pad_soc;150struct tegra_xusb_padctl;151 152struct tegra_xusb_pad_ops {153 struct tegra_xusb_pad *(*probe)(struct tegra_xusb_padctl *padctl,154 const struct tegra_xusb_pad_soc *soc,155 struct device_node *np);156 void (*remove)(struct tegra_xusb_pad *pad);157};158 159struct tegra_xusb_pad_soc {160 const char *name;161 162 const struct tegra_xusb_lane_soc *lanes;163 unsigned int num_lanes;164 165 const struct tegra_xusb_pad_ops *ops;166};167 168struct tegra_xusb_pad {169 const struct tegra_xusb_pad_soc *soc;170 struct tegra_xusb_padctl *padctl;171 struct phy_provider *provider;172 struct phy **lanes;173 struct device dev;174 175 const struct tegra_xusb_lane_ops *ops;176 177 struct list_head list;178};179 180static inline struct tegra_xusb_pad *to_tegra_xusb_pad(struct device *dev)181{182 return container_of(dev, struct tegra_xusb_pad, dev);183}184 185int tegra_xusb_pad_init(struct tegra_xusb_pad *pad,186 struct tegra_xusb_padctl *padctl,187 struct device_node *np);188int tegra_xusb_pad_register(struct tegra_xusb_pad *pad,189 const struct phy_ops *ops);190void tegra_xusb_pad_unregister(struct tegra_xusb_pad *pad);191 192struct tegra_xusb_usb3_pad {193 struct tegra_xusb_pad base;194 195 unsigned int enable;196 struct mutex lock;197};198 199static inline struct tegra_xusb_usb3_pad *200to_usb3_pad(struct tegra_xusb_pad *pad)201{202 return container_of(pad, struct tegra_xusb_usb3_pad, base);203}204 205struct tegra_xusb_usb2_pad {206 struct tegra_xusb_pad base;207 208 struct clk *clk;209 unsigned int enable;210 struct mutex lock;211};212 213static inline struct tegra_xusb_usb2_pad *214to_usb2_pad(struct tegra_xusb_pad *pad)215{216 return container_of(pad, struct tegra_xusb_usb2_pad, base);217}218 219struct tegra_xusb_ulpi_pad {220 struct tegra_xusb_pad base;221};222 223static inline struct tegra_xusb_ulpi_pad *224to_ulpi_pad(struct tegra_xusb_pad *pad)225{226 return container_of(pad, struct tegra_xusb_ulpi_pad, base);227}228 229struct tegra_xusb_hsic_pad {230 struct tegra_xusb_pad base;231 232 struct regulator *supply;233 struct clk *clk;234};235 236static inline struct tegra_xusb_hsic_pad *237to_hsic_pad(struct tegra_xusb_pad *pad)238{239 return container_of(pad, struct tegra_xusb_hsic_pad, base);240}241 242struct tegra_xusb_pcie_pad {243 struct tegra_xusb_pad base;244 245 struct reset_control *rst;246 struct clk *pll;247 248 bool enable;249};250 251static inline struct tegra_xusb_pcie_pad *252to_pcie_pad(struct tegra_xusb_pad *pad)253{254 return container_of(pad, struct tegra_xusb_pcie_pad, base);255}256 257struct tegra_xusb_sata_pad {258 struct tegra_xusb_pad base;259 260 struct reset_control *rst;261 struct clk *pll;262 263 bool enable;264};265 266static inline struct tegra_xusb_sata_pad *267to_sata_pad(struct tegra_xusb_pad *pad)268{269 return container_of(pad, struct tegra_xusb_sata_pad, base);270}271 272/*273 * ports274 */275struct tegra_xusb_port_ops;276 277struct tegra_xusb_port {278 struct tegra_xusb_padctl *padctl;279 struct tegra_xusb_lane *lane;280 unsigned int index;281 282 struct list_head list;283 struct device dev;284 285 struct usb_role_switch *usb_role_sw;286 struct work_struct usb_phy_work;287 struct usb_phy usb_phy;288 289 const struct tegra_xusb_port_ops *ops;290};291 292static inline struct tegra_xusb_port *to_tegra_xusb_port(struct device *dev)293{294 return container_of(dev, struct tegra_xusb_port, dev);295}296 297struct tegra_xusb_lane_map {298 unsigned int port;299 const char *type;300 unsigned int index;301 const char *func;302};303 304struct tegra_xusb_lane *305tegra_xusb_port_find_lane(struct tegra_xusb_port *port,306 const struct tegra_xusb_lane_map *map,307 const char *function);308 309struct tegra_xusb_port *310tegra_xusb_find_port(struct tegra_xusb_padctl *padctl, const char *type,311 unsigned int index);312 313struct tegra_xusb_usb2_port {314 struct tegra_xusb_port base;315 316 struct regulator *supply;317 enum usb_dr_mode mode;318 bool internal;319 int usb3_port_fake;320};321 322static inline struct tegra_xusb_usb2_port *323to_usb2_port(struct tegra_xusb_port *port)324{325 return container_of(port, struct tegra_xusb_usb2_port, base);326}327 328struct tegra_xusb_usb2_port *329tegra_xusb_find_usb2_port(struct tegra_xusb_padctl *padctl,330 unsigned int index);331void tegra_xusb_usb2_port_release(struct tegra_xusb_port *port);332void tegra_xusb_usb2_port_remove(struct tegra_xusb_port *port);333 334struct tegra_xusb_ulpi_port {335 struct tegra_xusb_port base;336 337 struct regulator *supply;338 bool internal;339};340 341static inline struct tegra_xusb_ulpi_port *342to_ulpi_port(struct tegra_xusb_port *port)343{344 return container_of(port, struct tegra_xusb_ulpi_port, base);345}346 347void tegra_xusb_ulpi_port_release(struct tegra_xusb_port *port);348 349struct tegra_xusb_hsic_port {350 struct tegra_xusb_port base;351};352 353static inline struct tegra_xusb_hsic_port *354to_hsic_port(struct tegra_xusb_port *port)355{356 return container_of(port, struct tegra_xusb_hsic_port, base);357}358 359void tegra_xusb_hsic_port_release(struct tegra_xusb_port *port);360 361struct tegra_xusb_usb3_port {362 struct tegra_xusb_port base;363 bool context_saved;364 unsigned int port;365 bool internal;366 bool disable_gen2;367 368 u32 tap1;369 u32 amp;370 u32 ctle_z;371 u32 ctle_g;372};373 374static inline struct tegra_xusb_usb3_port *375to_usb3_port(struct tegra_xusb_port *port)376{377 return container_of(port, struct tegra_xusb_usb3_port, base);378}379 380struct tegra_xusb_usb3_port *381tegra_xusb_find_usb3_port(struct tegra_xusb_padctl *padctl,382 unsigned int index);383void tegra_xusb_usb3_port_release(struct tegra_xusb_port *port);384 385struct tegra_xusb_port_ops {386 void (*release)(struct tegra_xusb_port *port);387 void (*remove)(struct tegra_xusb_port *port);388 int (*enable)(struct tegra_xusb_port *port);389 void (*disable)(struct tegra_xusb_port *port);390 struct tegra_xusb_lane *(*map)(struct tegra_xusb_port *port);391};392 393/*394 * pad controller395 */396struct tegra_xusb_padctl_soc;397 398struct tegra_xusb_padctl_ops {399 struct tegra_xusb_padctl *400 (*probe)(struct device *dev,401 const struct tegra_xusb_padctl_soc *soc);402 void (*remove)(struct tegra_xusb_padctl *padctl);403 404 int (*suspend_noirq)(struct tegra_xusb_padctl *padctl);405 int (*resume_noirq)(struct tegra_xusb_padctl *padctl);406 int (*usb3_save_context)(struct tegra_xusb_padctl *padctl,407 unsigned int index);408 int (*hsic_set_idle)(struct tegra_xusb_padctl *padctl,409 unsigned int index, bool idle);410 int (*usb3_set_lfps_detect)(struct tegra_xusb_padctl *padctl,411 unsigned int index, bool enable);412 int (*vbus_override)(struct tegra_xusb_padctl *padctl, bool set);413 int (*utmi_port_reset)(struct phy *phy);414 void (*utmi_pad_power_on)(struct phy *phy);415 void (*utmi_pad_power_down)(struct phy *phy);416};417 418struct tegra_xusb_padctl_soc {419 const struct tegra_xusb_pad_soc * const *pads;420 unsigned int num_pads;421 422 struct {423 struct {424 const struct tegra_xusb_port_ops *ops;425 unsigned int count;426 } usb2, ulpi, hsic, usb3;427 } ports;428 429 const struct tegra_xusb_padctl_ops *ops;430 431 const char * const *supply_names;432 unsigned int num_supplies;433 bool supports_gen2;434 bool need_fake_usb3_port;435 bool poll_trk_completed;436 bool trk_hw_mode;437 bool supports_lp_cfg_en;438};439 440struct tegra_xusb_padctl {441 struct device *dev;442 void __iomem *regs;443 struct mutex lock;444 struct reset_control *rst;445 446 const struct tegra_xusb_padctl_soc *soc;447 448 struct tegra_xusb_pad *pcie;449 struct tegra_xusb_pad *sata;450 struct tegra_xusb_pad *ulpi;451 struct tegra_xusb_pad *usb2;452 struct tegra_xusb_pad *hsic;453 454 struct list_head ports;455 struct list_head lanes;456 struct list_head pads;457 458 unsigned int enable;459 460 struct clk *clk;461 462 struct regulator_bulk_data *supplies;463};464 465static inline void padctl_writel(struct tegra_xusb_padctl *padctl, u32 value,466 unsigned long offset)467{468 dev_dbg(padctl->dev, "%08lx < %08x\n", offset, value);469 writel(value, padctl->regs + offset);470}471 472static inline u32 padctl_readl(struct tegra_xusb_padctl *padctl,473 unsigned long offset)474{475 u32 value = readl(padctl->regs + offset);476 dev_dbg(padctl->dev, "%08lx > %08x\n", offset, value);477 return value;478}479 480static inline u32 padctl_readl_poll(struct tegra_xusb_padctl *padctl,481 unsigned long offset, u32 val, u32 mask,482 int us)483{484 u32 regval;485 int err;486 487 err = readl_poll_timeout(padctl->regs + offset, regval,488 (regval & mask) == val, 1, us);489 if (err) {490 dev_err(padctl->dev, "%08lx poll timeout > %08x\n", offset,491 regval);492 }493 494 return err;495}496 497struct tegra_xusb_lane *tegra_xusb_find_lane(struct tegra_xusb_padctl *padctl,498 const char *name,499 unsigned int index);500 501#if defined(CONFIG_ARCH_TEGRA_124_SOC) || defined(CONFIG_ARCH_TEGRA_132_SOC)502extern const struct tegra_xusb_padctl_soc tegra124_xusb_padctl_soc;503#endif504#if defined(CONFIG_ARCH_TEGRA_210_SOC)505extern const struct tegra_xusb_padctl_soc tegra210_xusb_padctl_soc;506#endif507#if defined(CONFIG_ARCH_TEGRA_186_SOC)508extern const struct tegra_xusb_padctl_soc tegra186_xusb_padctl_soc;509#endif510#if defined(CONFIG_ARCH_TEGRA_194_SOC)511extern const struct tegra_xusb_padctl_soc tegra194_xusb_padctl_soc;512#endif513#if defined(CONFIG_ARCH_TEGRA_234_SOC)514extern const struct tegra_xusb_padctl_soc tegra234_xusb_padctl_soc;515#endif516 517#endif /* __PHY_TEGRA_XUSB_H */518