1235 lines · c
1// SPDX-License-Identifier: (GPL-2.0+ OR MIT)2/*3 * Pin controller and GPIO driver for Amlogic Meson S4 SoC.4 *5 * Copyright (c) 2021 Amlogic, Inc. All rights reserved.6 * Author: Qianggui Song <qianggui.song@amlogic.com>7 */8 9#include <dt-bindings/gpio/meson-s4-gpio.h>10#include "pinctrl-meson.h"11#include "pinctrl-meson-axg-pmx.h"12 13static const struct pinctrl_pin_desc meson_s4_periphs_pins[] = {14 MESON_PIN(GPIOE_0),15 MESON_PIN(GPIOE_1),16 17 MESON_PIN(GPIOB_0),18 MESON_PIN(GPIOB_1),19 MESON_PIN(GPIOB_2),20 MESON_PIN(GPIOB_3),21 MESON_PIN(GPIOB_4),22 MESON_PIN(GPIOB_5),23 MESON_PIN(GPIOB_6),24 MESON_PIN(GPIOB_7),25 MESON_PIN(GPIOB_8),26 MESON_PIN(GPIOB_9),27 MESON_PIN(GPIOB_10),28 MESON_PIN(GPIOB_11),29 MESON_PIN(GPIOB_12),30 MESON_PIN(GPIOB_13),31 32 MESON_PIN(GPIOC_0),33 MESON_PIN(GPIOC_1),34 MESON_PIN(GPIOC_2),35 MESON_PIN(GPIOC_3),36 MESON_PIN(GPIOC_4),37 MESON_PIN(GPIOC_5),38 MESON_PIN(GPIOC_6),39 MESON_PIN(GPIOC_7),40 41 MESON_PIN(GPIOD_0),42 MESON_PIN(GPIOD_1),43 MESON_PIN(GPIOD_2),44 MESON_PIN(GPIOD_3),45 MESON_PIN(GPIOD_4),46 MESON_PIN(GPIOD_5),47 MESON_PIN(GPIOD_6),48 MESON_PIN(GPIOD_7),49 MESON_PIN(GPIOD_8),50 MESON_PIN(GPIOD_9),51 MESON_PIN(GPIOD_10),52 MESON_PIN(GPIOD_11),53 54 MESON_PIN(GPIOH_0),55 MESON_PIN(GPIOH_1),56 MESON_PIN(GPIOH_2),57 MESON_PIN(GPIOH_3),58 MESON_PIN(GPIOH_4),59 MESON_PIN(GPIOH_5),60 MESON_PIN(GPIOH_6),61 MESON_PIN(GPIOH_7),62 MESON_PIN(GPIOH_8),63 MESON_PIN(GPIOH_9),64 MESON_PIN(GPIOH_10),65 MESON_PIN(GPIOH_11),66 67 MESON_PIN(GPIOX_0),68 MESON_PIN(GPIOX_1),69 MESON_PIN(GPIOX_2),70 MESON_PIN(GPIOX_3),71 MESON_PIN(GPIOX_4),72 MESON_PIN(GPIOX_5),73 MESON_PIN(GPIOX_6),74 MESON_PIN(GPIOX_7),75 MESON_PIN(GPIOX_8),76 MESON_PIN(GPIOX_9),77 MESON_PIN(GPIOX_10),78 MESON_PIN(GPIOX_11),79 MESON_PIN(GPIOX_12),80 MESON_PIN(GPIOX_13),81 MESON_PIN(GPIOX_14),82 MESON_PIN(GPIOX_15),83 MESON_PIN(GPIOX_16),84 MESON_PIN(GPIOX_17),85 MESON_PIN(GPIOX_18),86 MESON_PIN(GPIOX_19),87 88 MESON_PIN(GPIOZ_0),89 MESON_PIN(GPIOZ_1),90 MESON_PIN(GPIOZ_2),91 MESON_PIN(GPIOZ_3),92 MESON_PIN(GPIOZ_4),93 MESON_PIN(GPIOZ_5),94 MESON_PIN(GPIOZ_6),95 MESON_PIN(GPIOZ_7),96 MESON_PIN(GPIOZ_8),97 MESON_PIN(GPIOZ_9),98 MESON_PIN(GPIOZ_10),99 MESON_PIN(GPIOZ_11),100 MESON_PIN(GPIOZ_12),101 102 MESON_PIN(GPIO_TEST_N),103};104 105/* BANK E func1 */106static const unsigned int i2c0_sda_pins[] = { GPIOE_0 };107static const unsigned int i2c0_scl_pins[] = { GPIOE_1 };108 109/* BANK E func2 */110static const unsigned int uart_b_tx_e_pins[] = { GPIOE_0 };111static const unsigned int uart_b_rx_e_pins[] = { GPIOE_1 };112 113/* BANK E func3 */114static const unsigned int pwm_h_pins[] = { GPIOE_0 };115static const unsigned int pwm_j_pins[] = { GPIOE_1 };116 117/* BANK B func1 */118static const unsigned int emmc_nand_d0_pins[] = { GPIOB_0 };119static const unsigned int emmc_nand_d1_pins[] = { GPIOB_1 };120static const unsigned int emmc_nand_d2_pins[] = { GPIOB_2 };121static const unsigned int emmc_nand_d3_pins[] = { GPIOB_3 };122static const unsigned int emmc_nand_d4_pins[] = { GPIOB_4 };123static const unsigned int emmc_nand_d5_pins[] = { GPIOB_5 };124static const unsigned int emmc_nand_d6_pins[] = { GPIOB_6 };125static const unsigned int emmc_nand_d7_pins[] = { GPIOB_7 };126static const unsigned int emmc_clk_pins[] = { GPIOB_8 };127static const unsigned int emmc_rst_pins[] = { GPIOB_9 };128static const unsigned int emmc_cmd_pins[] = { GPIOB_10 };129static const unsigned int emmc_nand_ds_pins[] = { GPIOB_11 };130 131/* Bank B func2 */132static const unsigned int nand_wen_clk_pins[] = { GPIOB_8 };133static const unsigned int nand_ale_pins[] = { GPIOB_9 };134static const unsigned int nand_ren_wr_pins[] = { GPIOB_10 };135static const unsigned int nand_cle_pins[] = { GPIOB_11 };136static const unsigned int nand_ce0_pins[] = { GPIOB_12 };137 138/* Bank B func3 */139static const unsigned int spif_hold_pins[] = { GPIOB_3 };140static const unsigned int spif_mo_pins[] = { GPIOB_4 };141static const unsigned int spif_mi_pins[] = { GPIOB_5 };142static const unsigned int spif_clk_pins[] = { GPIOB_6 };143static const unsigned int spif_wp_pins[] = { GPIOB_7 };144static const unsigned int spif_cs_pins[] = { GPIOB_13 };145 146/* Bank C func1 */147static const unsigned int sdcard_d0_c_pins[] = { GPIOC_0 };148static const unsigned int sdcard_d1_c_pins[] = { GPIOC_1 };149static const unsigned int sdcard_d2_c_pins[] = { GPIOC_2 };150static const unsigned int sdcard_d3_c_pins[] = { GPIOC_3 };151static const unsigned int sdcard_clk_c_pins[] = { GPIOC_4 };152static const unsigned int sdcard_cmd_c_pins[] = { GPIOC_5 };153static const unsigned int sdcard_cd_pins[] = { GPIOC_6 };154 155/* Bank C func2 */156static const unsigned int jtag_2_tdo_pins[] = { GPIOC_0 };157static const unsigned int jtag_2_tdi_pins[] = { GPIOC_1 };158static const unsigned int uart_b_rx_c_pins[] = { GPIOC_2 };159static const unsigned int uart_b_tx_c_pins[] = { GPIOC_3 };160static const unsigned int jtag_2_clk_pins[] = { GPIOC_4 };161static const unsigned int jtag_2_tms_pins[] = { GPIOC_5 };162static const unsigned int i2c1_sda_c_pins[] = { GPIOC_6 };163static const unsigned int i2c1_scl_c_pins[] = { GPIOC_7 };164 165/* Bank C func3 */166static const unsigned int pdm_din1_c_pins[] = { GPIOC_0 };167static const unsigned int pdm_din0_c_pins[] = { GPIOC_1 };168static const unsigned int i2c4_sda_c_pins[] = { GPIOC_2 };169static const unsigned int i2c4_scl_c_pins[] = { GPIOC_3 };170static const unsigned int pdm_dclk_c_pins[] = { GPIOC_4 };171static const unsigned int iso7816_clk_c_pins[] = { GPIOC_5 };172static const unsigned int iso7816_data_c_pins[] = { GPIOC_6 };173 174/* Bank C func4 */175static const unsigned int tdm_d2_c_pins[] = { GPIOC_0 };176static const unsigned int tdm_d3_c_pins[] = { GPIOC_1 };177static const unsigned int tdm_fs1_c_pins[] = { GPIOC_2 };178static const unsigned int tdm_sclk1_c_pins[] = { GPIOC_3 };179static const unsigned int mclk_1_c_pins[] = { GPIOC_4 };180static const unsigned int tdm_d4_c_pins[] = { GPIOC_5 };181static const unsigned int tdm_d5_c_pins[] = { GPIOC_6 };182 183/* Bank D func1 */184static const unsigned int uart_b_tx_d_pins[] = { GPIOD_0 };185static const unsigned int uart_b_rx_d_pins[] = { GPIOD_1 };186static const unsigned int uart_b_cts_d_pins[] = { GPIOD_2 };187static const unsigned int uart_b_rts_d_pins[] = { GPIOD_3 };188static const unsigned int remote_out_pins[] = { GPIOD_4 };189static const unsigned int remote_in_pins[] = { GPIOD_5 };190static const unsigned int jtag_1_clk_pins[] = { GPIOD_6 };191static const unsigned int jtag_1_tms_pins[] = { GPIOD_7 };192static const unsigned int jtag_1_tdi_pins[] = { GPIOD_8 };193static const unsigned int jtag_1_tdo_pins[] = { GPIOD_9 };194static const unsigned int clk12_24_pins[] = { GPIOD_10 };195static const unsigned int pwm_g_hiz_pins[] = { GPIOD_11 };196 197/* Bank D func2 */198static const unsigned int i2c4_sda_d_pins[] = { GPIOD_2 };199static const unsigned int i2c4_scl_d_pins[] = { GPIOD_3 };200static const unsigned int mclk_1_d_pins[] = { GPIOD_4 };201static const unsigned int tdm_sclk1_d_pins[] = { GPIOD_6 };202static const unsigned int tdm_fs1_d_pins[] = { GPIOD_7 };203static const unsigned int tdm_d4_d_pins[] = { GPIOD_8 };204static const unsigned int tdm_d3_d_pins[] = { GPIOD_9 };205static const unsigned int tdm_d2_d_pins[] = { GPIOD_10 };206static const unsigned int pwm_g_d_pins[] = { GPIOD_11 };207 208/* Bank D func3 */209static const unsigned int uart_c_tx_pins[] = { GPIOD_2 };210static const unsigned int uart_c_rx_pins[] = { GPIOD_3 };211static const unsigned int pwm_b_d_pins[] = { GPIOD_4 };212static const unsigned int pwm_a_d_pins[] = { GPIOD_6 };213static const unsigned int pwm_c_d_pins[] = { GPIOD_7 };214static const unsigned int pwm_d_d_pins[] = { GPIOD_8 };215static const unsigned int pwm_i_d_pins[] = { GPIOD_9 };216 217/* Bank D func4 */218static const unsigned int clk_32k_in_pins[] = { GPIOD_2 };219static const unsigned int pwm_b_hiz_pins[] = { GPIOD_4 };220static const unsigned int pwm_a_hiz_pins[] = { GPIOD_6 };221static const unsigned int pwm_c_hiz_pins[] = { GPIOD_7 };222static const unsigned int pdm_dclk_d_pins[] = { GPIOD_8 };223static const unsigned int pdm_din0_d_pins[] = { GPIOD_9 };224static const unsigned int pdm_din1_d_pins[] = { GPIOD_10 };225 226/* Bank D func5 */227static const unsigned int mic_mute_en_pins[] = { GPIOD_2 };228static const unsigned int mic_mute_key_pins[] = { GPIOD_3 };229static const unsigned int i2c1_sda_d_pins[] = { GPIOD_6 };230static const unsigned int i2c1_scl_d_pins[] = { GPIOD_7 };231static const unsigned int i2c2_sda_d_pins[] = { GPIOD_10 };232static const unsigned int i2c2_scl_d_pins[] = { GPIOD_11 };233 234/* Bank D func6 */235static const unsigned int gen_clk_d_pins[] = { GPIOD_10 };236static const unsigned int tsin_b_clk_c_pins[] = { GPIOD_6 };237static const unsigned int tsin_b_sop_c_pins[] = { GPIOD_7 };238static const unsigned int tsin_b_valid_c_pins[] = { GPIOD_8 };239static const unsigned int tsin_b_d0_c_pins[] = { GPIOD_9 };240 241/* Bank H func1 */242static const unsigned int hdmitx_sda_pins[] = { GPIOH_0 };243static const unsigned int hdmitx_sck_pins[] = { GPIOH_1 };244static const unsigned int hdmitx_hpd_in_pins[] = { GPIOH_2 };245static const unsigned int ao_cec_a_pins[] = { GPIOH_3 };246static const unsigned int spdif_out_h_pins[] = { GPIOH_4 };247static const unsigned int spdif_in_pins[] = { GPIOH_5 };248static const unsigned int i2c1_sda_h_pins[] = { GPIOH_6 };249static const unsigned int i2c1_scl_h_pins[] = { GPIOH_7 };250static const unsigned int i2c2_sda_h8_pins[] = { GPIOH_8 };251static const unsigned int i2c2_scl_h9_pins[] = { GPIOH_9 };252static const unsigned int eth_link_led_pins[] = { GPIOH_10 };253static const unsigned int eth_act_led_pins[] = { GPIOH_11 };254 255/* Bank H func2 */256static const unsigned int i2c2_sda_h0_pins[] = { GPIOH_0 };257static const unsigned int i2c2_scl_h1_pins[] = { GPIOH_1 };258static const unsigned int ao_cec_b_pins[] = { GPIOH_3 };259static const unsigned int uart_d_tx_h_pins[] = { GPIOH_4 };260static const unsigned int uart_d_rx_h_pins[] = { GPIOH_5 };261static const unsigned int uart_d_cts_h_pins[] = { GPIOH_6 };262static const unsigned int uart_d_rts_h_pins[] = { GPIOH_7 };263static const unsigned int iso7816_clk_h_pins[] = { GPIOH_8 };264static const unsigned int iso7816_data_h_pins[] = { GPIOH_9 };265static const unsigned int uart_e_tx_h_pins[] = { GPIOH_10 };266static const unsigned int uart_e_rx_h_pins[] = { GPIOH_11 };267 268/* Bank H func3 */269static const unsigned int pwm_d_h_pins[] = { GPIOH_6 };270static const unsigned int pwm_i_h_pins[] = { GPIOH_7 };271static const unsigned int pdm_dclk_h_pins[] = { GPIOH_8 };272static const unsigned int pdm_din0_h_pins[] = { GPIOH_9 };273static const unsigned int pdm_din1_h_pins[] = { GPIOH_10 };274 275/* Bank H func4 */276static const unsigned int mclk_1_h_pins[] = { GPIOH_4 };277static const unsigned int tdm_sclk1_h_pins[] = { GPIOH_5 };278static const unsigned int tdm_fs1_h_pins[] = { GPIOH_6 };279static const unsigned int tdm_d2_h_pins[] = { GPIOH_7 };280static const unsigned int tdm_d3_h_pins[] = { GPIOH_8 };281static const unsigned int tdm_d4_h_pins[] = { GPIOH_9 };282 283/* Bank H func5 */284static const unsigned int spi_a_miso_h_pins[] = { GPIOH_4 };285static const unsigned int spi_a_mosi_h_pins[] = { GPIOH_5 };286static const unsigned int spi_a_clk_h_pins[] = { GPIOH_6 };287static const unsigned int spi_a_ss0_h_pins[] = { GPIOH_7 };288 289/* Bank H func6 */290static const unsigned int gen_clk_h_pins[] = { GPIOH_11 };291static const unsigned int tsin_b1_clk_pins[] = { GPIOH_4 };292static const unsigned int tsin_b1_sop_pins[] = { GPIOH_5 };293static const unsigned int tsin_b1_valid_pins[] = { GPIOH_6 };294static const unsigned int tsin_b1_d0_pins[] = { GPIOH_7 };295 296/* Bank X func1 */297static const unsigned int sdio_d0_pins[] = { GPIOX_0 };298static const unsigned int sdio_d1_pins[] = { GPIOX_1 };299static const unsigned int sdio_d2_pins[] = { GPIOX_2 };300static const unsigned int sdio_d3_pins[] = { GPIOX_3 };301static const unsigned int sdio_clk_pins[] = { GPIOX_4 };302static const unsigned int sdio_cmd_pins[] = { GPIOX_5 };303static const unsigned int pwm_a_x_pins[] = { GPIOX_6 };304static const unsigned int pwm_f_x_pins[] = { GPIOX_7 };305static const unsigned int tdm_d1_pins[] = { GPIOX_8 };306static const unsigned int tdm_d0_pins[] = { GPIOX_9 };307static const unsigned int tdm_fs0_pins[] = { GPIOX_10 };308static const unsigned int tdm_sclk0_pins[] = { GPIOX_11 };309static const unsigned int uart_a_tx_pins[] = { GPIOX_12 };310static const unsigned int uart_a_rx_pins[] = { GPIOX_13 };311static const unsigned int uart_a_cts_pins[] = { GPIOX_14 };312static const unsigned int uart_a_rts_pins[] = { GPIOX_15 };313static const unsigned int pwm_e_x_pins[] = { GPIOX_16 };314static const unsigned int i2c1_sda_x_pins[] = { GPIOX_17 };315static const unsigned int i2c1_scl_x_pins[] = { GPIOX_18 };316static const unsigned int pwm_b_x_pins[] = { GPIOX_19 };317 318/* Bank X func2 */319static const unsigned int pdm_din0_x_pins[] = { GPIOX_8 };320static const unsigned int pdm_din1_x_pins[] = { GPIOX_9 };321static const unsigned int pdm_dclk_x_pins[] = { GPIOX_11 };322 323/* Bank X func3 */324static const unsigned int spi_a_mosi_x_pins[] = { GPIOX_8 };325static const unsigned int spi_a_miso_x_pins[] = { GPIOX_9 };326static const unsigned int spi_a_ss0_x_pins[] = { GPIOX_10 };327static const unsigned int spi_a_clk_x_pins[] = { GPIOX_11 };328 329/* Bank X func4 */330static const unsigned int pwm_c_x_pins[] = { GPIOX_8 };331static const unsigned int i2c_slave_scl_pins[] = { GPIOX_10 };332static const unsigned int i2c_slave_sda_pins[] = { GPIOX_11 };333 334/* Bank X func5 */335static const unsigned int i2c3_sda_x_pins[] = { GPIOX_10 };336static const unsigned int i2c3_scl_x_pins[] = { GPIOX_11 };337 338/* Bank Z func1 */339static const unsigned int tdm_fs2_pins[] = { GPIOZ_0 };340static const unsigned int tdm_sclk2_pins[] = { GPIOZ_1 };341static const unsigned int tdm_d4_z_pins[] = { GPIOZ_2 };342static const unsigned int tdm_d5_z_pins[] = { GPIOZ_3 };343static const unsigned int tdm_d6_pins[] = { GPIOZ_4 };344static const unsigned int tdm_d7_pins[] = { GPIOZ_5 };345static const unsigned int mclk_2_pins[] = { GPIOZ_6 };346static const unsigned int spdif_out_z_pins[] = { GPIOZ_9 };347static const unsigned int dtv_a_if_agc_z10_pins[] = { GPIOZ_10 };348static const unsigned int uart_e_tx_z11_pins[] = { GPIOZ_11 };349static const unsigned int uart_e_rx_z12_pins[] = { GPIOZ_12 };350 351/* Bank Z func2 */352static const unsigned int tsin_a_clk_pins[] = { GPIOZ_0 };353static const unsigned int tsin_a_sop_pins[] = { GPIOZ_1 };354static const unsigned int tsin_a_valid_pins[] = { GPIOZ_2 };355static const unsigned int tsin_a_din0_pins[] = { GPIOZ_3 };356static const unsigned int dtv_a_if_agc_z6_pins[] = { GPIOZ_6 };357static const unsigned int dtv_b_if_agc_pins[] = { GPIOZ_7 };358static const unsigned int i2c3_sda_z_pins[] = { GPIOZ_8 };359static const unsigned int i2c3_scl_z_pins[] = { GPIOZ_9 };360static const unsigned int dtv_a_rf_agc_pins[] = { GPIOZ_10 };361static const unsigned int dtv_b_rf_agc_pins[] = { GPIOZ_11 };362 363/* Bank Z func3 */364static const unsigned int sdcard_d0_z_pins[] = { GPIOZ_0 };365static const unsigned int sdcard_d1_z_pins[] = { GPIOZ_1 };366static const unsigned int sdcard_d2_z_pins[] = { GPIOZ_2 };367static const unsigned int sdcard_d3_z_pins[] = { GPIOZ_3 };368static const unsigned int sdcard_clk_z_pins[] = { GPIOZ_4 };369static const unsigned int sdcard_cmd_z_pins[] = { GPIOZ_5 };370static const unsigned int uart_e_tx_z8_pins[] = { GPIOZ_8 };371static const unsigned int uart_e_rx_z9_pins[] = { GPIOZ_9 };372static const unsigned int pdm_din1_z_pins[] = { GPIOZ_10 };373static const unsigned int pdm_din0_z_pins[] = { GPIOZ_11 };374static const unsigned int pdm_dclk_z_pins[] = { GPIOZ_12 };375 376/* Bank Z func4 */377static const unsigned int spi_a_miso_z_pins[] = { GPIOZ_0 };378static const unsigned int spi_a_mosi_z_pins[] = { GPIOZ_1 };379static const unsigned int spi_a_clk_z_pins[] = { GPIOZ_2 };380static const unsigned int spi_a_ss0_z_pins[] = { GPIOZ_3 };381static const unsigned int spi_a_ss1_z_pins[] = { GPIOZ_4 };382static const unsigned int spi_a_ss2_z_pins[] = { GPIOZ_5 };383static const unsigned int i2c4_scl_z_pins[] = { GPIOZ_11 };384static const unsigned int i2c4_sda_z_pins[] = { GPIOZ_12 };385 386/* Bank Z func5 */387static const unsigned int uart_d_tx_z_pins[] = { GPIOZ_0 };388static const unsigned int uart_d_rx_z_pins[] = { GPIOZ_1 };389static const unsigned int uart_d_cts_z_pins[] = { GPIOZ_2 };390static const unsigned int uart_d_rts_z_pins[] = { GPIOZ_3 };391static const unsigned int pwm_g_z_pins[] = { GPIOZ_4 };392static const unsigned int pwm_f_z_pins[] = { GPIOZ_5 };393static const unsigned int pwm_e_z_pins[] = { GPIOZ_6 };394static const unsigned int tsin_b_clk_z_pins[] = { GPIOZ_7 };395static const unsigned int tsin_b_sop_z_pins[] = { GPIOZ_10 };396static const unsigned int tsin_b_valid_z_pins[] = { GPIOZ_11 };397static const unsigned int tsin_b_d0_z_pins[] = { GPIOZ_12 };398 399/* Bank Z func6 */400static const unsigned int s2_demod_gpio7_pins[] = { GPIOZ_0 };401static const unsigned int s2_demod_gpio6_pins[] = { GPIOZ_1 };402static const unsigned int s2_demod_gpio5_pins[] = { GPIOZ_2 };403static const unsigned int s2_demod_gpio4_pins[] = { GPIOZ_3 };404static const unsigned int s2_demod_gpio3_pins[] = { GPIOZ_4 };405static const unsigned int s2_demod_gpio2_pins[] = { GPIOZ_5 };406static const unsigned int diseqc_out_pins[] = { GPIOZ_7 };407static const unsigned int s2_demod_gpio1_pins[] = { GPIOZ_8 };408static const unsigned int s2_demod_gpio0_pins[] = { GPIOZ_12 };409 410/* Bank Z func7 */411static const unsigned int gen_clk_z9_pins[] = { GPIOZ_9 };412static const unsigned int gen_clk_z12_pins[] = { GPIOZ_12 };413 414static const struct meson_pmx_group meson_s4_periphs_groups[] = {415 GPIO_GROUP(GPIOE_0),416 GPIO_GROUP(GPIOE_1),417 418 GPIO_GROUP(GPIOB_0),419 GPIO_GROUP(GPIOB_1),420 GPIO_GROUP(GPIOB_2),421 GPIO_GROUP(GPIOB_3),422 GPIO_GROUP(GPIOB_4),423 GPIO_GROUP(GPIOB_5),424 GPIO_GROUP(GPIOB_6),425 GPIO_GROUP(GPIOB_7),426 GPIO_GROUP(GPIOB_8),427 GPIO_GROUP(GPIOB_9),428 GPIO_GROUP(GPIOB_10),429 GPIO_GROUP(GPIOB_11),430 GPIO_GROUP(GPIOB_12),431 GPIO_GROUP(GPIOB_13),432 433 GPIO_GROUP(GPIOC_0),434 GPIO_GROUP(GPIOC_1),435 GPIO_GROUP(GPIOC_2),436 GPIO_GROUP(GPIOC_3),437 GPIO_GROUP(GPIOC_4),438 GPIO_GROUP(GPIOC_5),439 GPIO_GROUP(GPIOC_6),440 GPIO_GROUP(GPIOC_7),441 442 GPIO_GROUP(GPIOD_0),443 GPIO_GROUP(GPIOD_1),444 GPIO_GROUP(GPIOD_2),445 GPIO_GROUP(GPIOD_3),446 GPIO_GROUP(GPIOD_4),447 GPIO_GROUP(GPIOD_5),448 GPIO_GROUP(GPIOD_6),449 GPIO_GROUP(GPIOD_7),450 GPIO_GROUP(GPIOD_8),451 GPIO_GROUP(GPIOD_9),452 GPIO_GROUP(GPIOD_10),453 GPIO_GROUP(GPIOD_11),454 455 GPIO_GROUP(GPIOH_0),456 GPIO_GROUP(GPIOH_1),457 GPIO_GROUP(GPIOH_2),458 GPIO_GROUP(GPIOH_3),459 GPIO_GROUP(GPIOH_4),460 GPIO_GROUP(GPIOH_5),461 GPIO_GROUP(GPIOH_6),462 GPIO_GROUP(GPIOH_7),463 GPIO_GROUP(GPIOH_8),464 GPIO_GROUP(GPIOH_9),465 GPIO_GROUP(GPIOH_10),466 GPIO_GROUP(GPIOH_11),467 468 GPIO_GROUP(GPIOX_0),469 GPIO_GROUP(GPIOX_1),470 GPIO_GROUP(GPIOX_2),471 GPIO_GROUP(GPIOX_3),472 GPIO_GROUP(GPIOX_4),473 GPIO_GROUP(GPIOX_5),474 GPIO_GROUP(GPIOX_6),475 GPIO_GROUP(GPIOX_7),476 GPIO_GROUP(GPIOX_8),477 GPIO_GROUP(GPIOX_9),478 GPIO_GROUP(GPIOX_10),479 GPIO_GROUP(GPIOX_11),480 GPIO_GROUP(GPIOX_12),481 GPIO_GROUP(GPIOX_13),482 GPIO_GROUP(GPIOX_14),483 GPIO_GROUP(GPIOX_15),484 GPIO_GROUP(GPIOX_16),485 GPIO_GROUP(GPIOX_17),486 GPIO_GROUP(GPIOX_18),487 GPIO_GROUP(GPIOX_19),488 489 GPIO_GROUP(GPIOZ_0),490 GPIO_GROUP(GPIOZ_1),491 GPIO_GROUP(GPIOZ_2),492 GPIO_GROUP(GPIOZ_3),493 GPIO_GROUP(GPIOZ_4),494 GPIO_GROUP(GPIOZ_5),495 GPIO_GROUP(GPIOZ_6),496 GPIO_GROUP(GPIOZ_7),497 GPIO_GROUP(GPIOZ_8),498 GPIO_GROUP(GPIOZ_9),499 GPIO_GROUP(GPIOZ_10),500 GPIO_GROUP(GPIOZ_11),501 GPIO_GROUP(GPIOZ_12),502 503 GPIO_GROUP(GPIO_TEST_N),504 505 /* BANK E func1 */506 GROUP(i2c0_sda, 1),507 GROUP(i2c0_scl, 1),508 509 /* BANK E func2 */510 GROUP(uart_b_tx_e, 2),511 GROUP(uart_b_rx_e, 2),512 513 /* BANK E func3 */514 GROUP(pwm_h, 3),515 GROUP(pwm_j, 3),516 517 /* BANK B func1 */518 GROUP(emmc_nand_d0, 1),519 GROUP(emmc_nand_d1, 1),520 GROUP(emmc_nand_d2, 1),521 GROUP(emmc_nand_d3, 1),522 GROUP(emmc_nand_d4, 1),523 GROUP(emmc_nand_d5, 1),524 GROUP(emmc_nand_d6, 1),525 GROUP(emmc_nand_d7, 1),526 GROUP(emmc_clk, 1),527 GROUP(emmc_rst, 1),528 GROUP(emmc_cmd, 1),529 GROUP(emmc_nand_ds, 1),530 531 /* Bank B func2 */532 GROUP(nand_wen_clk, 2),533 GROUP(nand_ale, 2),534 GROUP(nand_ren_wr, 2),535 GROUP(nand_cle, 2),536 GROUP(nand_ce0, 2),537 538 /* Bank B func3 */539 GROUP(spif_hold, 3),540 GROUP(spif_mo, 3),541 GROUP(spif_mi, 3),542 GROUP(spif_clk, 3),543 GROUP(spif_wp, 3),544 GROUP(spif_cs, 3),545 546 /* Bank C func1 */547 GROUP(sdcard_d0_c, 1),548 GROUP(sdcard_d1_c, 1),549 GROUP(sdcard_d2_c, 1),550 GROUP(sdcard_d3_c, 1),551 GROUP(sdcard_clk_c, 1),552 GROUP(sdcard_cmd_c, 1),553 GROUP(sdcard_cd, 1),554 555 /* Bank C func2 */556 GROUP(jtag_2_tdo, 2),557 GROUP(jtag_2_tdi, 2),558 GROUP(uart_b_rx_c, 2),559 GROUP(uart_b_tx_c, 2),560 GROUP(jtag_2_clk, 2),561 GROUP(jtag_2_tms, 2),562 GROUP(i2c1_sda_c, 2),563 GROUP(i2c1_scl_c, 2),564 565 /* Bank C func3 */566 GROUP(pdm_din1_c, 3),567 GROUP(pdm_din0_c, 3),568 GROUP(i2c4_sda_c, 3),569 GROUP(i2c4_scl_c, 3),570 GROUP(pdm_dclk_c, 3),571 GROUP(iso7816_clk_c, 3),572 GROUP(iso7816_data_c, 3),573 574 /* Bank C func4 */575 GROUP(tdm_d2_c, 4),576 GROUP(tdm_d3_c, 4),577 GROUP(tdm_fs1_c, 4),578 GROUP(tdm_sclk1_c, 4),579 GROUP(mclk_1_c, 4),580 GROUP(tdm_d4_c, 4),581 GROUP(tdm_d5_c, 4),582 583 /* Bank D func1 */584 GROUP(uart_b_tx_d, 1),585 GROUP(uart_b_rx_d, 1),586 GROUP(uart_b_cts_d, 1),587 GROUP(uart_b_rts_d, 1),588 GROUP(remote_out, 1),589 GROUP(remote_in, 1),590 GROUP(jtag_1_clk, 1),591 GROUP(jtag_1_tms, 1),592 GROUP(jtag_1_tdi, 1),593 GROUP(jtag_1_tdo, 1),594 GROUP(clk12_24, 1),595 GROUP(pwm_g_hiz, 1),596 597 /* Bank D func2 */598 GROUP(i2c4_sda_d, 2),599 GROUP(i2c4_scl_d, 2),600 GROUP(mclk_1_d, 2),601 GROUP(tdm_sclk1_d, 2),602 GROUP(tdm_fs1_d, 2),603 GROUP(tdm_d4_d, 2),604 GROUP(tdm_d3_d, 2),605 GROUP(tdm_d2_d, 2),606 GROUP(pwm_g_d, 2),607 608 /* Bank D func3 */609 GROUP(uart_c_tx, 3),610 GROUP(uart_c_rx, 3),611 GROUP(pwm_b_d, 3),612 GROUP(pwm_a_d, 3),613 GROUP(pwm_c_d, 3),614 GROUP(pwm_d_d, 3),615 GROUP(pwm_i_d, 3),616 617 /* Bank D func4 */618 GROUP(clk_32k_in, 4),619 GROUP(pwm_b_hiz, 4),620 GROUP(pwm_a_hiz, 4),621 GROUP(pwm_c_hiz, 4),622 GROUP(pdm_dclk_d, 4),623 GROUP(pdm_din0_d, 4),624 GROUP(pdm_din1_d, 4),625 626 /* Bank D func5 */627 GROUP(mic_mute_en, 5),628 GROUP(mic_mute_key, 5),629 GROUP(i2c1_sda_d, 5),630 GROUP(i2c1_scl_d, 5),631 GROUP(i2c2_sda_d, 5),632 GROUP(i2c2_scl_d, 5),633 634 /* Bank D func6 */635 GROUP(gen_clk_d, 6),636 GROUP(tsin_b_clk_c, 6),637 GROUP(tsin_b_sop_c, 6),638 GROUP(tsin_b_valid_c, 6),639 GROUP(tsin_b_d0_c, 6),640 641 /* Bank H func1 */642 GROUP(hdmitx_sda, 1),643 GROUP(hdmitx_sck, 1),644 GROUP(hdmitx_hpd_in, 1),645 GROUP(ao_cec_a, 1),646 GROUP(spdif_out_h, 1),647 GROUP(spdif_in, 1),648 GROUP(i2c1_sda_h, 1),649 GROUP(i2c1_scl_h, 1),650 GROUP(i2c2_sda_h8, 1),651 GROUP(i2c2_scl_h9, 1),652 GROUP(eth_link_led, 1),653 GROUP(eth_act_led, 1),654 655 /* Bank H func2 */656 GROUP(i2c2_sda_h0, 2),657 GROUP(i2c2_scl_h1, 2),658 GROUP(ao_cec_b, 2),659 GROUP(uart_d_tx_h, 2),660 GROUP(uart_d_rx_h, 2),661 GROUP(uart_d_cts_h, 2),662 GROUP(uart_d_rts_h, 2),663 GROUP(iso7816_clk_h, 2),664 GROUP(iso7816_data_h, 2),665 GROUP(uart_e_tx_h, 2),666 GROUP(uart_e_rx_h, 2),667 668 /* Bank H func3 */669 GROUP(pwm_d_h, 3),670 GROUP(pwm_i_h, 3),671 GROUP(pdm_dclk_h, 3),672 GROUP(pdm_din0_h, 3),673 GROUP(pdm_din1_h, 3),674 675 /* Bank H func4 */676 GROUP(mclk_1_h, 4),677 GROUP(tdm_sclk1_h, 4),678 GROUP(tdm_fs1_h, 4),679 GROUP(tdm_d2_h, 4),680 GROUP(tdm_d3_h, 4),681 GROUP(tdm_d4_h, 4),682 683 /* Bank H func5 */684 GROUP(spi_a_miso_h, 5),685 GROUP(spi_a_mosi_h, 5),686 GROUP(spi_a_clk_h, 5),687 GROUP(spi_a_ss0_h, 5),688 689 /* Bank H func6 */690 GROUP(gen_clk_h, 6),691 GROUP(tsin_b1_clk, 6),692 GROUP(tsin_b1_sop, 6),693 GROUP(tsin_b1_valid, 6),694 GROUP(tsin_b1_d0, 6),695 696 /* Bank X func1 */697 GROUP(sdio_d0, 1),698 GROUP(sdio_d1, 1),699 GROUP(sdio_d2, 1),700 GROUP(sdio_d3, 1),701 GROUP(sdio_clk, 1),702 GROUP(sdio_cmd, 1),703 GROUP(pwm_a_x, 1),704 GROUP(pwm_f_x, 1),705 GROUP(tdm_d1, 1),706 GROUP(tdm_d0, 1),707 GROUP(tdm_fs0, 1),708 GROUP(tdm_sclk0, 1),709 GROUP(uart_a_tx, 1),710 GROUP(uart_a_rx, 1),711 GROUP(uart_a_cts, 1),712 GROUP(uart_a_rts, 1),713 GROUP(pwm_e_x, 1),714 GROUP(i2c1_sda_x, 1),715 GROUP(i2c1_scl_x, 1),716 GROUP(pwm_b_x, 1),717 718 /* Bank X func2 */719 GROUP(pdm_din0_x, 2),720 GROUP(pdm_din1_x, 2),721 GROUP(pdm_dclk_x, 2),722 723 /* Bank X func3 */724 GROUP(spi_a_mosi_x, 3),725 GROUP(spi_a_miso_x, 3),726 GROUP(spi_a_ss0_x, 3),727 GROUP(spi_a_clk_x, 3),728 729 /* Bank X func4 */730 GROUP(pwm_c_x, 4),731 GROUP(i2c_slave_scl, 4),732 GROUP(i2c_slave_sda, 4),733 734 /* Bank X func5 */735 GROUP(i2c3_sda_x, 5),736 GROUP(i2c3_scl_x, 5),737 738 /* Bank Z func1 */739 GROUP(tdm_fs2, 1),740 GROUP(tdm_sclk2, 1),741 GROUP(tdm_d4_z, 1),742 GROUP(tdm_d5_z, 1),743 GROUP(tdm_d6, 1),744 GROUP(tdm_d7, 1),745 GROUP(mclk_2, 1),746 GROUP(spdif_out_z, 1),747 GROUP(dtv_a_if_agc_z10, 1),748 GROUP(uart_e_tx_z11, 1),749 GROUP(uart_e_rx_z12, 1),750 751 /* Bank Z func2 */752 GROUP(tsin_a_clk, 2),753 GROUP(tsin_a_sop, 2),754 GROUP(tsin_a_valid, 2),755 GROUP(tsin_a_din0, 2),756 GROUP(dtv_a_if_agc_z6, 2),757 GROUP(dtv_b_if_agc, 2),758 GROUP(i2c3_sda_z, 2),759 GROUP(i2c3_scl_z, 2),760 GROUP(dtv_a_rf_agc, 2),761 GROUP(dtv_b_rf_agc, 2),762 763 /* Bank Z func3 */764 GROUP(sdcard_d0_z, 3),765 GROUP(sdcard_d1_z, 3),766 GROUP(sdcard_d2_z, 3),767 GROUP(sdcard_d3_z, 3),768 GROUP(sdcard_clk_z, 3),769 GROUP(sdcard_cmd_z, 3),770 GROUP(uart_e_tx_z8, 3),771 GROUP(uart_e_rx_z9, 3),772 GROUP(pdm_din1_z, 3),773 GROUP(pdm_din0_z, 3),774 GROUP(pdm_dclk_z, 3),775 776 /* Bank Z func4 */777 GROUP(spi_a_miso_z, 4),778 GROUP(spi_a_mosi_z, 4),779 GROUP(spi_a_clk_z, 4),780 GROUP(spi_a_ss0_z, 4),781 GROUP(spi_a_ss1_z, 4),782 GROUP(spi_a_ss2_z, 4),783 GROUP(i2c4_scl_z, 4),784 GROUP(i2c4_sda_z, 4),785 786 /* Bank Z func5 */787 GROUP(uart_d_tx_z, 5),788 GROUP(uart_d_rx_z, 5),789 GROUP(uart_d_cts_z, 5),790 GROUP(uart_d_rts_z, 5),791 GROUP(pwm_g_z, 5),792 GROUP(pwm_f_z, 5),793 GROUP(pwm_e_z, 5),794 GROUP(tsin_b_clk_z, 5),795 GROUP(tsin_b_sop_z, 5),796 GROUP(tsin_b_valid_z, 5),797 GROUP(tsin_b_d0_z, 5),798 799 /* Bank Z func6 */800 GROUP(s2_demod_gpio7, 6),801 GROUP(s2_demod_gpio6, 6),802 GROUP(s2_demod_gpio5, 6),803 GROUP(s2_demod_gpio4, 6),804 GROUP(s2_demod_gpio3, 6),805 GROUP(s2_demod_gpio2, 6),806 GROUP(diseqc_out, 6),807 GROUP(s2_demod_gpio1, 6),808 GROUP(s2_demod_gpio0, 6),809 810 /* Bank Z func7 */811 GROUP(gen_clk_z9, 7),812 GROUP(gen_clk_z12, 7),813};814 815static const char * const gpio_periphs_groups[] = {816 "GPIOE_0", "GPIOE_1",817 818 "GPIOB_0", "GPIOB_1", "GPIOB_2", "GPIOB_3", "GPIOB_4", "GPIOB_5",819 "GPIOB_6", "GPIOB_7", "GPIOB_8", "GPIOB_9", "GPIOB_10", "GPIOB_11",820 "GPIOB_12", "GPIOB_13",821 822 "GPIOC_0", "GPIOC_1", "GPIOC_2", "GPIOC_3", "GPIOC_4", "GPIOC_5",823 "GPIOC_6", "GPIOC_7",824 825 "GPIOD_0", "GPIOD_1", "GPIOD_2", "GPIOD_3", "GPIOD_4", "GPIOD_5",826 "GPIOD_6", "GPIOD_7", "GPIOD_8", "GPIOD_9", "GPIOD_10", "GPIOD_11",827 828 "GPIOH_0", "GPIOH_1", "GPIOH_2", "GPIOH_3", "GPIOH_4", "GPIOH_5",829 "GPIOH_6", "GPIOH_7", "GPIOH_8", "GPIOH_9", "GPIOH_10", "GPIOH_11",830 831 "GPIOX_0", "GPIOX_1", "GPIOX_2", "GPIOX_3", "GPIOX_4", "GPIOX_5",832 "GPIOX_6", "GPIOX_7", "GPIOX_8", "GPIOX_9", "GPIOX_10", "GPIOX_11",833 "GPIOX_12", "GPIOX_13", "GPIOX_14", "GPIOX_15", "GPIOX_16", "GPIOX_17",834 "GPIOX_18", "GPIOX_19",835 836 "GPIOZ_0", "GPIOZ_1", "GPIOZ_2", "GPIOZ_3", "GPIOZ_4", "GPIOZ_5",837 "GPIOZ_6", "GPIOZ_7", "GPIOZ_8", "GPIOZ_9", "GPIOZ_10",838 "GPIOZ_11", "GPIOZ_12",839 840 "GPIO_TEST_N",841};842 843static const char * const i2c0_groups[] = {844 "i2c0_sda", "i2c0_scl",845};846 847static const char * const i2c1_groups[] = {848 "i2c1_sda_c", "i2c1_scl_c",849 "i2c1_sda_d", "i2c1_scl_d",850 "i2c1_sda_h", "i2c1_scl_h",851 "i2c1_sda_x", "i2c1_scl_x",852};853 854static const char * const i2c2_groups[] = {855 "i2c2_sda_d", "i2c2_scl_d",856 "i2c2_sda_h8", "i2c2_scl_h9",857 "i2c2_sda_h0", "i2c2_scl_h1l,"858};859 860static const char * const i2c3_groups[] = {861 "i2c3_sda_x", "i2c3_scl_x",862 "i2c3_sda_z", "i2c3_scl_z",863};864 865static const char * const i2c4_groups[] = {866 "i2c4_sda_c", "i2c4_scl_c",867 "i2c4_sda_d", "i2c4_scl_d",868 "i2c4_scl_z", "i2c4_sda_z",869};870 871static const char * const uart_a_groups[] = {872 "uart_a_tx", "uart_a_rx", "uart_a_cts", "uart_a_rts",873};874 875static const char * const uart_b_groups[] = {876 "uart_b_tx_e", "uart_b_rx_e", "uart_b_rx_c", "uart_b_tx_c",877 "uart_b_tx_d", "uart_b_rx_d", "uart_b_cts_d", "uart_b_rts_d",878};879 880static const char * const uart_c_groups[] = {881 "uart_c_tx", "uart_c_rx",882};883 884static const char * const uart_d_groups[] = {885 "uart_d_tx_h", "uart_d_rx_h", "uart_d_cts_h", "uart_d_rts_h",886 "uart_d_tx_z", "uart_d_rx_z", "uart_d_cts_z", "uart_d_rts_z",887};888 889static const char * const uart_e_groups[] = {890 "uart_e_tx_h", "uart_e_rx_h", "uart_e_tx_z11", "uart_e_rx_z12",891 "uart_e_tx_z8", "uart_e_rx_z9",892};893 894static const char * const emmc_groups[] = {895 "emmc_nand_d0", "emmc_nand_d1", "emmc_nand_d2", "emmc_nand_d3",896 "emmc_nand_d4", "emmc_nand_d5", "emmc_nand_d6", "emmc_nand_d7",897 "emmc_clk", "emmc_rst", "emmc_cmd", "emmc_nand_ds",898};899 900static const char * const nand_groups[] = {901 "emmc_nand_d0", "emmc_nand_d1", "emmc_nand_d2", "emmc_nand_d3",902 "emmc_nand_d4", "emmc_nand_d5", "emmc_nand_d6", "emmc_nand_d7",903 "nand_wen_clk", "nand_ale", "nand_ren_wr", "nand_cle", "nand_ce0",904};905 906static const char * const spif_groups[] = {907 "spif_hold", "spif_mo", "spif_mi", "spif_clk", "spif_wp",908 "spif_cs",909};910 911static const char * const sdcard_groups[] = {912 "sdcard_d0_c", "sdcard_d1_c", "sdcard_d2_c", "sdcard_d3_c",913 "sdcard_clk_c", "sdcard_cmd_c", "sdcard_cd",914 "sdcard_d0_z", "sdcard_d1_z", "sdcard_d2_z", "sdcard_d3_z",915 "sdcard_clk_z", "sdcard_cmd_z",916};917 918static const char * const jtag_1_groups[] = {919 "jtag_1_clk", "jtag_1_tms", "jtag_1_tdi", "jtag_1_tdo",920};921 922static const char * const jtag_2_groups[] = {923 "jtag_2_tdo", "jtag_2_tdi", "jtag_2_clk", "jtag_2_tms",924};925 926static const char * const pdm_groups[] = {927 "pdm_din1_c", "pdm_din0_c", "pdm_dclk_c",928 "pdm_dclk_d", "pdm_din0_d", "pdm_din1_d",929 "pdm_dclk_h", "pdm_din0_h", "pdm_din1_h",930 "pdm_din0_x", "pdm_din1_x", "pdm_dclk_x",931 "pdm_din1_z", "pdm_din0_z", "pdm_dclk_z",932};933 934static const char * const iso7816_groups[] = {935 "iso7816_clk_c", "iso7816_data_c",936 "iso7816_clk_h", "iso7816_data_h",937};938 939static const char * const tdm_groups[] = {940 "tdm_d2_c", "tdm_d3_c", "tdm_fs1_c", "tdm_d4_c", "tdm_d5_c", "tdm_sclk1_c",941 "tdm_fs1_d", "tdm_d4_d", "tdm_d3_d", "tdm_d2_d", "tdm_sclk1_d",942 "tdm_sclk1_h", "tdm_fs1_h", "tdm_d2_h", "tdm_d3_h", "tdm_d4_h",943 "tdm_d1", "tdm_d0", "tdm_fs0", "tdm_sclk0", "tdm_fs2", "tdm_sclk2",944 "tdm_d4_z", "tdm_d5_z", "tdm_d6", "tdm_d7",945};946 947static const char * const mclk_1_groups[] = {948 "mclk_1_c", "mclk_1_d", "mclk_1_h", "mclk_2",949};950 951static const char * const mclk_2_groups[] = {952 "mclk_2",953};954 955static const char * const remote_out_groups[] = {956 "remote_out",957};958 959static const char * const remote_in_groups[] = {960 "remote_in",961};962 963static const char * const clk12_24_groups[] = {964 "clk12_24",965};966 967static const char * const clk_32k_in_groups[] = {968 "clk_32k_in",969};970 971static const char * const pwm_a_hiz_groups[] = {972 "pwm_a_hiz",973};974 975static const char * const pwm_b_hiz_groups[] = {976 "pwm_b_hiz",977};978 979static const char * const pwm_c_hiz_groups[] = {980 "pwm_c_hiz",981};982 983static const char * const pwm_g_hiz_groups[] = {984 "pwm_g_hiz",985};986 987static const char * const pwm_a_groups[] = {988 "pwm_a_d",989};990 991static const char * const pwm_b_groups[] = {992 "pwm_b_d", "pwm_b_x",993};994 995static const char * const pwm_c_groups[] = {996 "pwm_c_d", "pwm_c_x",997};998 999static const char * const pwm_d_groups[] = {1000 "pwm_d_d", "pwm_d_h",1001};1002 1003static const char * const pwm_e_groups[] = {1004 "pwm_e_x", "pwm_e_z",1005};1006 1007static const char * const pwm_f_groups[] = {1008 "pwm_f_x", "pwm_f_z",1009};1010 1011static const char * const pwm_g_groups[] = {1012 "pwm_g_d", "pwm_g_z",1013};1014 1015static const char * const pwm_h_groups[] = {1016 "pwm_h",1017};1018 1019static const char * const pwm_i_groups[] = {1020 "pwm_i_d", "pwm_i_h"1021};1022 1023static const char * const pwm_j_groups[] = {1024 "pwm_j",1025};1026 1027static const char * const mic_mute_groups[] = {1028 "mic_mute_en", "mic_mute_key",1029};1030 1031static const char * const hdmitx_groups[] = {1032 "hdmitx_sda", "hdmitx_sck", "hdmitx_hpd_in",1033};1034 1035static const char * const ao_cec_a_groups[] = {1036 "ao_cec_a",1037};1038 1039static const char * const ao_cec_b_groups[] = {1040 "ao_cec_b",1041};1042 1043static const char * const spdif_out_groups[] = {1044 "spdif_out_h", "spdif_out_z",1045};1046 1047static const char * const spdif_in_groups[] = {1048 "spdif_in",1049};1050 1051static const char * const eth_groups[] = {1052 "eth_link_led", "eth_act_led",1053};1054 1055static const char * const spi_a_groups[] = {1056 "spi_a_miso_h", "spi_a_mosi_h", "spi_a_clk_h", "spi_a_ss0_h",1057 1058 "spi_a_mosi_x", "spi_a_miso_x", "spi_a_ss0_x", "spi_a_clk_x",1059 1060 "spi_a_miso_z", "spi_a_mosi_z", "spi_a_clk_z", "spi_a_ss0_z",1061 "spi_a_ss1_z", "spi_a_ss2_z",1062};1063 1064static const char * const gen_clk_groups[] = {1065 "gen_clk_h", "gen_clk_z9", "gen_clk_z12",1066};1067 1068static const char * const sdio_groups[] = {1069 "sdio_d0", "sdio_d1", "sdio_d2", "sdio_d3", "sdio_clk", "sdio_cmd",1070};1071 1072static const char * const i2c_slave_groups[] = {1073 "i2c_slave_scl", "i2c_slave_sda",1074};1075 1076static const char * const dtv_groups[] = {1077 "dtv_a_if_agc_z10", "dtv_a_if_agc_z6", "dtv_b_if_agc",1078 "dtv_a_rf_agc", "dtv_b_rf_agc",1079};1080 1081static const char * const tsin_a_groups[] = {1082 "tsin_a_clk", "tsin_a_sop", "tsin_a_valid", "tsin_a_din0",1083};1084 1085static const char * const tsin_b_groups[] = {1086 "tsin_b_clk_c", "tsin_b_sop_c", "tsin_b_valid_c", "tsin_b_d0_c",1087 "tsin_b_clk_z", "tsin_b_sop_z", "tsin_b_valid_z", "tsin_b_d0_z",1088};1089 1090static const char * const tsin_b1_groups[] = {1091 "tsin_b1_clk", "tsin_b1_sop", "tsin_b1_valid", "tsin_b1_d0",1092};1093 1094static const char * const diseqc_out_groups[] = {1095 "diseqc_out",1096};1097 1098static const char * const s2_demod_groups[] = {1099 "s2_demod_gpio7", "s2_demod_gpio6", "s2_demod_gpio5", "s2_demod_gpio4",1100 "s2_demod_gpio3", "s2_demod_gpio2", "s2_demod_gpio1", "s2_demod_gpio0",1101};1102 1103static const struct meson_pmx_func meson_s4_periphs_functions[] = {1104 FUNCTION(gpio_periphs),1105 FUNCTION(i2c0),1106 FUNCTION(i2c1),1107 FUNCTION(i2c2),1108 FUNCTION(i2c3),1109 FUNCTION(i2c4),1110 FUNCTION(uart_a),1111 FUNCTION(uart_b),1112 FUNCTION(uart_c),1113 FUNCTION(uart_d),1114 FUNCTION(uart_e),1115 FUNCTION(emmc),1116 FUNCTION(nand),1117 FUNCTION(spif),1118 FUNCTION(sdcard),1119 FUNCTION(jtag_1),1120 FUNCTION(jtag_2),1121 FUNCTION(pdm),1122 FUNCTION(iso7816),1123 FUNCTION(tdm),1124 FUNCTION(mclk_1),1125 FUNCTION(mclk_2),1126 FUNCTION(remote_out),1127 FUNCTION(remote_in),1128 FUNCTION(clk12_24),1129 FUNCTION(clk_32k_in),1130 FUNCTION(pwm_a_hiz),1131 FUNCTION(pwm_b_hiz),1132 FUNCTION(pwm_c_hiz),1133 FUNCTION(pwm_g_hiz),1134 FUNCTION(pwm_a),1135 FUNCTION(pwm_b),1136 FUNCTION(pwm_c),1137 FUNCTION(pwm_d),1138 FUNCTION(pwm_e),1139 FUNCTION(pwm_f),1140 FUNCTION(pwm_g),1141 FUNCTION(pwm_h),1142 FUNCTION(pwm_i),1143 FUNCTION(pwm_j),1144 FUNCTION(mic_mute),1145 FUNCTION(hdmitx),1146 FUNCTION(ao_cec_a),1147 FUNCTION(ao_cec_b),1148 FUNCTION(spdif_out),1149 FUNCTION(spdif_in),1150 FUNCTION(eth),1151 FUNCTION(spi_a),1152 FUNCTION(gen_clk),1153 FUNCTION(sdio),1154 FUNCTION(i2c_slave),1155 FUNCTION(dtv),1156 FUNCTION(tsin_a),1157 FUNCTION(tsin_b),1158 FUNCTION(tsin_b1),1159 FUNCTION(diseqc_out),1160 FUNCTION(s2_demod),1161};1162 1163static const struct meson_bank meson_s4_periphs_banks[] = {1164 /* name first last irq pullen pull dir out in */1165 BANK_DS("B", GPIOB_0, GPIOB_13, 0, 13,1166 0x63, 0, 0x64, 0, 0x62, 0, 0x61, 0, 0x60, 0, 0x67, 0),1167 BANK_DS("C", GPIOC_0, GPIOC_7, 14, 21,1168 0x53, 0, 0x54, 0, 0x52, 0, 0x51, 0, 0x50, 0, 0x57, 0),1169 BANK_DS("E", GPIOE_0, GPIOE_1, 22, 23,1170 0x43, 0, 0x44, 0, 0x42, 0, 0x41, 0, 0x40, 0, 0x47, 0),1171 BANK_DS("D", GPIOD_0, GPIOD_11, 24, 35,1172 0x33, 0, 0x34, 0, 0x32, 0, 0x31, 0, 0x30, 0, 0x37, 0),1173 BANK_DS("H", GPIOH_0, GPIOH_11, 36, 47,1174 0x23, 0, 0x24, 0, 0x22, 0, 0x21, 0, 0x20, 0, 0x27, 0),1175 BANK_DS("X", GPIOX_0, GPIOX_19, 48, 67,1176 0x13, 0, 0x14, 0, 0x12, 0, 0x11, 0, 0x10, 0, 0x17, 0),1177 BANK_DS("Z", GPIOZ_0, GPIOZ_12, 68, 80,1178 0x03, 0, 0x04, 0, 0x02, 0, 0x01, 0, 0x00, 0, 0x07, 0),1179 BANK_DS("TEST_N", GPIO_TEST_N, GPIO_TEST_N, -1, -1,1180 0x83, 0, 0x84, 0, 0x82, 0, 0x81, 0, 0x80, 0, 0x87, 0),1181};1182 1183static const struct meson_pmx_bank meson_s4_periphs_pmx_banks[] = {1184 /*name first lask reg offset*/1185 BANK_PMX("B", GPIOB_0, GPIOB_13, 0x00, 0),1186 BANK_PMX("C", GPIOC_0, GPIOC_7, 0x9, 0),1187 BANK_PMX("E", GPIOE_0, GPIOE_1, 0x12, 0),1188 BANK_PMX("D", GPIOD_0, GPIOD_11, 0x10, 0),1189 BANK_PMX("H", GPIOH_0, GPIOH_11, 0xb, 0),1190 BANK_PMX("X", GPIOX_0, GPIOX_19, 0x3, 0),1191 BANK_PMX("Z", GPIOZ_0, GPIOZ_12, 0x6, 0),1192 BANK_PMX("TEST_N", GPIO_TEST_N, GPIO_TEST_N, 0xf, 0)1193};1194 1195static const struct meson_axg_pmx_data meson_s4_periphs_pmx_banks_data = {1196 .pmx_banks = meson_s4_periphs_pmx_banks,1197 .num_pmx_banks = ARRAY_SIZE(meson_s4_periphs_pmx_banks),1198};1199 1200static const struct meson_pinctrl_data meson_s4_periphs_pinctrl_data = {1201 .name = "periphs-banks",1202 .pins = meson_s4_periphs_pins,1203 .groups = meson_s4_periphs_groups,1204 .funcs = meson_s4_periphs_functions,1205 .banks = meson_s4_periphs_banks,1206 .num_pins = ARRAY_SIZE(meson_s4_periphs_pins),1207 .num_groups = ARRAY_SIZE(meson_s4_periphs_groups),1208 .num_funcs = ARRAY_SIZE(meson_s4_periphs_functions),1209 .num_banks = ARRAY_SIZE(meson_s4_periphs_banks),1210 .pmx_ops = &meson_axg_pmx_ops,1211 .pmx_data = &meson_s4_periphs_pmx_banks_data,1212 .parse_dt = &meson_a1_parse_dt_extra,1213};1214 1215static const struct of_device_id meson_s4_pinctrl_dt_match[] = {1216 {1217 .compatible = "amlogic,meson-s4-periphs-pinctrl",1218 .data = &meson_s4_periphs_pinctrl_data,1219 },1220 { }1221};1222MODULE_DEVICE_TABLE(of, meson_s4_pinctrl_dt_match);1223 1224static struct platform_driver meson_s4_pinctrl_driver = {1225 .probe = meson_pinctrl_probe,1226 .driver = {1227 .name = "meson-s4-pinctrl",1228 .of_match_table = meson_s4_pinctrl_dt_match,1229 },1230};1231module_platform_driver(meson_s4_pinctrl_driver);1232 1233MODULE_DESCRIPTION("Amlogic Meson S4 SoC pinctrl driver");1234MODULE_LICENSE("Dual BSD/GPL");1235