brintos / linux-shallow public Read only

1// SPDX-License-Identifier: GPL-2.02// Copyright (c) 2020 Nuvoton Technology corporation.3 4#include <linux/bits.h>5#include <linux/device.h>6#include <linux/gpio/driver.h>7#include <linux/interrupt.h>8#include <linux/irq.h>9#include <linux/mfd/syscon.h>10#include <linux/module.h>11#include <linux/debugfs.h>12#include <linux/seq_file.h>13#include <linux/mod_devicetable.h>14#include <linux/pinctrl/machine.h>15#include <linux/pinctrl/pinconf.h>16#include <linux/pinctrl/pinconf-generic.h>17#include <linux/pinctrl/pinctrl.h>18#include <linux/pinctrl/pinmux.h>19#include <linux/pinctrl/consumer.h>20#include <linux/platform_device.h>21#include <linux/property.h>22#include <linux/regmap.h>23 24/* GCR registers */25#define NPCM8XX_GCR_SRCNT	0x06826#define NPCM8XX_GCR_FLOCKR1	0x07427#define NPCM8XX_GCR_DSCNT	0x07828#define NPCM8XX_GCR_I2CSEGSEL	0x0e029#define NPCM8XX_GCR_MFSEL1	0x26030#define NPCM8XX_GCR_MFSEL2	0x26431#define NPCM8XX_GCR_MFSEL3	0x26832#define NPCM8XX_GCR_MFSEL4	0x26c33#define NPCM8XX_GCR_MFSEL5	0x27034#define NPCM8XX_GCR_MFSEL6	0x27435#define NPCM8XX_GCR_MFSEL7	0x27836 37#define SRCNT_ESPI		BIT(3)38 39/* GPIO registers */40#define NPCM8XX_GP_N_TLOCK1	0x0041#define NPCM8XX_GP_N_DIN	0x0442#define NPCM8XX_GP_N_POL	0x0843#define NPCM8XX_GP_N_DOUT	0x0c44#define NPCM8XX_GP_N_OE		0x1045#define NPCM8XX_GP_N_OTYP	0x1446#define NPCM8XX_GP_N_MP		0x1847#define NPCM8XX_GP_N_PU		0x1c48#define NPCM8XX_GP_N_PD		0x2049#define NPCM8XX_GP_N_DBNC	0x2450#define NPCM8XX_GP_N_EVTYP	0x2851#define NPCM8XX_GP_N_EVBE	0x2c52#define NPCM8XX_GP_N_OBL0	0x3053#define NPCM8XX_GP_N_OBL1	0x3454#define NPCM8XX_GP_N_OBL2	0x3855#define NPCM8XX_GP_N_OBL3	0x3c56#define NPCM8XX_GP_N_EVEN	0x4057#define NPCM8XX_GP_N_EVENS	0x4458#define NPCM8XX_GP_N_EVENC	0x4859#define NPCM8XX_GP_N_EVST	0x4c60#define NPCM8XX_GP_N_SPLCK	0x5061#define NPCM8XX_GP_N_MPLCK	0x5462#define NPCM8XX_GP_N_IEM	0x5863#define NPCM8XX_GP_N_OSRC	0x5c64#define NPCM8XX_GP_N_ODSC	0x6065#define NPCM8XX_GP_N_DOS	0x6866#define NPCM8XX_GP_N_DOC	0x6c67#define NPCM8XX_GP_N_OES	0x7068#define NPCM8XX_GP_N_OEC	0x7469#define NPCM8XX_GP_N_DBNCS0	0x8070#define NPCM8XX_GP_N_DBNCS1	0x8471#define NPCM8XX_GP_N_DBNCP0	0x8872#define NPCM8XX_GP_N_DBNCP1	0x8c73#define NPCM8XX_GP_N_DBNCP2	0x9074#define NPCM8XX_GP_N_DBNCP3	0x9475#define NPCM8XX_GP_N_TLOCK2	0xac76 77#define NPCM8XX_GPIO_PER_BANK	3278#define NPCM8XX_GPIO_BANK_NUM	879#define NPCM8XX_GCR_NONE	080 81#define NPCM8XX_DEBOUNCE_MAX		482#define NPCM8XX_DEBOUNCE_NSEC		4083#define NPCM8XX_DEBOUNCE_VAL_MASK	GENMASK(23, 4)84#define NPCM8XX_DEBOUNCE_MAX_VAL	0xFFFFF785 86/* Structure for register banks */87struct debounce_time {88	bool	set_val[NPCM8XX_DEBOUNCE_MAX];89	u32	nanosec_val[NPCM8XX_DEBOUNCE_MAX];90};91 92struct npcm8xx_gpio {93	struct gpio_chip	gc;94	void __iomem		*base;95	struct debounce_time	debounce;96	int			irqbase;97	int			irq;98	struct irq_chip		irq_chip;99	u32			pinctrl_id;100	int (*direction_input)(struct gpio_chip *chip, unsigned int offset);101	int (*direction_output)(struct gpio_chip *chip, unsigned int offset,102				int value);103	int (*request)(struct gpio_chip *chip, unsigned int offset);104	void (*free)(struct gpio_chip *chip, unsigned int offset);105};106 107struct npcm8xx_pinctrl {108	struct pinctrl_dev	*pctldev;109	struct device		*dev;110	struct npcm8xx_gpio	gpio_bank[NPCM8XX_GPIO_BANK_NUM];111	struct irq_domain	*domain;112	struct regmap		*gcr_regmap;113	void __iomem		*regs;114	u32			bank_num;115};116 117/* GPIO handling in the pinctrl driver */118static void npcm_gpio_set(struct gpio_chip *gc, void __iomem *reg,119			  unsigned int pinmask)120{121	unsigned long flags;122 123	raw_spin_lock_irqsave(&gc->bgpio_lock, flags);124	iowrite32(ioread32(reg) | pinmask, reg);125	raw_spin_unlock_irqrestore(&gc->bgpio_lock, flags);126}127 128static void npcm_gpio_clr(struct gpio_chip *gc, void __iomem *reg,129			  unsigned int pinmask)130{131	unsigned long flags;132 133	raw_spin_lock_irqsave(&gc->bgpio_lock, flags);134	iowrite32(ioread32(reg) & ~pinmask, reg);135	raw_spin_unlock_irqrestore(&gc->bgpio_lock, flags);136}137 138static void npcmgpio_dbg_show(struct seq_file *s, struct gpio_chip *chip)139{140	struct npcm8xx_gpio *bank = gpiochip_get_data(chip);141 142	seq_printf(s, "DIN :%.8x DOUT:%.8x IE  :%.8x OE	 :%.8x\n",143		   ioread32(bank->base + NPCM8XX_GP_N_DIN),144		   ioread32(bank->base + NPCM8XX_GP_N_DOUT),145		   ioread32(bank->base + NPCM8XX_GP_N_IEM),146		   ioread32(bank->base + NPCM8XX_GP_N_OE));147	seq_printf(s, "PU  :%.8x PD  :%.8x DB  :%.8x POL :%.8x\n",148		   ioread32(bank->base + NPCM8XX_GP_N_PU),149		   ioread32(bank->base + NPCM8XX_GP_N_PD),150		   ioread32(bank->base + NPCM8XX_GP_N_DBNC),151		   ioread32(bank->base + NPCM8XX_GP_N_POL));152	seq_printf(s, "ETYP:%.8x EVBE:%.8x EVEN:%.8x EVST:%.8x\n",153		   ioread32(bank->base + NPCM8XX_GP_N_EVTYP),154		   ioread32(bank->base + NPCM8XX_GP_N_EVBE),155		   ioread32(bank->base + NPCM8XX_GP_N_EVEN),156		   ioread32(bank->base + NPCM8XX_GP_N_EVST));157	seq_printf(s, "OTYP:%.8x OSRC:%.8x ODSC:%.8x\n",158		   ioread32(bank->base + NPCM8XX_GP_N_OTYP),159		   ioread32(bank->base + NPCM8XX_GP_N_OSRC),160		   ioread32(bank->base + NPCM8XX_GP_N_ODSC));161	seq_printf(s, "OBL0:%.8x OBL1:%.8x OBL2:%.8x OBL3:%.8x\n",162		   ioread32(bank->base + NPCM8XX_GP_N_OBL0),163		   ioread32(bank->base + NPCM8XX_GP_N_OBL1),164		   ioread32(bank->base + NPCM8XX_GP_N_OBL2),165		   ioread32(bank->base + NPCM8XX_GP_N_OBL3));166	seq_printf(s, "SLCK:%.8x MLCK:%.8x\n",167		   ioread32(bank->base + NPCM8XX_GP_N_SPLCK),168		   ioread32(bank->base + NPCM8XX_GP_N_MPLCK));169}170 171static int npcmgpio_direction_input(struct gpio_chip *chip, unsigned int offset)172{173	struct npcm8xx_gpio *bank = gpiochip_get_data(chip);174	int ret;175 176	ret = pinctrl_gpio_direction_input(chip, offset);177	if (ret)178		return ret;179 180	return bank->direction_input(chip, offset);181}182 183static int npcmgpio_direction_output(struct gpio_chip *chip,184				     unsigned int offset, int value)185{186	struct npcm8xx_gpio *bank = gpiochip_get_data(chip);187	int ret;188 189	ret = pinctrl_gpio_direction_output(chip, offset);190	if (ret)191		return ret;192 193	return bank->direction_output(chip, offset, value);194}195 196static int npcmgpio_gpio_request(struct gpio_chip *chip, unsigned int offset)197{198	struct npcm8xx_gpio *bank = gpiochip_get_data(chip);199	int ret;200 201	ret = pinctrl_gpio_request(chip, offset);202	if (ret)203		return ret;204 205	return bank->request(chip, offset);206}207 208static void npcmgpio_irq_handler(struct irq_desc *desc)209{210	unsigned long sts, en, bit;211	struct npcm8xx_gpio *bank;212	struct irq_chip *chip;213	struct gpio_chip *gc;214 215	gc = irq_desc_get_handler_data(desc);216	bank = gpiochip_get_data(gc);217	chip = irq_desc_get_chip(desc);218 219	chained_irq_enter(chip, desc);220	sts = ioread32(bank->base + NPCM8XX_GP_N_EVST);221	en  = ioread32(bank->base + NPCM8XX_GP_N_EVEN);222	sts &= en;223	for_each_set_bit(bit, &sts, NPCM8XX_GPIO_PER_BANK)224		generic_handle_domain_irq(gc->irq.domain, bit);225	chained_irq_exit(chip, desc);226}227 228static int npcmgpio_set_irq_type(struct irq_data *d, unsigned int type)229{230	struct npcm8xx_gpio *bank =231		gpiochip_get_data(irq_data_get_irq_chip_data(d));232	unsigned int gpio = BIT(irqd_to_hwirq(d));233 234	switch (type) {235	case IRQ_TYPE_EDGE_RISING:236		npcm_gpio_clr(&bank->gc, bank->base + NPCM8XX_GP_N_EVBE, gpio);237		npcm_gpio_clr(&bank->gc, bank->base + NPCM8XX_GP_N_POL, gpio);238		break;239	case IRQ_TYPE_EDGE_FALLING:240		npcm_gpio_clr(&bank->gc, bank->base + NPCM8XX_GP_N_EVBE, gpio);241		npcm_gpio_set(&bank->gc, bank->base + NPCM8XX_GP_N_POL, gpio);242		break;243	case IRQ_TYPE_EDGE_BOTH:244		npcm_gpio_clr(&bank->gc, bank->base + NPCM8XX_GP_N_POL, gpio);245		npcm_gpio_set(&bank->gc, bank->base + NPCM8XX_GP_N_EVBE, gpio);246		break;247	case IRQ_TYPE_LEVEL_LOW:248		npcm_gpio_set(&bank->gc, bank->base + NPCM8XX_GP_N_POL, gpio);249		break;250	case IRQ_TYPE_LEVEL_HIGH:251		npcm_gpio_clr(&bank->gc, bank->base + NPCM8XX_GP_N_POL, gpio);252		break;253	default:254		return -EINVAL;255	}256 257	if (type & IRQ_TYPE_LEVEL_MASK) {258		npcm_gpio_clr(&bank->gc, bank->base + NPCM8XX_GP_N_EVTYP, gpio);259		irq_set_handler_locked(d, handle_level_irq);260	} else if (type & IRQ_TYPE_EDGE_BOTH) {261		npcm_gpio_set(&bank->gc, bank->base + NPCM8XX_GP_N_EVTYP, gpio);262		irq_set_handler_locked(d, handle_edge_irq);263	}264 265	return 0;266}267 268static void npcmgpio_irq_ack(struct irq_data *d)269{270	struct npcm8xx_gpio *bank =271		gpiochip_get_data(irq_data_get_irq_chip_data(d));272	unsigned int gpio = irqd_to_hwirq(d);273 274	iowrite32(BIT(gpio), bank->base + NPCM8XX_GP_N_EVST);275}276 277static void npcmgpio_irq_mask(struct irq_data *d)278{279	struct npcm8xx_gpio *bank =280		gpiochip_get_data(irq_data_get_irq_chip_data(d));281	unsigned int gpio = irqd_to_hwirq(d);282 283	iowrite32(BIT(gpio), bank->base + NPCM8XX_GP_N_EVENC);284}285 286static void npcmgpio_irq_unmask(struct irq_data *d)287{288	struct npcm8xx_gpio *bank =289		gpiochip_get_data(irq_data_get_irq_chip_data(d));290	unsigned int gpio = irqd_to_hwirq(d);291 292	iowrite32(BIT(gpio), bank->base + NPCM8XX_GP_N_EVENS);293}294 295static unsigned int npcmgpio_irq_startup(struct irq_data *d)296{297	struct gpio_chip *gc = irq_data_get_irq_chip_data(d);298	unsigned int gpio = irqd_to_hwirq(d);299 300	/* active-high, input, clear interrupt, enable interrupt */301	npcmgpio_direction_input(gc, gpio);302	npcmgpio_irq_ack(d);303	npcmgpio_irq_unmask(d);304 305	return 0;306}307 308static struct irq_chip npcmgpio_irqchip = {309	.name = "NPCM8XX-GPIO-IRQ",310	.irq_ack = npcmgpio_irq_ack,311	.irq_unmask = npcmgpio_irq_unmask,312	.irq_mask = npcmgpio_irq_mask,313	.irq_set_type = npcmgpio_set_irq_type,314	.irq_startup = npcmgpio_irq_startup,315	.flags =  IRQCHIP_MASK_ON_SUSPEND | IRQCHIP_IMMUTABLE,316	GPIOCHIP_IRQ_RESOURCE_HELPERS,317};318 319static const int gpi36_pins[] = { 36 };320static const int gpi35_pins[] = { 35 };321 322static const int tp_jtag3_pins[] = { 44, 62, 45, 46 };323static const int tp_uart_pins[] = { 50, 51 };324 325static const int tp_smb2_pins[] = { 24, 25 };326static const int tp_smb1_pins[] = { 142, 143 };327 328static const int tp_gpio7_pins[] = { 96 };329static const int tp_gpio6_pins[] = { 97 };330static const int tp_gpio5_pins[] = { 98 };331static const int tp_gpio4_pins[] = { 99 };332static const int tp_gpio3_pins[] = { 100 };333static const int tp_gpio2_pins[] = { 16 };334static const int tp_gpio1_pins[] = { 9 };335static const int tp_gpio0_pins[] = { 8 };336 337static const int tp_gpio2b_pins[] = { 101 };338static const int tp_gpio1b_pins[] = { 92 };339static const int tp_gpio0b_pins[] = { 91 };340 341static const int vgadig_pins[] = { 102, 103, 104, 105 };342 343static const int nbu1crts_pins[] = { 44, 62 };344 345static const int fm2_pins[] = { 224, 225, 226, 227, 228, 229, 230 };346static const int fm1_pins[] = { 175, 176, 177, 203, 191, 192, 233 };347static const int fm0_pins[] = { 194, 195, 196, 202, 199, 198, 197 };348 349static const int gpio1836_pins[] = { 183, 184, 185, 186 };350static const int gpio1889_pins[] = { 188, 189 };351static const int gpo187_pins[] = { 187 };352 353static const int cp1urxd_pins[] = { 41 };354static const int r3rxer_pins[] = { 212 };355 356static const int cp1gpio2c_pins[] = { 101 };357static const int cp1gpio3c_pins[] = { 100 };358 359static const int cp1gpio0b_pins[] = { 127 };360static const int cp1gpio1b_pins[] = { 126 };361static const int cp1gpio2b_pins[] = { 125 };362static const int cp1gpio3b_pins[] = { 124 };363static const int cp1gpio4b_pins[] = { 99 };364static const int cp1gpio5b_pins[] = { 98 };365static const int cp1gpio6b_pins[] = { 97 };366static const int cp1gpio7b_pins[] = { 96 };367 368static const int cp1gpio0_pins[] = {  };369static const int cp1gpio1_pins[] = {  };370static const int cp1gpio2_pins[] = {  };371static const int cp1gpio3_pins[] = {  };372static const int cp1gpio4_pins[] = {  };373static const int cp1gpio5_pins[] = { 17 };374static const int cp1gpio6_pins[] = { 91 };375static const int cp1gpio7_pins[] = { 92 };376 377static const int cp1utxd_pins[] = { 42 };378 379static const int spi1cs3_pins[] = { 192 };380static const int spi1cs2_pins[] = { 191 };381static const int spi1cs1_pins[] = { 233 };382static const int spi1cs0_pins[] = { 203 };383 384static const int spi1d23_pins[] = { 191, 192 };385 386static const int j2j3_pins[] = { 44, 62, 45, 46 };387 388static const int r3oen_pins[] = { 213 };389static const int r2oen_pins[] = { 90 };390static const int r1oen_pins[] = { 56 };391static const int bu4b_pins[] = { 98, 99 };392static const int bu4_pins[] = { 54, 55 };393static const int bu5b_pins[] = { 100, 101 };394static const int bu5_pins[] = { 52, 53 };395static const int bu6_pins[] = { 50, 51 };396static const int rmii3_pins[] = { 110, 111, 209, 211, 210, 214, 215 };397 398static const int jm1_pins[] = { 136, 137, 138, 139, 140 };399static const int jm2_pins[] = { 251 };400 401static const int tpgpio5b_pins[] = { 58 };402static const int tpgpio4b_pins[] = { 57 };403 404static const int clkrun_pins[] = { 162 };405 406static const int i3c5_pins[] = { 106, 107 };407static const int i3c4_pins[] = { 33, 34 };408static const int i3c3_pins[] = { 246, 247 };409static const int i3c2_pins[] = { 244, 245 };410static const int i3c1_pins[] = { 242, 243 };411static const int i3c0_pins[] = { 240, 241 };412 413static const int hsi1a_pins[] = { 43, 63 };414static const int hsi2a_pins[] = { 48, 49 };415static const int hsi1b_pins[] = { 44, 62 };416static const int hsi2b_pins[] = { 50, 51 };417static const int hsi1c_pins[] = { 45, 46, 47, 61 };418static const int hsi2c_pins[] = { 45, 46, 47, 61 };419 420static const int smb0_pins[]  = { 115, 114 };421static const int smb0b_pins[] = { 195, 194 };422static const int smb0c_pins[] = { 202, 196 };423static const int smb0d_pins[] = { 198, 199 };424static const int smb0den_pins[] = { 197 };425static const int smb1_pins[]  = { 117, 116 };426static const int smb1b_pins[] = { 126, 127 };427static const int smb1c_pins[] = { 124, 125 };428static const int smb1d_pins[] = { 4, 5 };429static const int smb2_pins[]  = { 119, 118 };430static const int smb2b_pins[] = { 122, 123 };431static const int smb2c_pins[] = { 120, 121 };432static const int smb2d_pins[] = { 6, 7 };433static const int smb3_pins[]  = { 30, 31 };434static const int smb3b_pins[] = { 39, 40 };435static const int smb3c_pins[] = { 37, 38 };436static const int smb3d_pins[] = { 59, 60 };437static const int smb4_pins[]  = { 28, 29 };438static const int smb4b_pins[] = { 18, 19 };439static const int smb4c_pins[] = { 20, 21 };440static const int smb4d_pins[] = { 22, 23 };441static const int smb5_pins[]  = { 26, 27 };442static const int smb5b_pins[] = { 13, 12 };443static const int smb5c_pins[] = { 15, 14 };444static const int smb5d_pins[] = { 94, 93 };445static const int ga20kbc_pins[] = { 94, 93 };446 447static const int smb6_pins[]  = { 172, 171 };448static const int smb6b_pins[] = { 2, 3 };449static const int smb6c_pins[]  = { 0, 1 };450static const int smb6d_pins[]  = { 10, 11 };451static const int smb7_pins[]  = { 174, 173 };452static const int smb7b_pins[]  = { 16, 141 };453static const int smb7c_pins[]  = { 24, 25 };454static const int smb7d_pins[]  = { 142, 143 };455static const int smb8_pins[]  = { 129, 128 };456static const int smb9_pins[]  = { 131, 130 };457static const int smb10_pins[] = { 133, 132 };458static const int smb11_pins[] = { 135, 134 };459static const int smb12_pins[] = { 221, 220 };460static const int smb13_pins[] = { 223, 222 };461static const int smb14_pins[] = { 22, 23 };462static const int smb14b_pins[] = { 32, 187 };463static const int smb15_pins[] = { 20, 21 };464static const int smb15b_pins[] = { 192, 191 };465 466static const int smb16_pins[] = { 10, 11 };467static const int smb16b_pins[] = { 218, 219 };468static const int smb17_pins[] = { 3, 2 };469static const int smb18_pins[] = { 0, 1 };470static const int smb19_pins[] = { 60, 59 };471static const int smb20_pins[] = { 234, 235 };472static const int smb21_pins[] = { 169, 170 };473static const int smb22_pins[] = { 40, 39 };474static const int smb23_pins[] = { 38, 37 };475static const int smb23b_pins[] = { 134, 135 };476 477static const int fanin0_pins[] = { 64 };478static const int fanin1_pins[] = { 65 };479static const int fanin2_pins[] = { 66 };480static const int fanin3_pins[] = { 67 };481static const int fanin4_pins[] = { 68 };482static const int fanin5_pins[] = { 69 };483static const int fanin6_pins[] = { 70 };484static const int fanin7_pins[] = { 71 };485static const int fanin8_pins[] = { 72 };486static const int fanin9_pins[] = { 73 };487static const int fanin10_pins[] = { 74 };488static const int fanin11_pins[] = { 75 };489static const int fanin12_pins[] = { 76 };490static const int fanin13_pins[] = { 77 };491static const int fanin14_pins[] = { 78 };492static const int fanin15_pins[] = { 79 };493static const int faninx_pins[] = { 175, 176, 177, 203 };494 495static const int pwm0_pins[] = { 80 };496static const int pwm1_pins[] = { 81 };497static const int pwm2_pins[] = { 82 };498static const int pwm3_pins[] = { 83 };499static const int pwm4_pins[] = { 144 };500static const int pwm5_pins[] = { 145 };501static const int pwm6_pins[] = { 146 };502static const int pwm7_pins[] = { 147 };503static const int pwm8_pins[] = { 220 };504static const int pwm9_pins[] = { 221 };505static const int pwm10_pins[] = { 234 };506static const int pwm11_pins[] = { 235 };507 508static const int uart1_pins[] = { 43, 45, 46, 47, 61, 62, 63 };509static const int uart2_pins[] = { 48, 49, 50, 51, 52, 53, 54, 55 };510 511static const int sg1mdio_pins[] = { 108, 109 };512 513static const int rg2_pins[] = { 110, 111, 112, 113, 208, 209, 210, 211, 212,514	213, 214, 215 };515static const int rg2mdio_pins[] = { 216, 217 };516 517static const int ddr_pins[] = { 110, 111, 112, 113, 208, 209, 210, 211, 212,518	213, 214, 215, 216, 217, 250 };519 520static const int iox1_pins[] = { 0, 1, 2, 3 };521static const int iox2_pins[] = { 4, 5, 6, 7 };522static const int ioxh_pins[] = { 10, 11, 24, 25 };523 524static const int mmc_pins[] = { 152, 154, 156, 157, 158, 159 };525static const int mmcwp_pins[] = { 153 };526static const int mmccd_pins[] = { 155 };527static const int mmcrst_pins[] = { 155 };528static const int mmc8_pins[] = { 148, 149, 150, 151 };529 530static const int r1_pins[] = { 178, 179, 180, 181, 182, 193, 201 };531static const int r1err_pins[] = { 56 };532static const int r1md_pins[] = { 57, 58 };533static const int r2_pins[] = { 84, 85, 86, 87, 88, 89, 200 };534static const int r2err_pins[] = { 90 };535static const int r2md_pins[] = { 91, 92 };536static const int sd1_pins[] = { 136, 137, 138, 139, 140, 141, 142, 143 };537static const int sd1pwr_pins[] = { 143 };538 539static const int wdog1_pins[] = { 218 };540static const int wdog2_pins[] = { 219 };541 542static const int bmcuart0a_pins[] = { 41, 42 };543static const int bmcuart0b_pins[] = { 48, 49 };544static const int bmcuart1_pins[] = { 43, 44, 62, 63 };545 546static const int scipme_pins[] = { 169 };547static const int smi_pins[] = { 170 };548static const int serirq_pins[] = { 168 };549 550static const int clkout_pins[] = { 160 };551static const int clkreq_pins[] = { 231 };552 553static const int jtag2_pins[] = { 43, 44, 45, 46, 47 };554static const int gspi_pins[] = { 12, 13, 14, 15 };555 556static const int spix_pins[] = { 224, 225, 226, 227, 229, 230 };557static const int spixcs1_pins[] = { 228 };558 559static const int spi1_pins[] = { 175, 176, 177 };560static const int pspi_pins[] = { 17, 18, 19 };561 562static const int spi0cs1_pins[] = { 32 };563 564static const int spi3_pins[] = { 183, 184, 185, 186 };565static const int spi3cs1_pins[] = { 187 };566static const int spi3quad_pins[] = { 188, 189 };567static const int spi3cs2_pins[] = { 188 };568static const int spi3cs3_pins[] = { 189 };569 570static const int ddc_pins[] = { 204, 205, 206, 207 };571 572static const int lpc_pins[] = { 95, 161, 163, 164, 165, 166, 167 };573static const int espi_pins[] = { 95, 161, 163, 164, 165, 166, 167, 168 };574 575static const int lkgpo0_pins[] = { 16 };576static const int lkgpo1_pins[] = { 8 };577static const int lkgpo2_pins[] = { 9 };578 579static const int nprd_smi_pins[] = { 190 };580 581static const int hgpio0_pins[] = { 20 };582static const int hgpio1_pins[] = { 21 };583static const int hgpio2_pins[] = { 22 };584static const int hgpio3_pins[] = { 23 };585static const int hgpio4_pins[] = { 24 };586static const int hgpio5_pins[] = { 25 };587static const int hgpio6_pins[] = { 59 };588static const int hgpio7_pins[] = { 60 };589 590/*591 * pin:	     name, number592 * group:    name, npins,   pins593 * function: name, ngroups, groups594 */595struct npcm8xx_pingroup {596	const char *name;597	const unsigned int *pins;598	int npins;599};600 601#define NPCM8XX_GRPS \602	NPCM8XX_GRP(gpi36), \603	NPCM8XX_GRP(gpi35), \604	NPCM8XX_GRP(tp_jtag3), \605	NPCM8XX_GRP(tp_uart), \606	NPCM8XX_GRP(tp_smb2), \607	NPCM8XX_GRP(tp_smb1), \608	NPCM8XX_GRP(tp_gpio7), \609	NPCM8XX_GRP(tp_gpio6), \610	NPCM8XX_GRP(tp_gpio5), \611	NPCM8XX_GRP(tp_gpio4), \612	NPCM8XX_GRP(tp_gpio3), \613	NPCM8XX_GRP(tp_gpio2), \614	NPCM8XX_GRP(tp_gpio1), \615	NPCM8XX_GRP(tp_gpio0), \616	NPCM8XX_GRP(tp_gpio2b), \617	NPCM8XX_GRP(tp_gpio1b), \618	NPCM8XX_GRP(tp_gpio0b), \619	NPCM8XX_GRP(vgadig), \620	NPCM8XX_GRP(nbu1crts), \621	NPCM8XX_GRP(fm2), \622	NPCM8XX_GRP(fm1), \623	NPCM8XX_GRP(fm0), \624	NPCM8XX_GRP(gpio1836), \625	NPCM8XX_GRP(gpio1889), \626	NPCM8XX_GRP(gpo187), \627	NPCM8XX_GRP(cp1urxd), \628	NPCM8XX_GRP(r3rxer), \629	NPCM8XX_GRP(cp1gpio2c), \630	NPCM8XX_GRP(cp1gpio3c), \631	NPCM8XX_GRP(cp1gpio0b), \632	NPCM8XX_GRP(cp1gpio1b), \633	NPCM8XX_GRP(cp1gpio2b), \634	NPCM8XX_GRP(cp1gpio3b), \635	NPCM8XX_GRP(cp1gpio4b), \636	NPCM8XX_GRP(cp1gpio5b), \637	NPCM8XX_GRP(cp1gpio6b), \638	NPCM8XX_GRP(cp1gpio7b), \639	NPCM8XX_GRP(cp1gpio0), \640	NPCM8XX_GRP(cp1gpio1), \641	NPCM8XX_GRP(cp1gpio2), \642	NPCM8XX_GRP(cp1gpio3), \643	NPCM8XX_GRP(cp1gpio4), \644	NPCM8XX_GRP(cp1gpio5), \645	NPCM8XX_GRP(cp1gpio6), \646	NPCM8XX_GRP(cp1gpio7), \647	NPCM8XX_GRP(cp1utxd), \648	NPCM8XX_GRP(spi1cs3), \649	NPCM8XX_GRP(spi1cs2), \650	NPCM8XX_GRP(spi1cs1), \651	NPCM8XX_GRP(spi1cs0), \652	NPCM8XX_GRP(spi1d23), \653	NPCM8XX_GRP(j2j3), \654	NPCM8XX_GRP(r3oen), \655	NPCM8XX_GRP(r2oen), \656	NPCM8XX_GRP(r1oen), \657	NPCM8XX_GRP(bu4b), \658	NPCM8XX_GRP(bu4), \659	NPCM8XX_GRP(bu5b), \660	NPCM8XX_GRP(bu5), \661	NPCM8XX_GRP(bu6), \662	NPCM8XX_GRP(rmii3), \663	NPCM8XX_GRP(jm1), \664	NPCM8XX_GRP(jm2), \665	NPCM8XX_GRP(tpgpio5b), \666	NPCM8XX_GRP(tpgpio4b), \667	NPCM8XX_GRP(clkrun), \668	NPCM8XX_GRP(i3c5), \669	NPCM8XX_GRP(i3c4), \670	NPCM8XX_GRP(i3c3), \671	NPCM8XX_GRP(i3c2), \672	NPCM8XX_GRP(i3c1), \673	NPCM8XX_GRP(i3c0), \674	NPCM8XX_GRP(hsi1a), \675	NPCM8XX_GRP(hsi2a), \676	NPCM8XX_GRP(hsi1b), \677	NPCM8XX_GRP(hsi2b), \678	NPCM8XX_GRP(hsi1c), \679	NPCM8XX_GRP(hsi2c), \680	NPCM8XX_GRP(smb0), \681	NPCM8XX_GRP(smb0b), \682	NPCM8XX_GRP(smb0c), \683	NPCM8XX_GRP(smb0d), \684	NPCM8XX_GRP(smb0den), \685	NPCM8XX_GRP(smb1), \686	NPCM8XX_GRP(smb1b), \687	NPCM8XX_GRP(smb1c), \688	NPCM8XX_GRP(smb1d), \689	NPCM8XX_GRP(smb2), \690	NPCM8XX_GRP(smb2b), \691	NPCM8XX_GRP(smb2c), \692	NPCM8XX_GRP(smb2d), \693	NPCM8XX_GRP(smb3), \694	NPCM8XX_GRP(smb3b), \695	NPCM8XX_GRP(smb3c), \696	NPCM8XX_GRP(smb3d), \697	NPCM8XX_GRP(smb4), \698	NPCM8XX_GRP(smb4b), \699	NPCM8XX_GRP(smb4c), \700	NPCM8XX_GRP(smb4d), \701	NPCM8XX_GRP(smb5), \702	NPCM8XX_GRP(smb5b), \703	NPCM8XX_GRP(smb5c), \704	NPCM8XX_GRP(smb5d), \705	NPCM8XX_GRP(ga20kbc), \706	NPCM8XX_GRP(smb6), \707	NPCM8XX_GRP(smb6b), \708	NPCM8XX_GRP(smb6c), \709	NPCM8XX_GRP(smb6d), \710	NPCM8XX_GRP(smb7), \711	NPCM8XX_GRP(smb7b), \712	NPCM8XX_GRP(smb7c), \713	NPCM8XX_GRP(smb7d), \714	NPCM8XX_GRP(smb8), \715	NPCM8XX_GRP(smb9), \716	NPCM8XX_GRP(smb10), \717	NPCM8XX_GRP(smb11), \718	NPCM8XX_GRP(smb12), \719	NPCM8XX_GRP(smb13), \720	NPCM8XX_GRP(smb14), \721	NPCM8XX_GRP(smb14b), \722	NPCM8XX_GRP(smb15), \723	NPCM8XX_GRP(smb15b), \724	NPCM8XX_GRP(smb16), \725	NPCM8XX_GRP(smb16b), \726	NPCM8XX_GRP(smb17), \727	NPCM8XX_GRP(smb18), \728	NPCM8XX_GRP(smb19), \729	NPCM8XX_GRP(smb20), \730	NPCM8XX_GRP(smb21), \731	NPCM8XX_GRP(smb22), \732	NPCM8XX_GRP(smb23), \733	NPCM8XX_GRP(smb23b), \734	NPCM8XX_GRP(fanin0), \735	NPCM8XX_GRP(fanin1), \736	NPCM8XX_GRP(fanin2), \737	NPCM8XX_GRP(fanin3), \738	NPCM8XX_GRP(fanin4), \739	NPCM8XX_GRP(fanin5), \740	NPCM8XX_GRP(fanin6), \741	NPCM8XX_GRP(fanin7), \742	NPCM8XX_GRP(fanin8), \743	NPCM8XX_GRP(fanin9), \744	NPCM8XX_GRP(fanin10), \745	NPCM8XX_GRP(fanin11), \746	NPCM8XX_GRP(fanin12), \747	NPCM8XX_GRP(fanin13), \748	NPCM8XX_GRP(fanin14), \749	NPCM8XX_GRP(fanin15), \750	NPCM8XX_GRP(faninx), \751	NPCM8XX_GRP(pwm0), \752	NPCM8XX_GRP(pwm1), \753	NPCM8XX_GRP(pwm2), \754	NPCM8XX_GRP(pwm3), \755	NPCM8XX_GRP(pwm4), \756	NPCM8XX_GRP(pwm5), \757	NPCM8XX_GRP(pwm6), \758	NPCM8XX_GRP(pwm7), \759	NPCM8XX_GRP(pwm8), \760	NPCM8XX_GRP(pwm9), \761	NPCM8XX_GRP(pwm10), \762	NPCM8XX_GRP(pwm11), \763	NPCM8XX_GRP(sg1mdio), \764	NPCM8XX_GRP(rg2), \765	NPCM8XX_GRP(rg2mdio), \766	NPCM8XX_GRP(ddr), \767	NPCM8XX_GRP(uart1), \768	NPCM8XX_GRP(uart2), \769	NPCM8XX_GRP(bmcuart0a), \770	NPCM8XX_GRP(bmcuart0b), \771	NPCM8XX_GRP(bmcuart1), \772	NPCM8XX_GRP(iox1), \773	NPCM8XX_GRP(iox2), \774	NPCM8XX_GRP(ioxh), \775	NPCM8XX_GRP(gspi), \776	NPCM8XX_GRP(mmc), \777	NPCM8XX_GRP(mmcwp), \778	NPCM8XX_GRP(mmccd), \779	NPCM8XX_GRP(mmcrst), \780	NPCM8XX_GRP(mmc8), \781	NPCM8XX_GRP(r1), \782	NPCM8XX_GRP(r1err), \783	NPCM8XX_GRP(r1md), \784	NPCM8XX_GRP(r2), \785	NPCM8XX_GRP(r2err), \786	NPCM8XX_GRP(r2md), \787	NPCM8XX_GRP(sd1), \788	NPCM8XX_GRP(sd1pwr), \789	NPCM8XX_GRP(wdog1), \790	NPCM8XX_GRP(wdog2), \791	NPCM8XX_GRP(scipme), \792	NPCM8XX_GRP(smi), \793	NPCM8XX_GRP(serirq), \794	NPCM8XX_GRP(jtag2), \795	NPCM8XX_GRP(spix), \796	NPCM8XX_GRP(spixcs1), \797	NPCM8XX_GRP(spi1), \798	NPCM8XX_GRP(pspi), \799	NPCM8XX_GRP(ddc), \800	NPCM8XX_GRP(clkreq), \801	NPCM8XX_GRP(clkout), \802	NPCM8XX_GRP(spi3), \803	NPCM8XX_GRP(spi3cs1), \804	NPCM8XX_GRP(spi3quad), \805	NPCM8XX_GRP(spi3cs2), \806	NPCM8XX_GRP(spi3cs3), \807	NPCM8XX_GRP(spi0cs1), \808	NPCM8XX_GRP(lpc), \809	NPCM8XX_GRP(espi), \810	NPCM8XX_GRP(lkgpo0), \811	NPCM8XX_GRP(lkgpo1), \812	NPCM8XX_GRP(lkgpo2), \813	NPCM8XX_GRP(nprd_smi), \814	NPCM8XX_GRP(hgpio0), \815	NPCM8XX_GRP(hgpio1), \816	NPCM8XX_GRP(hgpio2), \817	NPCM8XX_GRP(hgpio3), \818	NPCM8XX_GRP(hgpio4), \819	NPCM8XX_GRP(hgpio5), \820	NPCM8XX_GRP(hgpio6), \821	NPCM8XX_GRP(hgpio7), \822	\823 824enum {825#define NPCM8XX_GRP(x) fn_ ## x826	NPCM8XX_GRPS827	NPCM8XX_GRP(none),828	NPCM8XX_GRP(gpio),829#undef NPCM8XX_GRP830};831 832static struct npcm8xx_pingroup npcm8xx_pingroups[] = {833#define NPCM8XX_GRP(x) { .name = #x, .pins = x ## _pins, \834			.npins = ARRAY_SIZE(x ## _pins) }835	NPCM8XX_GRPS836#undef NPCM8XX_GRP837};838 839#define NPCM8XX_SFUNC(a) NPCM8XX_FUNC(a, #a)840#define NPCM8XX_FUNC(a, b...) static const char *a ## _grp[] = { b }841#define NPCM8XX_MKFUNC(nm) { .name = #nm, .ngroups = ARRAY_SIZE(nm ## _grp), \842			.groups = nm ## _grp }843struct npcm8xx_func {844	const char *name;845	const unsigned int ngroups;846	const char *const *groups;847};848 849NPCM8XX_SFUNC(gpi36);850NPCM8XX_SFUNC(gpi35);851NPCM8XX_SFUNC(tp_jtag3);852NPCM8XX_SFUNC(tp_uart);853NPCM8XX_SFUNC(tp_smb2);854NPCM8XX_SFUNC(tp_smb1);855NPCM8XX_SFUNC(tp_gpio7);856NPCM8XX_SFUNC(tp_gpio6);857NPCM8XX_SFUNC(tp_gpio5);858NPCM8XX_SFUNC(tp_gpio4);859NPCM8XX_SFUNC(tp_gpio3);860NPCM8XX_SFUNC(tp_gpio2);861NPCM8XX_SFUNC(tp_gpio1);862NPCM8XX_SFUNC(tp_gpio0);863NPCM8XX_SFUNC(tp_gpio2b);864NPCM8XX_SFUNC(tp_gpio1b);865NPCM8XX_SFUNC(tp_gpio0b);866NPCM8XX_SFUNC(vgadig);867NPCM8XX_SFUNC(nbu1crts);868NPCM8XX_SFUNC(fm2);869NPCM8XX_SFUNC(fm1);870NPCM8XX_SFUNC(fm0);871NPCM8XX_SFUNC(gpio1836);872NPCM8XX_SFUNC(gpio1889);873NPCM8XX_SFUNC(gpo187);874NPCM8XX_SFUNC(cp1urxd);875NPCM8XX_SFUNC(r3rxer);876NPCM8XX_SFUNC(cp1gpio2c);877NPCM8XX_SFUNC(cp1gpio3c);878NPCM8XX_SFUNC(cp1gpio0b);879NPCM8XX_SFUNC(cp1gpio1b);880NPCM8XX_SFUNC(cp1gpio2b);881NPCM8XX_SFUNC(cp1gpio3b);882NPCM8XX_SFUNC(cp1gpio4b);883NPCM8XX_SFUNC(cp1gpio5b);884NPCM8XX_SFUNC(cp1gpio6b);885NPCM8XX_SFUNC(cp1gpio7b);886NPCM8XX_SFUNC(cp1gpio0);887NPCM8XX_SFUNC(cp1gpio1);888NPCM8XX_SFUNC(cp1gpio2);889NPCM8XX_SFUNC(cp1gpio3);890NPCM8XX_SFUNC(cp1gpio4);891NPCM8XX_SFUNC(cp1gpio5);892NPCM8XX_SFUNC(cp1gpio6);893NPCM8XX_SFUNC(cp1gpio7);894NPCM8XX_SFUNC(cp1utxd);895NPCM8XX_SFUNC(spi1cs3);896NPCM8XX_SFUNC(spi1cs2);897NPCM8XX_SFUNC(spi1cs1);898NPCM8XX_SFUNC(spi1cs0);899NPCM8XX_SFUNC(spi1d23);900NPCM8XX_SFUNC(j2j3);901NPCM8XX_SFUNC(r3oen);902NPCM8XX_SFUNC(r2oen);903NPCM8XX_SFUNC(r1oen);904NPCM8XX_SFUNC(bu4b);905NPCM8XX_SFUNC(bu4);906NPCM8XX_SFUNC(bu5b);907NPCM8XX_SFUNC(bu5);908NPCM8XX_SFUNC(bu6);909NPCM8XX_SFUNC(rmii3);910NPCM8XX_SFUNC(jm1);911NPCM8XX_SFUNC(jm2);912NPCM8XX_SFUNC(tpgpio5b);913NPCM8XX_SFUNC(tpgpio4b);914NPCM8XX_SFUNC(clkrun);915NPCM8XX_SFUNC(i3c5);916NPCM8XX_SFUNC(i3c4);917NPCM8XX_SFUNC(i3c3);918NPCM8XX_SFUNC(i3c2);919NPCM8XX_SFUNC(i3c1);920NPCM8XX_SFUNC(i3c0);921NPCM8XX_SFUNC(hsi1a);922NPCM8XX_SFUNC(hsi2a);923NPCM8XX_SFUNC(hsi1b);924NPCM8XX_SFUNC(hsi2b);925NPCM8XX_SFUNC(hsi1c);926NPCM8XX_SFUNC(hsi2c);927NPCM8XX_SFUNC(smb0);928NPCM8XX_SFUNC(smb0b);929NPCM8XX_SFUNC(smb0c);930NPCM8XX_SFUNC(smb0d);931NPCM8XX_SFUNC(smb0den);932NPCM8XX_SFUNC(smb1);933NPCM8XX_SFUNC(smb1b);934NPCM8XX_SFUNC(smb1c);935NPCM8XX_SFUNC(smb1d);936NPCM8XX_SFUNC(smb2);937NPCM8XX_SFUNC(smb2b);938NPCM8XX_SFUNC(smb2c);939NPCM8XX_SFUNC(smb2d);940NPCM8XX_SFUNC(smb3);941NPCM8XX_SFUNC(smb3b);942NPCM8XX_SFUNC(smb3c);943NPCM8XX_SFUNC(smb3d);944NPCM8XX_SFUNC(smb4);945NPCM8XX_SFUNC(smb4b);946NPCM8XX_SFUNC(smb4c);947NPCM8XX_SFUNC(smb4d);948NPCM8XX_SFUNC(smb5);949NPCM8XX_SFUNC(smb5b);950NPCM8XX_SFUNC(smb5c);951NPCM8XX_SFUNC(smb5d);952NPCM8XX_SFUNC(ga20kbc);953NPCM8XX_SFUNC(smb6);954NPCM8XX_SFUNC(smb6b);955NPCM8XX_SFUNC(smb6c);956NPCM8XX_SFUNC(smb6d);957NPCM8XX_SFUNC(smb7);958NPCM8XX_SFUNC(smb7b);959NPCM8XX_SFUNC(smb7c);960NPCM8XX_SFUNC(smb7d);961NPCM8XX_SFUNC(smb8);962NPCM8XX_SFUNC(smb9);963NPCM8XX_SFUNC(smb10);964NPCM8XX_SFUNC(smb11);965NPCM8XX_SFUNC(smb12);966NPCM8XX_SFUNC(smb13);967NPCM8XX_SFUNC(smb14);968NPCM8XX_SFUNC(smb14b);969NPCM8XX_SFUNC(smb15);970NPCM8XX_SFUNC(smb16);971NPCM8XX_SFUNC(smb16b);972NPCM8XX_SFUNC(smb17);973NPCM8XX_SFUNC(smb18);974NPCM8XX_SFUNC(smb19);975NPCM8XX_SFUNC(smb20);976NPCM8XX_SFUNC(smb21);977NPCM8XX_SFUNC(smb22);978NPCM8XX_SFUNC(smb23);979NPCM8XX_SFUNC(smb23b);980NPCM8XX_SFUNC(fanin0);981NPCM8XX_SFUNC(fanin1);982NPCM8XX_SFUNC(fanin2);983NPCM8XX_SFUNC(fanin3);984NPCM8XX_SFUNC(fanin4);985NPCM8XX_SFUNC(fanin5);986NPCM8XX_SFUNC(fanin6);987NPCM8XX_SFUNC(fanin7);988NPCM8XX_SFUNC(fanin8);989NPCM8XX_SFUNC(fanin9);990NPCM8XX_SFUNC(fanin10);991NPCM8XX_SFUNC(fanin11);992NPCM8XX_SFUNC(fanin12);993NPCM8XX_SFUNC(fanin13);994NPCM8XX_SFUNC(fanin14);995NPCM8XX_SFUNC(fanin15);996NPCM8XX_SFUNC(faninx);997NPCM8XX_SFUNC(pwm0);998NPCM8XX_SFUNC(pwm1);999NPCM8XX_SFUNC(pwm2);1000NPCM8XX_SFUNC(pwm3);1001NPCM8XX_SFUNC(pwm4);1002NPCM8XX_SFUNC(pwm5);1003NPCM8XX_SFUNC(pwm6);1004NPCM8XX_SFUNC(pwm7);1005NPCM8XX_SFUNC(pwm8);1006NPCM8XX_SFUNC(pwm9);1007NPCM8XX_SFUNC(pwm10);1008NPCM8XX_SFUNC(pwm11);1009NPCM8XX_SFUNC(sg1mdio);1010NPCM8XX_SFUNC(rg2);1011NPCM8XX_SFUNC(rg2mdio);1012NPCM8XX_SFUNC(ddr);1013NPCM8XX_SFUNC(uart1);1014NPCM8XX_SFUNC(uart2);1015NPCM8XX_SFUNC(bmcuart0a);1016NPCM8XX_SFUNC(bmcuart0b);1017NPCM8XX_SFUNC(bmcuart1);1018NPCM8XX_SFUNC(iox1);1019NPCM8XX_SFUNC(iox2);1020NPCM8XX_SFUNC(ioxh);1021NPCM8XX_SFUNC(gspi);1022NPCM8XX_SFUNC(mmc);1023NPCM8XX_SFUNC(mmcwp);1024NPCM8XX_SFUNC(mmccd);1025NPCM8XX_SFUNC(mmcrst);1026NPCM8XX_SFUNC(mmc8);1027NPCM8XX_SFUNC(r1);1028NPCM8XX_SFUNC(r1err);1029NPCM8XX_SFUNC(r1md);1030NPCM8XX_SFUNC(r2);1031NPCM8XX_SFUNC(r2err);1032NPCM8XX_SFUNC(r2md);1033NPCM8XX_SFUNC(sd1);1034NPCM8XX_SFUNC(sd1pwr);1035NPCM8XX_SFUNC(wdog1);1036NPCM8XX_SFUNC(wdog2);1037NPCM8XX_SFUNC(scipme);1038NPCM8XX_SFUNC(smi);1039NPCM8XX_SFUNC(serirq);1040NPCM8XX_SFUNC(jtag2);1041NPCM8XX_SFUNC(spix);1042NPCM8XX_SFUNC(spixcs1);1043NPCM8XX_SFUNC(spi1);1044NPCM8XX_SFUNC(pspi);1045NPCM8XX_SFUNC(ddc);1046NPCM8XX_SFUNC(clkreq);1047NPCM8XX_SFUNC(clkout);1048NPCM8XX_SFUNC(spi3);1049NPCM8XX_SFUNC(spi3cs1);1050NPCM8XX_SFUNC(spi3quad);1051NPCM8XX_SFUNC(spi3cs2);1052NPCM8XX_SFUNC(spi3cs3);1053NPCM8XX_SFUNC(spi0cs1);1054NPCM8XX_SFUNC(lpc);1055NPCM8XX_SFUNC(espi);1056NPCM8XX_SFUNC(lkgpo0);1057NPCM8XX_SFUNC(lkgpo1);1058NPCM8XX_SFUNC(lkgpo2);1059NPCM8XX_SFUNC(nprd_smi);1060NPCM8XX_SFUNC(hgpio0);1061NPCM8XX_SFUNC(hgpio1);1062NPCM8XX_SFUNC(hgpio2);1063NPCM8XX_SFUNC(hgpio3);1064NPCM8XX_SFUNC(hgpio4);1065NPCM8XX_SFUNC(hgpio5);1066NPCM8XX_SFUNC(hgpio6);1067NPCM8XX_SFUNC(hgpio7);1068 1069/* Function names */1070static struct npcm8xx_func npcm8xx_funcs[] = {1071	NPCM8XX_MKFUNC(gpi36),1072	NPCM8XX_MKFUNC(gpi35),1073	NPCM8XX_MKFUNC(tp_jtag3),1074	NPCM8XX_MKFUNC(tp_uart),1075	NPCM8XX_MKFUNC(tp_smb2),1076	NPCM8XX_MKFUNC(tp_smb1),1077	NPCM8XX_MKFUNC(tp_gpio7),1078	NPCM8XX_MKFUNC(tp_gpio6),1079	NPCM8XX_MKFUNC(tp_gpio5),1080	NPCM8XX_MKFUNC(tp_gpio4),1081	NPCM8XX_MKFUNC(tp_gpio3),1082	NPCM8XX_MKFUNC(tp_gpio2),1083	NPCM8XX_MKFUNC(tp_gpio1),1084	NPCM8XX_MKFUNC(tp_gpio0),1085	NPCM8XX_MKFUNC(tp_gpio2b),1086	NPCM8XX_MKFUNC(tp_gpio1b),1087	NPCM8XX_MKFUNC(tp_gpio0b),1088	NPCM8XX_MKFUNC(vgadig),1089	NPCM8XX_MKFUNC(nbu1crts),1090	NPCM8XX_MKFUNC(fm2),1091	NPCM8XX_MKFUNC(fm1),1092	NPCM8XX_MKFUNC(fm0),1093	NPCM8XX_MKFUNC(gpio1836),1094	NPCM8XX_MKFUNC(gpio1889),1095	NPCM8XX_MKFUNC(gpo187),1096	NPCM8XX_MKFUNC(cp1urxd),1097	NPCM8XX_MKFUNC(r3rxer),1098	NPCM8XX_MKFUNC(cp1gpio2c),1099	NPCM8XX_MKFUNC(cp1gpio3c),1100	NPCM8XX_MKFUNC(cp1gpio0b),1101	NPCM8XX_MKFUNC(cp1gpio1b),1102	NPCM8XX_MKFUNC(cp1gpio2b),1103	NPCM8XX_MKFUNC(cp1gpio3b),1104	NPCM8XX_MKFUNC(cp1gpio4b),1105	NPCM8XX_MKFUNC(cp1gpio5b),1106	NPCM8XX_MKFUNC(cp1gpio6b),1107	NPCM8XX_MKFUNC(cp1gpio7b),1108	NPCM8XX_MKFUNC(cp1gpio0),1109	NPCM8XX_MKFUNC(cp1gpio1),1110	NPCM8XX_MKFUNC(cp1gpio2),1111	NPCM8XX_MKFUNC(cp1gpio3),1112	NPCM8XX_MKFUNC(cp1gpio4),1113	NPCM8XX_MKFUNC(cp1gpio5),1114	NPCM8XX_MKFUNC(cp1gpio6),1115	NPCM8XX_MKFUNC(cp1gpio7),1116	NPCM8XX_MKFUNC(cp1utxd),1117	NPCM8XX_MKFUNC(spi1cs3),1118	NPCM8XX_MKFUNC(spi1cs2),1119	NPCM8XX_MKFUNC(spi1cs1),1120	NPCM8XX_MKFUNC(spi1cs0),1121	NPCM8XX_MKFUNC(spi1d23),1122	NPCM8XX_MKFUNC(j2j3),1123	NPCM8XX_MKFUNC(r3oen),1124	NPCM8XX_MKFUNC(r2oen),1125	NPCM8XX_MKFUNC(r1oen),1126	NPCM8XX_MKFUNC(bu4b),1127	NPCM8XX_MKFUNC(bu4),1128	NPCM8XX_MKFUNC(bu5b),1129	NPCM8XX_MKFUNC(bu5),1130	NPCM8XX_MKFUNC(bu6),1131	NPCM8XX_MKFUNC(rmii3),1132	NPCM8XX_MKFUNC(jm1),1133	NPCM8XX_MKFUNC(jm2),1134	NPCM8XX_MKFUNC(tpgpio5b),1135	NPCM8XX_MKFUNC(tpgpio4b),1136	NPCM8XX_MKFUNC(clkrun),1137	NPCM8XX_MKFUNC(i3c5),1138	NPCM8XX_MKFUNC(i3c4),1139	NPCM8XX_MKFUNC(i3c3),1140	NPCM8XX_MKFUNC(i3c2),1141	NPCM8XX_MKFUNC(i3c1),1142	NPCM8XX_MKFUNC(i3c0),1143	NPCM8XX_MKFUNC(hsi1a),1144	NPCM8XX_MKFUNC(hsi2a),1145	NPCM8XX_MKFUNC(hsi1b),1146	NPCM8XX_MKFUNC(hsi2b),1147	NPCM8XX_MKFUNC(hsi1c),1148	NPCM8XX_MKFUNC(hsi2c),1149	NPCM8XX_MKFUNC(smb0),1150	NPCM8XX_MKFUNC(smb0b),1151	NPCM8XX_MKFUNC(smb0c),1152	NPCM8XX_MKFUNC(smb0d),1153	NPCM8XX_MKFUNC(smb0den),1154	NPCM8XX_MKFUNC(smb1),1155	NPCM8XX_MKFUNC(smb1b),1156	NPCM8XX_MKFUNC(smb1c),1157	NPCM8XX_MKFUNC(smb1d),1158	NPCM8XX_MKFUNC(smb2),1159	NPCM8XX_MKFUNC(smb2b),1160	NPCM8XX_MKFUNC(smb2c),1161	NPCM8XX_MKFUNC(smb2d),1162	NPCM8XX_MKFUNC(smb3),1163	NPCM8XX_MKFUNC(smb3b),1164	NPCM8XX_MKFUNC(smb3c),1165	NPCM8XX_MKFUNC(smb3d),1166	NPCM8XX_MKFUNC(smb4),1167	NPCM8XX_MKFUNC(smb4b),1168	NPCM8XX_MKFUNC(smb4c),1169	NPCM8XX_MKFUNC(smb4d),1170	NPCM8XX_MKFUNC(smb5),1171	NPCM8XX_MKFUNC(smb5b),1172	NPCM8XX_MKFUNC(smb5c),1173	NPCM8XX_MKFUNC(smb5d),1174	NPCM8XX_MKFUNC(ga20kbc),1175	NPCM8XX_MKFUNC(smb6),1176	NPCM8XX_MKFUNC(smb6b),1177	NPCM8XX_MKFUNC(smb6c),1178	NPCM8XX_MKFUNC(smb6d),1179	NPCM8XX_MKFUNC(smb7),1180	NPCM8XX_MKFUNC(smb7b),1181	NPCM8XX_MKFUNC(smb7c),1182	NPCM8XX_MKFUNC(smb7d),1183	NPCM8XX_MKFUNC(smb8),1184	NPCM8XX_MKFUNC(smb9),1185	NPCM8XX_MKFUNC(smb10),1186	NPCM8XX_MKFUNC(smb11),1187	NPCM8XX_MKFUNC(smb12),1188	NPCM8XX_MKFUNC(smb13),1189	NPCM8XX_MKFUNC(smb14),1190	NPCM8XX_MKFUNC(smb14b),1191	NPCM8XX_MKFUNC(smb15),1192	NPCM8XX_MKFUNC(smb16),1193	NPCM8XX_MKFUNC(smb16b),1194	NPCM8XX_MKFUNC(smb17),1195	NPCM8XX_MKFUNC(smb18),1196	NPCM8XX_MKFUNC(smb19),1197	NPCM8XX_MKFUNC(smb20),1198	NPCM8XX_MKFUNC(smb21),1199	NPCM8XX_MKFUNC(smb22),1200	NPCM8XX_MKFUNC(smb23),1201	NPCM8XX_MKFUNC(smb23b),1202	NPCM8XX_MKFUNC(fanin0),1203	NPCM8XX_MKFUNC(fanin1),1204	NPCM8XX_MKFUNC(fanin2),1205	NPCM8XX_MKFUNC(fanin3),1206	NPCM8XX_MKFUNC(fanin4),1207	NPCM8XX_MKFUNC(fanin5),1208	NPCM8XX_MKFUNC(fanin6),1209	NPCM8XX_MKFUNC(fanin7),1210	NPCM8XX_MKFUNC(fanin8),1211	NPCM8XX_MKFUNC(fanin9),1212	NPCM8XX_MKFUNC(fanin10),1213	NPCM8XX_MKFUNC(fanin11),1214	NPCM8XX_MKFUNC(fanin12),1215	NPCM8XX_MKFUNC(fanin13),1216	NPCM8XX_MKFUNC(fanin14),1217	NPCM8XX_MKFUNC(fanin15),1218	NPCM8XX_MKFUNC(faninx),1219	NPCM8XX_MKFUNC(pwm0),1220	NPCM8XX_MKFUNC(pwm1),1221	NPCM8XX_MKFUNC(pwm2),1222	NPCM8XX_MKFUNC(pwm3),1223	NPCM8XX_MKFUNC(pwm4),1224	NPCM8XX_MKFUNC(pwm5),1225	NPCM8XX_MKFUNC(pwm6),1226	NPCM8XX_MKFUNC(pwm7),1227	NPCM8XX_MKFUNC(pwm8),1228	NPCM8XX_MKFUNC(pwm9),1229	NPCM8XX_MKFUNC(pwm10),1230	NPCM8XX_MKFUNC(pwm11),1231	NPCM8XX_MKFUNC(sg1mdio),1232	NPCM8XX_MKFUNC(rg2),1233	NPCM8XX_MKFUNC(rg2mdio),1234	NPCM8XX_MKFUNC(ddr),1235	NPCM8XX_MKFUNC(uart1),1236	NPCM8XX_MKFUNC(uart2),1237	NPCM8XX_MKFUNC(bmcuart0a),1238	NPCM8XX_MKFUNC(bmcuart0b),1239	NPCM8XX_MKFUNC(bmcuart1),1240	NPCM8XX_MKFUNC(iox1),1241	NPCM8XX_MKFUNC(iox2),1242	NPCM8XX_MKFUNC(ioxh),1243	NPCM8XX_MKFUNC(gspi),1244	NPCM8XX_MKFUNC(mmc),1245	NPCM8XX_MKFUNC(mmcwp),1246	NPCM8XX_MKFUNC(mmccd),1247	NPCM8XX_MKFUNC(mmcrst),1248	NPCM8XX_MKFUNC(mmc8),1249	NPCM8XX_MKFUNC(r1),1250	NPCM8XX_MKFUNC(r1err),1251	NPCM8XX_MKFUNC(r1md),1252	NPCM8XX_MKFUNC(r2),1253	NPCM8XX_MKFUNC(r2err),1254	NPCM8XX_MKFUNC(r2md),1255	NPCM8XX_MKFUNC(sd1),1256	NPCM8XX_MKFUNC(sd1pwr),1257	NPCM8XX_MKFUNC(wdog1),1258	NPCM8XX_MKFUNC(wdog2),1259	NPCM8XX_MKFUNC(scipme),1260	NPCM8XX_MKFUNC(smi),1261	NPCM8XX_MKFUNC(serirq),1262	NPCM8XX_MKFUNC(jtag2),1263	NPCM8XX_MKFUNC(spix),1264	NPCM8XX_MKFUNC(spixcs1),1265	NPCM8XX_MKFUNC(spi1),1266	NPCM8XX_MKFUNC(pspi),1267	NPCM8XX_MKFUNC(ddc),1268	NPCM8XX_MKFUNC(clkreq),1269	NPCM8XX_MKFUNC(clkout),1270	NPCM8XX_MKFUNC(spi3),1271	NPCM8XX_MKFUNC(spi3cs1),1272	NPCM8XX_MKFUNC(spi3quad),1273	NPCM8XX_MKFUNC(spi3cs2),1274	NPCM8XX_MKFUNC(spi3cs3),1275	NPCM8XX_MKFUNC(spi0cs1),1276	NPCM8XX_MKFUNC(lpc),1277	NPCM8XX_MKFUNC(espi),1278	NPCM8XX_MKFUNC(lkgpo0),1279	NPCM8XX_MKFUNC(lkgpo1),1280	NPCM8XX_MKFUNC(lkgpo2),1281	NPCM8XX_MKFUNC(nprd_smi),1282	NPCM8XX_MKFUNC(hgpio0),1283	NPCM8XX_MKFUNC(hgpio1),1284	NPCM8XX_MKFUNC(hgpio2),1285	NPCM8XX_MKFUNC(hgpio3),1286	NPCM8XX_MKFUNC(hgpio4),1287	NPCM8XX_MKFUNC(hgpio5),1288	NPCM8XX_MKFUNC(hgpio6),1289	NPCM8XX_MKFUNC(hgpio7),1290};1291 1292#define NPCM8XX_PINCFG(a, b, c, d, e, f, g, h, i, j, k, l, m, n, o, p, q) \1293	[a] { .fn0 = fn_ ## b, .reg0 = NPCM8XX_GCR_ ## c, .bit0 = d, \1294			.fn1 = fn_ ## e, .reg1 = NPCM8XX_GCR_ ## f, .bit1 = g, \1295			.fn2 = fn_ ## h, .reg2 = NPCM8XX_GCR_ ## i, .bit2 = j, \1296			.fn3 = fn_ ## k, .reg3 = NPCM8XX_GCR_ ## l, .bit3 = m, \1297			.fn4 = fn_ ## n, .reg4 = NPCM8XX_GCR_ ## o, .bit4 = p, \1298			.flag = q }1299 1300/* Drive strength controlled by NPCM8XX_GP_N_ODSC */1301#define DRIVE_STRENGTH_LO_SHIFT		81302#define DRIVE_STRENGTH_HI_SHIFT		121303#define DRIVE_STRENGTH_MASK		GENMASK(15, 8)1304 1305#define DSTR(lo, hi)	(((lo) << DRIVE_STRENGTH_LO_SHIFT) | \1306			 ((hi) << DRIVE_STRENGTH_HI_SHIFT))1307#define DSLO(x)		(((x) >> DRIVE_STRENGTH_LO_SHIFT) & GENMASK(3, 0))1308#define DSHI(x)		(((x) >> DRIVE_STRENGTH_HI_SHIFT) & GENMASK(3, 0))1309 1310#define GPI		BIT(0) /* Not GPO */1311#define GPO		BIT(1) /* Not GPI */1312#define SLEW		BIT(2) /* Has Slew Control, NPCM8XX_GP_N_OSRC */1313#define SLEWLPC		BIT(3) /* Has Slew Control, SRCNT.3 */1314 1315struct npcm8xx_pincfg {1316	int flag;1317	int fn0, reg0, bit0;1318	int fn1, reg1, bit1;1319	int fn2, reg2, bit2;1320	int fn3, reg3, bit3;1321	int fn4, reg4, bit4;1322};1323 1324static const struct npcm8xx_pincfg pincfg[] = {1325	/*		PIN	  FUNCTION 1		   FUNCTION 2		  FUNCTION 3		FUNCTION 4		FUNCTION 5		FLAGS */1326	NPCM8XX_PINCFG(0,	iox1, MFSEL1, 30,	smb6c, I2CSEGSEL, 25,	smb18, MFSEL5, 26,	none, NONE, 0,		none, NONE, 0,		SLEW),1327	NPCM8XX_PINCFG(1,	iox1, MFSEL1, 30,	smb6c, I2CSEGSEL, 25,	smb18, MFSEL5, 26,	none, NONE, 0,		none, NONE, 0,		SLEW),1328	NPCM8XX_PINCFG(2,	iox1, MFSEL1, 30,	smb6b, I2CSEGSEL, 24,	smb17, MFSEL5, 25,	none, NONE, 0,		none, NONE, 0,		SLEW),1329	NPCM8XX_PINCFG(3,	iox1, MFSEL1, 30,	smb6b, I2CSEGSEL, 24,	smb17, MFSEL5, 25,	none, NONE, 0,		none, NONE, 0,		SLEW),1330	NPCM8XX_PINCFG(4,	iox2, MFSEL3, 14,	smb1d, I2CSEGSEL, 7,	none, NONE, 0,		none, NONE, 0,		none, NONE, 0,		SLEW),1331	NPCM8XX_PINCFG(5,	iox2, MFSEL3, 14,	smb1d, I2CSEGSEL, 7,	none, NONE, 0,		none, NONE, 0,		none, NONE, 0,		SLEW),1332	NPCM8XX_PINCFG(6,	iox2, MFSEL3, 14,	smb2d, I2CSEGSEL, 10,	none, NONE, 0,		none, NONE, 0,		none, NONE, 0,		SLEW),1333	NPCM8XX_PINCFG(7,	iox2, MFSEL3, 14,	smb2d, I2CSEGSEL, 10,	none, NONE, 0,		none, NONE, 0,		none, NONE, 0,		SLEW),1334	NPCM8XX_PINCFG(8,	lkgpo1,	FLOCKR1, 4,	tp_gpio0b, MFSEL7, 8,	none, NONE, 0,		none, NONE, 0,		none, NONE, 0,		DSTR(8, 12)),1335	NPCM8XX_PINCFG(9,	lkgpo2,	FLOCKR1, 8,	tp_gpio1b, MFSEL7, 9,	none, NONE, 0,		none, NONE, 0,		none, NONE, 0,		DSTR(8, 12)),1336	NPCM8XX_PINCFG(10,	ioxh, MFSEL3, 18,	smb6d, I2CSEGSEL, 26,	smb16, MFSEL5, 24,	none, NONE, 0,		none, NONE, 0,		SLEW),1337	NPCM8XX_PINCFG(11,	ioxh, MFSEL3, 18,	smb6d, I2CSEGSEL, 26,	smb16, MFSEL5, 24,	none, NONE, 0,		none, NONE, 0,		SLEW),1338	NPCM8XX_PINCFG(12,	gspi, MFSEL1, 24,	smb5b, I2CSEGSEL, 19,	none, NONE, 0,		none, NONE, 0,		none, NONE, 0,		SLEW),1339	NPCM8XX_PINCFG(13,	gspi, MFSEL1, 24,	smb5b, I2CSEGSEL, 19,	none, NONE, 0,		none, NONE, 0,		none, NONE, 0,		SLEW),1340	NPCM8XX_PINCFG(14,	gspi, MFSEL1, 24,	smb5c, I2CSEGSEL, 20,	none, NONE, 0,		none, NONE, 0,		none, NONE, 0,		SLEW),1341	NPCM8XX_PINCFG(15,	gspi, MFSEL1, 24,	smb5c, I2CSEGSEL, 20,	none, NONE, 0,		none, NONE, 0,		none, NONE, 0,		SLEW),1342	NPCM8XX_PINCFG(16,	lkgpo0, FLOCKR1, 0,	smb7b, I2CSEGSEL, 27,	tp_gpio2b, MFSEL7, 10,	none, NONE, 0,		none, NONE, 0,		SLEW),1343	NPCM8XX_PINCFG(17,	pspi, MFSEL3, 13,	cp1gpio5, MFSEL6, 7,	none, NONE, 0,		none, NONE, 0,		none, NONE, 0,		SLEW),1344	NPCM8XX_PINCFG(18,	pspi, MFSEL3, 13,	smb4b, I2CSEGSEL, 14,	none, NONE, 0,		none, NONE, 0,		none, NONE, 0,		SLEW),1345	NPCM8XX_PINCFG(19,	pspi, MFSEL3, 13,	smb4b, I2CSEGSEL, 14,	none, NONE, 0,		none, NONE, 0,		none, NONE, 0,		SLEW),1346	NPCM8XX_PINCFG(20,	hgpio0,	MFSEL2, 24,	smb15, MFSEL3, 8,	smb4c, I2CSEGSEL, 15,	none, NONE, 0,		none, NONE, 0,		SLEW),1347	NPCM8XX_PINCFG(21,	hgpio1,	MFSEL2, 25,	smb15, MFSEL3, 8,	smb4c, I2CSEGSEL, 15,	none, NONE, 0,		none, NONE, 0,		SLEW),1348	NPCM8XX_PINCFG(22,	hgpio2,	MFSEL2, 26,	smb14, MFSEL3, 7,	smb4d, I2CSEGSEL, 16,	none, NONE, 0,		none, NONE, 0,		SLEW),1349	NPCM8XX_PINCFG(23,	hgpio3,	MFSEL2, 27,	smb14, MFSEL3, 7,	smb4d, I2CSEGSEL, 16,	none, NONE, 0,		none, NONE, 0,		SLEW),1350	NPCM8XX_PINCFG(24,	hgpio4,	MFSEL2, 28,	ioxh, MFSEL3, 18,	smb7c, I2CSEGSEL, 28,	tp_smb2, MFSEL7, 28,	none, NONE, 0,		SLEW),1351	NPCM8XX_PINCFG(25,	hgpio5,	MFSEL2, 29,	ioxh, MFSEL3, 18,	smb7c, I2CSEGSEL, 28,	tp_smb2, MFSEL7, 28,	none, NONE, 0,		SLEW),1352	NPCM8XX_PINCFG(26,	smb5, MFSEL1, 2,	none, NONE, 0,		none, NONE, 0,		none, NONE, 0,		none, NONE, 0,		0),1353	NPCM8XX_PINCFG(27,	smb5, MFSEL1, 2,	none, NONE, 0,		none, NONE, 0,		none, NONE, 0,		none, NONE, 0,		0),1354	NPCM8XX_PINCFG(28,	smb4, MFSEL1, 1,	none, NONE, 0,		none, NONE, 0,		none, NONE, 0,		none, NONE, 0,		0),1355	NPCM8XX_PINCFG(29,	smb4, MFSEL1, 1,	none, NONE, 0,		none, NONE, 0,		none, NONE, 0,		none, NONE, 0,		0),1356	NPCM8XX_PINCFG(30,	smb3, MFSEL1, 0,	none, NONE, 0,		none, NONE, 0,		none, NONE, 0,		none, NONE, 0,		0),1357	NPCM8XX_PINCFG(31,	smb3, MFSEL1, 0,	none, NONE, 0,		none, NONE, 0,		none, NONE, 0,		none, NONE, 0,		0),1358	NPCM8XX_PINCFG(32,	spi0cs1, MFSEL1, 3,	smb14b, MFSEL7, 26,	none, NONE, 0,		none, NONE, 0,		none, NONE, 0,		SLEW),1359	NPCM8XX_PINCFG(33,	i3c4, MFSEL6, 10,	none, NONE, 0,		none, NONE, 0,		none, NONE, 0,		none, NONE, 0,		SLEW),1360	NPCM8XX_PINCFG(34,	i3c4, MFSEL6, 10,	none, NONE, 0,		none, NONE, 0,		none, NONE, 0,		none, NONE, 0,		SLEW),1361	NPCM8XX_PINCFG(35,	gpi35, MFSEL5, 16,	none, NONE, 0,		none, NONE, 0,		none, NONE, 0,		none, NONE, 0,		0),1362	NPCM8XX_PINCFG(36,	gpi36, MFSEL5, 18,	none, NONE, 0,		none, NONE, 0,		none, NONE, 0,		none, NONE, 0,		0),1363	NPCM8XX_PINCFG(37,	smb3c, I2CSEGSEL, 12,	smb23, MFSEL5, 31,	none, NONE, 0,		none, NONE, 0,		none, NONE, 0,		SLEW),1364	NPCM8XX_PINCFG(38,	smb3c, I2CSEGSEL, 12,	smb23, MFSEL5, 31,	none, NONE, 0,		none, NONE, 0,		none, NONE, 0,		SLEW),1365	NPCM8XX_PINCFG(39,	smb3b, I2CSEGSEL, 11,	smb22, MFSEL5, 30,	none, NONE, 0,		none, NONE, 0,		none, NONE, 0,		SLEW),1366	NPCM8XX_PINCFG(40,	smb3b, I2CSEGSEL, 11,	smb22, MFSEL5, 30,	none, NONE, 0,		none, NONE, 0,		none, NONE, 0,		SLEW),1367	NPCM8XX_PINCFG(41,	bmcuart0a, MFSEL1, 9,	cp1urxd, MFSEL6, 31,	none, NONE, 0,		none, NONE, 0,		none, NONE, 0,		0),1368	NPCM8XX_PINCFG(42,	bmcuart0a, MFSEL1, 9,	cp1utxd, MFSEL6, 1,	none, NONE, 0,		none, NONE, 0,		none, NONE, 0,		DSTR(2, 4) | GPO),1369	NPCM8XX_PINCFG(43,	uart1, MFSEL1, 10,	bmcuart1, MFSEL3, 24,	none, NONE, 0,		none, NONE, 0,		none, NONE, 0,		GPO),1370	NPCM8XX_PINCFG(44,	hsi1b, MFSEL1, 28,	nbu1crts, MFSEL6, 15,	jtag2, MFSEL4, 0,	tp_jtag3, MFSEL7, 13,	j2j3, MFSEL5, 2,	GPO),1371	NPCM8XX_PINCFG(45,	hsi1c, MFSEL1, 4,	jtag2, MFSEL4, 0,	j2j3, MFSEL5, 2,	tp_jtag3, MFSEL7, 13,	none, NONE, 0,		GPO),1372	NPCM8XX_PINCFG(46,	hsi1c, MFSEL1, 4,	jtag2, MFSEL4, 0,	j2j3, MFSEL5, 2,	tp_jtag3, MFSEL7, 13,	none, NONE, 0,		GPO),1373	NPCM8XX_PINCFG(47,	hsi1c, MFSEL1, 4,	none, NONE, 0,		none, NONE, 0,		none, NONE, 0,		none, NONE, 0,		DSTR(2, 8)),1374	NPCM8XX_PINCFG(48,	hsi2a, MFSEL1, 11,	bmcuart0b, MFSEL4, 1,	none, NONE, 0,		none, NONE, 0,		none, NONE, 0,		GPO),1375	NPCM8XX_PINCFG(49,	hsi2a, MFSEL1, 11,	bmcuart0b, MFSEL4, 1,	none, NONE, 0,		none, NONE, 0,		none, NONE, 0,		GPO),1376	NPCM8XX_PINCFG(50,	hsi2b, MFSEL1, 29,	bu6, MFSEL5, 6,		tp_uart, MFSEL7, 12,	none, NONE, 0,		none, NONE, 0,		GPO),1377	NPCM8XX_PINCFG(51,	hsi2b, MFSEL1, 29,	bu6, MFSEL5, 6,		tp_uart, MFSEL7, 12,	none, NONE, 0,		none, NONE, 0,		GPO),1378	NPCM8XX_PINCFG(52,	hsi2c, MFSEL1, 5,	bu5, MFSEL5, 7,		none, NONE, 0,		none, NONE, 0,		none, NONE, 0,		GPO),1379	NPCM8XX_PINCFG(53,	hsi2c, MFSEL1, 5,	bu5, MFSEL5, 7,		none, NONE, 0,		none, NONE, 0,		none, NONE, 0,		GPO),1380	NPCM8XX_PINCFG(54,	hsi2c, MFSEL1, 5,	bu4, MFSEL5, 8,		none, NONE, 0,		none, NONE, 0,		none, NONE, 0,		GPO),1381	NPCM8XX_PINCFG(55,	hsi2c, MFSEL1, 5,	bu4, MFSEL5, 8,		none, NONE, 0,		none, NONE, 0,		none, NONE, 0,		GPO),1382	NPCM8XX_PINCFG(56,	r1err, MFSEL1, 12,	r1oen, MFSEL5, 9,	none, NONE, 0,		none, NONE, 0,		none, NONE, 0,		GPO),1383	NPCM8XX_PINCFG(57,	r1md, MFSEL1, 13,	tpgpio4b, MFSEL5, 20,	none, NONE, 0,		none, NONE, 0,		none, NONE, 0,		DSTR(2, 4)),1384	NPCM8XX_PINCFG(58,	r1md, MFSEL1, 13,	tpgpio5b, MFSEL5, 22,	none, NONE, 0,		none, NONE, 0,		none, NONE, 0,		DSTR(2, 4)),1385	NPCM8XX_PINCFG(59,	hgpio6, MFSEL2, 30,	smb3d, I2CSEGSEL, 13,	smb19, MFSEL5, 27,	none, NONE, 0,		none, NONE, 0,		0),1386	NPCM8XX_PINCFG(60,	hgpio7, MFSEL2, 31,	smb3d, I2CSEGSEL, 13,	smb19, MFSEL5, 27,	none, NONE, 0,		none, NONE, 0,		0),1387	NPCM8XX_PINCFG(61,	hsi1c, MFSEL1, 4,	none, NONE, 0,		none, NONE, 0,		none, NONE, 0,		none, NONE, 0,		GPO),1388	NPCM8XX_PINCFG(62,	hsi1b, MFSEL1, 28,	jtag2, MFSEL4, 0,	j2j3, MFSEL5, 2,	nbu1crts, MFSEL6, 15,	tp_jtag3, MFSEL7, 13,	GPO),1389	NPCM8XX_PINCFG(63,	hsi1a, MFSEL1, 10,	bmcuart1, MFSEL3, 24,	none, NONE, 0,		none, NONE, 0,		none, NONE, 0,		GPO),1390	NPCM8XX_PINCFG(64,	fanin0, MFSEL2, 0,	none, NONE, 0,		none, NONE, 0,		none, NONE, 0,		none, NONE, 0,		GPO),1391	NPCM8XX_PINCFG(65,	fanin1, MFSEL2, 1,	none, NONE, 0,		none, NONE, 0,		none, NONE, 0,		none, NONE, 0,		GPO),1392	NPCM8XX_PINCFG(66,	fanin2, MFSEL2, 2,	none, NONE, 0,		none, NONE, 0,		none, NONE, 0,		none, NONE, 0,		GPO),1393	NPCM8XX_PINCFG(67,	fanin3, MFSEL2, 3,	none, NONE, 0,		none, NONE, 0,		none, NONE, 0,		none, NONE, 0,		GPO),1394	NPCM8XX_PINCFG(68,	fanin4, MFSEL2, 4,	none, NONE, 0,		none, NONE, 0,		none, NONE, 0,		none, NONE, 0,		GPO),1395	NPCM8XX_PINCFG(69,	fanin5, MFSEL2, 5,	none, NONE, 0,		none, NONE, 0,		none, NONE, 0,		none, NONE, 0,		GPO),1396	NPCM8XX_PINCFG(70,	fanin6, MFSEL2, 6,	none, NONE, 0,		none, NONE, 0,		none, NONE, 0,		none, NONE, 0,		GPO),1397	NPCM8XX_PINCFG(71,	fanin7, MFSEL2, 7,	none, NONE, 0,		none, NONE, 0,		none, NONE, 0,		none, NONE, 0,		GPO),1398	NPCM8XX_PINCFG(72,	fanin8, MFSEL2, 8,	none, NONE, 0,		none, NONE, 0,		none, NONE, 0,		none, NONE, 0,		GPO),1399	NPCM8XX_PINCFG(73,	fanin9, MFSEL2, 9,	none, NONE, 0,		none, NONE, 0,		none, NONE, 0,		none, NONE, 0,		GPO),1400	NPCM8XX_PINCFG(74,	fanin10, MFSEL2, 10,	none, NONE, 0,		none, NONE, 0,		none, NONE, 0,		none, NONE, 0,		GPO),1401	NPCM8XX_PINCFG(75,	fanin11, MFSEL2, 11,	none, NONE, 0,		none, NONE, 0,		none, NONE, 0,		none, NONE, 0,		GPO),1402	NPCM8XX_PINCFG(76,	fanin12, MFSEL2, 12,	none, NONE, 0,		none, NONE, 0,		none, NONE, 0,		none, NONE, 0,		GPO),1403	NPCM8XX_PINCFG(77,	fanin13, MFSEL2, 13,	none, NONE, 0,		none, NONE, 0,		none, NONE, 0,		none, NONE, 0,		GPO),1404	NPCM8XX_PINCFG(78,	fanin14, MFSEL2, 14,	none, NONE, 0,		none, NONE, 0,		none, NONE, 0,		none, NONE, 0,		GPO),1405	NPCM8XX_PINCFG(79,	fanin15, MFSEL2, 15,	none, NONE, 0,		none, NONE, 0,		none, NONE, 0,		none, NONE, 0,		GPO),1406	NPCM8XX_PINCFG(80,	pwm0, MFSEL2, 16,	none, NONE, 0,		none, NONE, 0,		none, NONE, 0,		none, NONE, 0,		DSTR(4, 8)),1407	NPCM8XX_PINCFG(81,	pwm1, MFSEL2, 17,	none, NONE, 0,		none, NONE, 0,		none, NONE, 0,		none, NONE, 0,		DSTR(4, 8)),1408	NPCM8XX_PINCFG(82,	pwm2, MFSEL2, 18,	none, NONE, 0,		none, NONE, 0,		none, NONE, 0,		none, NONE, 0,		DSTR(4, 8)),1409	NPCM8XX_PINCFG(83,	pwm3, MFSEL2, 19,	none, NONE, 0,		none, NONE, 0,		none, NONE, 0,		none, NONE, 0,		DSTR(4, 8)),1410	NPCM8XX_PINCFG(84,	r2, MFSEL1, 14,		none, NONE, 0,		none, NONE, 0,		none, NONE, 0,		none, NONE, 0,		DSTR(8, 12) | SLEW),1411	NPCM8XX_PINCFG(85,	r2, MFSEL1, 14,		none, NONE, 0,		none, NONE, 0,		none, NONE, 0,		none, NONE, 0,		DSTR(8, 12) | SLEW),1412	NPCM8XX_PINCFG(86,	r2, MFSEL1, 14,		none, NONE, 0,		none, NONE, 0,		none, NONE, 0,		none, NONE, 0,		DSTR(8, 12) | SLEW),1413	NPCM8XX_PINCFG(87,	r2, MFSEL1, 14,		none, NONE, 0,		none, NONE, 0,		none, NONE, 0,		none, NONE, 0,		GPO),1414	NPCM8XX_PINCFG(88,	r2, MFSEL1, 14,		none, NONE, 0,		none, NONE, 0,		none, NONE, 0,		none, NONE, 0,		GPO),1415	NPCM8XX_PINCFG(89,	r2, MFSEL1, 14,		none, NONE, 0,		none, NONE, 0,		none, NONE, 0,		none, NONE, 0,		GPO),1416	NPCM8XX_PINCFG(90,	r2err, MFSEL1, 15,	r2oen, MFSEL5, 10,	none, NONE, 0,		none, NONE, 0,		none, NONE, 0,		GPO),1417	NPCM8XX_PINCFG(91,	r2md, MFSEL1, 16,	cp1gpio6, MFSEL6, 8,	tp_gpio0, MFSEL7, 0,	none, NONE, 0,		none, NONE, 0,		DSTR(2, 4)),1418	NPCM8XX_PINCFG(92,	r2md, MFSEL1, 16,	cp1gpio7, MFSEL6, 9,	tp_gpio1, MFSEL7, 1,	none, NONE, 0,		none, NONE, 0,		DSTR(2, 4)),1419	NPCM8XX_PINCFG(93,	ga20kbc, MFSEL1, 17,	smb5d, I2CSEGSEL, 21,	none, NONE, 0,		none, NONE, 0,		none, NONE, 0,		0),1420	NPCM8XX_PINCFG(94,	ga20kbc, MFSEL1, 17,	smb5d, I2CSEGSEL, 21,	none, NONE, 0,		none, NONE, 0,		none, NONE, 0,		0),1421	NPCM8XX_PINCFG(95,	lpc, MFSEL1, 26,	espi, MFSEL4, 8,	none, NONE, 0,		none, NONE, 0,		none, NONE, 0,		0),1422	NPCM8XX_PINCFG(96,	cp1gpio7b, MFSEL6, 24,	tp_gpio7, MFSEL7, 7,	none, NONE, 0,		none, NONE, 0,		none, NONE, 0,		SLEW),1423	NPCM8XX_PINCFG(97,	cp1gpio6b, MFSEL6, 25,	tp_gpio6, MFSEL7, 6,	none, NONE, 0,		none, NONE, 0,		none, NONE, 0,		SLEW),1424	NPCM8XX_PINCFG(98,	bu4b, MFSEL5, 13,	cp1gpio5b, MFSEL6, 26,	tp_gpio5, MFSEL7, 5,	none, NONE, 0,		none, NONE, 0,		SLEW),1425	NPCM8XX_PINCFG(99,	bu4b, MFSEL5, 13,	cp1gpio4b, MFSEL6, 27,	tp_gpio4, MFSEL7, 4,	none, NONE, 0,		none, NONE, 0,		SLEW),1426	NPCM8XX_PINCFG(100,	bu5b, MFSEL5, 12,	cp1gpio3c, MFSEL6, 28,	tp_gpio3, MFSEL7, 3,	none, NONE, 0,		none, NONE, 0,		SLEW),1427	NPCM8XX_PINCFG(101,	bu5b, MFSEL5, 12,	cp1gpio2c, MFSEL6, 29,	tp_gpio2, MFSEL7, 2,	none, NONE, 0,		none, NONE, 0,		SLEW),1428	NPCM8XX_PINCFG(102,	vgadig, MFSEL7, 29,	none, NONE, 0,		none, NONE, 0,		none, NONE, 0,		none, NONE, 0,		DSTR(4, 8)),1429	NPCM8XX_PINCFG(103,	vgadig, MFSEL7, 29,	none, NONE, 0,		none, NONE, 0,		none, NONE, 0,		none, NONE, 0,		DSTR(4, 8)),1430	NPCM8XX_PINCFG(104,	vgadig, MFSEL7, 29,	none, NONE, 0,		none, NONE, 0,		none, NONE, 0,		none, NONE, 0,		0),1431	NPCM8XX_PINCFG(105,	vgadig, MFSEL7, 29,	none, NONE, 0,		none, NONE, 0,		none, NONE, 0,		none, NONE, 0,		0),1432	NPCM8XX_PINCFG(106,	i3c5, MFSEL3, 22,	none, NONE, 0,		none, NONE, 0,		none, NONE, 0,		none, NONE, 0,		SLEW),1433	NPCM8XX_PINCFG(107,	i3c5, MFSEL3, 22,	none, NONE, 0,		none, NONE, 0,		none, NONE, 0,		none, NONE, 0,		SLEW),1434	NPCM8XX_PINCFG(108,	sg1mdio, MFSEL4, 21,	none, NONE, 0,		none, NONE, 0,		none, NONE, 0,		none, NONE, 0,		SLEW),1435	NPCM8XX_PINCFG(109,	sg1mdio, MFSEL4, 21,	none, NONE, 0,		none, NONE, 0,		none, NONE, 0,		none, NONE, 0,		SLEW),1436	NPCM8XX_PINCFG(110,	rg2, MFSEL4, 24,	ddr, MFSEL3, 26,	rmii3, MFSEL5, 11,	none, NONE, 0,		none, NONE, 0,		SLEW),1437	NPCM8XX_PINCFG(111,	rg2, MFSEL4, 24,	ddr, MFSEL3, 26,	rmii3, MFSEL5, 11,	none, NONE, 0,		none, NONE, 0,		SLEW),1438	NPCM8XX_PINCFG(112,	rg2, MFSEL4, 24,	ddr, MFSEL3, 26,	none, NONE, 0,		none, NONE, 0,		none, NONE, 0,		SLEW),1439	NPCM8XX_PINCFG(113,	rg2, MFSEL4, 24,	ddr, MFSEL3, 26,	none, NONE, 0,		none, NONE, 0,		none, NONE, 0,		SLEW),1440	NPCM8XX_PINCFG(114,	smb0, MFSEL1, 6,	none, NONE, 0,		none, NONE, 0,		none, NONE, 0,		none, NONE, 0,		0),1441	NPCM8XX_PINCFG(115,	smb0, MFSEL1, 6,	none, NONE, 0,		none, NONE, 0,		none, NONE, 0,		none, NONE, 0,		0),1442	NPCM8XX_PINCFG(116,	smb1, MFSEL1, 7,	none, NONE, 0,		none, NONE, 0,		none, NONE, 0,		none, NONE, 0,		0),1443	NPCM8XX_PINCFG(117,	smb1, MFSEL1, 7,	none, NONE, 0,		none, NONE, 0,		none, NONE, 0,		none, NONE, 0,		0),1444	NPCM8XX_PINCFG(118,	smb2, MFSEL1, 8,	none, NONE, 0,		none, NONE, 0,		none, NONE, 0,		none, NONE, 0,		0),1445	NPCM8XX_PINCFG(119,	smb2, MFSEL1, 8,	none, NONE, 0,		none, NONE, 0,		none, NONE, 0,		none, NONE, 0,		0),1446	NPCM8XX_PINCFG(120,	smb2c, I2CSEGSEL, 9,	none, NONE, 0,		none, NONE, 0,		none, NONE, 0,		none, NONE, 0,		SLEW),1447	NPCM8XX_PINCFG(121,	smb2c, I2CSEGSEL, 9,	none, NONE, 0,		none, NONE, 0,		none, NONE, 0,		none, NONE, 0,		SLEW),1448	NPCM8XX_PINCFG(122,	smb2b, I2CSEGSEL, 8,	none, NONE, 0,		none, NONE, 0,		none, NONE, 0,		none, NONE, 0,		SLEW),1449	NPCM8XX_PINCFG(123,	smb2b, I2CSEGSEL, 8,	none, NONE, 0,		none, NONE, 0,		none, NONE, 0,		none, NONE, 0,		SLEW),1450	NPCM8XX_PINCFG(124,	smb1c, I2CSEGSEL, 6,	cp1gpio3b, MFSEL6, 23,	none, NONE, 0,		none, NONE, 0,		none, NONE, 0,		SLEW),1451	NPCM8XX_PINCFG(125,	smb1c, I2CSEGSEL, 6,	cp1gpio2b, MFSEL6, 22,	none, NONE, 0,		none, NONE, 0,		none, NONE, 0,		SLEW),1452	NPCM8XX_PINCFG(126,	smb1b, I2CSEGSEL, 5,	cp1gpio1b, MFSEL6, 21,	none, NONE, 0,		none, NONE, 0,		none, NONE, 0,		SLEW),1453	NPCM8XX_PINCFG(127,	smb1b, I2CSEGSEL, 5,	cp1gpio0b, MFSEL6, 20,	none, NONE, 0,		none, NONE, 0,		none, NONE, 0,		SLEW),1454	NPCM8XX_PINCFG(128,	smb8, MFSEL4, 11,	none, NONE, 0,		none, NONE, 0,		none, NONE, 0,		none, NONE, 0,		0),1455	NPCM8XX_PINCFG(129,	smb8, MFSEL4, 11,	none, NONE, 0,		none, NONE, 0,		none, NONE, 0,		none, NONE, 0,		0),1456	NPCM8XX_PINCFG(130,	smb9, MFSEL4, 12,	none, NONE, 0,		none, NONE, 0,		none, NONE, 0,		none, NONE, 0,		0),1457	NPCM8XX_PINCFG(131,	smb9, MFSEL4, 12,	none, NONE, 0,		none, NONE, 0,		none, NONE, 0,		none, NONE, 0,		0),1458	NPCM8XX_PINCFG(132,	smb10, MFSEL4, 13,	none, NONE, 0,		none, NONE, 0,		none, NONE, 0,		none, NONE, 0,		0),1459	NPCM8XX_PINCFG(133,	smb10, MFSEL4, 13,	none, NONE, 0,		none, NONE, 0,		none, NONE, 0,		none, NONE, 0,		0),1460	NPCM8XX_PINCFG(134,	smb11, MFSEL4, 14,	smb23b, MFSEL6, 0,	none, NONE, 0,		none, NONE, 0,		none, NONE, 0,		0),1461	NPCM8XX_PINCFG(135,	smb11, MFSEL4, 14,	smb23b, MFSEL6, 0,	none, NONE, 0,		none, NONE, 0,		none, NONE, 0,		0),1462	NPCM8XX_PINCFG(136,	jm1, MFSEL5, 15,	none, NONE, 0,		none, NONE, 0,		none, NONE, 0,		none, NONE, 0,		DSTR(8, 12) | SLEW),1463	NPCM8XX_PINCFG(137,	jm1, MFSEL5, 15,	none, NONE, 0,		none, NONE, 0,		none, NONE, 0,		none, NONE, 0,		DSTR(8, 12) | SLEW),1464	NPCM8XX_PINCFG(138,	jm1, MFSEL5, 15,	none, NONE, 0,		none, NONE, 0,		none, NONE, 0,		none, NONE, 0,		DSTR(8, 12) | SLEW),1465	NPCM8XX_PINCFG(139,	jm1, MFSEL5, 15,	none, NONE, 0,		none, NONE, 0,		none, NONE, 0,		none, NONE, 0,		DSTR(8, 12) | SLEW),1466	NPCM8XX_PINCFG(140,	jm1, MFSEL5, 15,	none, NONE, 0,		none, NONE, 0,		none, NONE, 0,		none, NONE, 0,		DSTR(8, 12) | SLEW),1467	NPCM8XX_PINCFG(141,	smb7b, I2CSEGSEL, 27,	none, NONE, 0,		none, NONE, 0,		none, NONE, 0,		none, NONE, 0,		0),1468	NPCM8XX_PINCFG(142,	smb7d, I2CSEGSEL, 29,	tp_smb1, MFSEL7, 11,	none, NONE, 0,		none, NONE, 0,		none, NONE, 0,		DSTR(8, 12) | SLEW),1469	NPCM8XX_PINCFG(143,	smb7d, I2CSEGSEL, 29,	tp_smb1, MFSEL7, 11,	none, NONE, 0,		none, NONE, 0,		none, NONE, 0,		0),1470	NPCM8XX_PINCFG(144,	pwm4, MFSEL2, 20,	none, NONE, 0,		none, NONE, 0,		none, NONE, 0,		none, NONE, 0,		DSTR(4, 8)),1471	NPCM8XX_PINCFG(145,	pwm5, MFSEL2, 21,	none, NONE, 0,		none, NONE, 0,		none, NONE, 0,		none, NONE, 0,		DSTR(4, 8)),1472	NPCM8XX_PINCFG(146,	pwm6, MFSEL2, 22,	none, NONE, 0,		none, NONE, 0,		none, NONE, 0,		none, NONE, 0,		DSTR(4, 8)),1473	NPCM8XX_PINCFG(147,	pwm7, MFSEL2, 23,	none, NONE, 0,		none, NONE, 0,		none, NONE, 0,		none, NONE, 0,		DSTR(4, 8)),1474	NPCM8XX_PINCFG(148,	mmc8, MFSEL3, 11,	none, NONE, 0,		none, NONE, 0,		none, NONE, 0,		none, NONE, 0,		DSTR(8, 12) | SLEW),1475	NPCM8XX_PINCFG(149,	mmc8, MFSEL3, 11,	none, NONE, 0,		none, NONE, 0,		none, NONE, 0,		none, NONE, 0,		DSTR(8, 12) | SLEW),1476	NPCM8XX_PINCFG(150,	mmc8, MFSEL3, 11,	none, NONE, 0,		none, NONE, 0,		none, NONE, 0,		none, NONE, 0,		DSTR(8, 12) | SLEW),1477	NPCM8XX_PINCFG(151,	mmc8, MFSEL3, 11,	none, NONE, 0,		none, NONE, 0,		none, NONE, 0,		none, NONE, 0,		DSTR(8, 12) | SLEW),1478	NPCM8XX_PINCFG(152,	mmc, MFSEL3, 10,	none, NONE, 0,		none, NONE, 0,		none, NONE, 0,		none, NONE, 0,		DSTR(8, 12) | SLEW),1479	NPCM8XX_PINCFG(153,	mmcwp, FLOCKR1, 24,	none, NONE, 0,		none, NONE, 0,		none, NONE, 0,		none, NONE, 0,		0),1480	NPCM8XX_PINCFG(154,	mmc, MFSEL3, 10,	none, NONE, 0,		none, NONE, 0,		none, NONE, 0,		none, NONE, 0,		DSTR(8, 12) | SLEW),1481	NPCM8XX_PINCFG(155,	mmccd, MFSEL3, 25,	mmcrst, MFSEL4, 6,	none, NONE, 0,		none, NONE, 0,		none, NONE, 0,		0),1482	NPCM8XX_PINCFG(156,	mmc, MFSEL3, 10,	none, NONE, 0,		none, NONE, 0,		none, NONE, 0,		none, NONE, 0,		DSTR(8, 12) | SLEW),1483	NPCM8XX_PINCFG(157,	mmc, MFSEL3, 10,	none, NONE, 0,		none, NONE, 0,		none, NONE, 0,		none, NONE, 0,		DSTR(8, 12) | SLEW),1484	NPCM8XX_PINCFG(158,	mmc, MFSEL3, 10,	none, NONE, 0,		none, NONE, 0,		none, NONE, 0,		none, NONE, 0,		DSTR(8, 12) | SLEW),1485	NPCM8XX_PINCFG(159,	mmc, MFSEL3, 10,	none, NONE, 0,		none, NONE, 0,		none, NONE, 0,		none, NONE, 0,		DSTR(8, 12) | SLEW),1486	NPCM8XX_PINCFG(160,	clkout, MFSEL1, 21,	none, NONE, 0,		none, NONE, 0,		none, NONE, 0,		none, NONE, 0,		DSTR(8, 12) | SLEW),1487	NPCM8XX_PINCFG(161,	lpc, MFSEL1, 26,	espi, MFSEL4, 8,	none, NONE, 0,		none, NONE, 0,		none, NONE, 0,		0),1488	NPCM8XX_PINCFG(162,	clkrun, MFSEL3, 16,	none, NONE, 0,		none, NONE, 0,		none, NONE, 0,		none, NONE, 0,		DSTR(8, 12)),1489	NPCM8XX_PINCFG(163,	lpc, MFSEL1, 26,	espi, MFSEL4, 8,	none, NONE, 0,		none, NONE, 0,		none, NONE, 0,		0),1490	NPCM8XX_PINCFG(164,	lpc, MFSEL1, 26,	espi, MFSEL4, 8,	none, NONE, 0,		none, NONE, 0,		none, NONE, 0,		0),1491	NPCM8XX_PINCFG(165,	lpc, MFSEL1, 26,	espi, MFSEL4, 8,	none, NONE, 0,		none, NONE, 0,		none, NONE, 0,		0),1492	NPCM8XX_PINCFG(166,	lpc, MFSEL1, 26,	espi, MFSEL4, 8,	none, NONE, 0,		none, NONE, 0,		none, NONE, 0,		0),1493	NPCM8XX_PINCFG(167,	lpc, MFSEL1, 26,	espi, MFSEL4, 8,	none, NONE, 0,		none, NONE, 0,		none, NONE, 0,		0),1494	NPCM8XX_PINCFG(168,	serirq, MFSEL1, 31,	espi, MFSEL4, 8,	none, NONE, 0,		none, NONE, 0,		none, NONE, 0,		0),1495	NPCM8XX_PINCFG(169,	scipme, MFSEL3, 0,	smb21, MFSEL5, 29,	none, NONE, 0,		none, NONE, 0,		none, NONE, 0,		0),1496	NPCM8XX_PINCFG(170,	smi, MFSEL1, 22,	smb21, MFSEL5, 29,	none, NONE, 0,		none, NONE, 0,		none, NONE, 0,		0),1497	NPCM8XX_PINCFG(171,	smb6, MFSEL3, 1,	none, NONE, 0,		none, NONE, 0,		none, NONE, 0,		none, NONE, 0,		0),1498	NPCM8XX_PINCFG(172,	smb6, MFSEL3, 1,	none, NONE, 0,		none, NONE, 0,		none, NONE, 0,		none, NONE, 0,		0),1499	NPCM8XX_PINCFG(173,	smb7, MFSEL3, 2,	none, NONE, 0,		none, NONE, 0,		none, NONE, 0,		none, NONE, 0,		0),1500	NPCM8XX_PINCFG(174,	smb7, MFSEL3, 2,	none, NONE, 0,		none, NONE, 0,		none, NONE, 0,		none, NONE, 0,		0),1501	NPCM8XX_PINCFG(175,	spi1, MFSEL3, 4,	faninx, MFSEL3, 3,	fm1, MFSEL6, 17,	none, NONE, 0,		none, NONE, 0,		DSTR(8, 12)),1502	NPCM8XX_PINCFG(176,	spi1, MFSEL3, 4,	faninx, MFSEL3, 3,	fm1, MFSEL6, 17,	none, NONE, 0,		none, NONE, 0,		DSTR(8, 12)),1503	NPCM8XX_PINCFG(177,	spi1, MFSEL3, 4,	faninx, MFSEL3, 3,	fm1, MFSEL6, 17,	none, NONE, 0,		none, NONE, 0,		DSTR(8, 12)),1504	NPCM8XX_PINCFG(178,	r1, MFSEL3, 9,		none, NONE, 0,		none, NONE, 0,		none, NONE, 0,		none, NONE, 0,		DSTR(8, 12) | SLEW),1505	NPCM8XX_PINCFG(179,	r1, MFSEL3, 9,		none, NONE, 0,		none, NONE, 0,		none, NONE, 0,		none, NONE, 0,		DSTR(8, 12) | SLEW),1506	NPCM8XX_PINCFG(180,	r1, MFSEL3, 9,		none, NONE, 0,		none, NONE, 0,		none, NONE, 0,		none, NONE, 0,		DSTR(8, 12) | SLEW),1507	NPCM8XX_PINCFG(181,	r1, MFSEL3, 9,		none, NONE, 0,		none, NONE, 0,		none, NONE, 0,		none, NONE, 0,		GPO),1508	NPCM8XX_PINCFG(182,	r1, MFSEL3, 9,		none, NONE, 0,		none, NONE, 0,		none, NONE, 0,		none, NONE, 0,		GPO),1509	NPCM8XX_PINCFG(183,	gpio1836, MFSEL6, 19,	spi3, MFSEL4, 16,	none, NONE, 0,		none, NONE, 0,		none, NONE, 0,		DSTR(8, 12) | SLEW),1510	NPCM8XX_PINCFG(184,	gpio1836, MFSEL6, 19,	spi3, MFSEL4, 16,	none, NONE, 0,		none, NONE, 0,		none, NONE, 0,		DSTR(8, 12) | SLEW),1511	NPCM8XX_PINCFG(185,	gpio1836, MFSEL6, 19,	spi3, MFSEL4, 16,	none, NONE, 0,		none, NONE, 0,		none, NONE, 0,		DSTR(8, 12) | SLEW),1512	NPCM8XX_PINCFG(186,	gpio1836, MFSEL6, 19,	spi3, MFSEL4, 16,	none, NONE, 0,		none, NONE, 0,		none, NONE, 0,		DSTR(8, 12)),1513	NPCM8XX_PINCFG(187,	gpo187, MFSEL7, 24,	smb14b, MFSEL7, 26,	spi3cs1, MFSEL4, 17,	none, NONE, 0,		none, NONE, 0,		SLEW),1514	NPCM8XX_PINCFG(188,	gpio1889, MFSEL7, 25,	spi3cs2, MFSEL4, 18,	spi3quad, MFSEL4, 20,	none, NONE, 0,		none, NONE, 0,		DSTR(8, 12) | SLEW),1515	NPCM8XX_PINCFG(189,	gpio1889, MFSEL7, 25,	spi3cs3, MFSEL4, 19,	spi3quad, MFSEL4, 20,	none, NONE, 0,		none, NONE, 0,		DSTR(8, 12) | SLEW),1516	NPCM8XX_PINCFG(190,	nprd_smi, FLOCKR1, 20,	none, NONE, 0,		none, NONE, 0,		none, NONE, 0,		none, NONE, 0,		DSTR(2, 4)),1517	NPCM8XX_PINCFG(191,	spi1d23, MFSEL5, 3,	spi1cs2, MFSEL5, 4,	fm1, MFSEL6, 17,	smb15, MFSEL7, 27,	none, NONE, 0,		SLEW),  /* XX */1518	NPCM8XX_PINCFG(192,	spi1d23, MFSEL5, 3,	spi1cs3, MFSEL5, 5,	fm1, MFSEL6, 17,	smb15, MFSEL7, 27,	none, NONE, 0,		SLEW),  /* XX */1519	NPCM8XX_PINCFG(193,	r1, MFSEL3, 9,		none, NONE, 0,		none, NONE, 0,		none, NONE, 0,		none, NONE, 0,		0),1520	NPCM8XX_PINCFG(194,	smb0b, I2CSEGSEL, 0,	fm0, MFSEL6, 16,	none, NONE, 0,		none, NONE, 0,		none, NONE, 0,		SLEW),1521	NPCM8XX_PINCFG(195,	smb0b, I2CSEGSEL, 0,	fm0, MFSEL6, 16,	none, NONE, 0,		none, NONE, 0,		none, NONE, 0,		SLEW),1522	NPCM8XX_PINCFG(196,	smb0c, I2CSEGSEL, 1,	fm0, MFSEL6, 16,	none, NONE, 0,		none, NONE, 0,		none, NONE, 0,		SLEW),1523	NPCM8XX_PINCFG(197,	smb0den, I2CSEGSEL, 22,	fm0, MFSEL6, 16,	none, NONE, 0,		none, NONE, 0,		none, NONE, 0,		SLEW),1524	NPCM8XX_PINCFG(198,	smb0d, I2CSEGSEL, 2,	fm0, MFSEL6, 16,	none, NONE, 0,		none, NONE, 0,		none, NONE, 0,		SLEW),1525	NPCM8XX_PINCFG(199,	smb0d, I2CSEGSEL, 2,	fm0, MFSEL6, 16,	none, NONE, 0,		none, NONE, 0,		none, NONE, 0,		SLEW),1526	NPCM8XX_PINCFG(200,	r2, MFSEL1, 14,		none, NONE, 0,		none, NONE, 0,		none, NONE, 0,		none, NONE, 0,		GPO),1527	NPCM8XX_PINCFG(201,	r1, MFSEL3, 9,		none, NONE, 0,		none, NONE, 0,		none, NONE, 0,		none, NONE, 0,		GPO),1528	NPCM8XX_PINCFG(202,	smb0c, I2CSEGSEL, 1,	fm0, MFSEL6, 16,	none, NONE, 0,		none, NONE, 0,		none, NONE, 0,		SLEW),1529	NPCM8XX_PINCFG(203,	faninx, MFSEL3, 3,	spi1cs0, MFSEL3, 4,	fm1, MFSEL6, 17,	none, NONE, 0,		none, NONE, 0,		DSTR(8, 12)),1530	NPCM8XX_PINCFG(208,	rg2, MFSEL4, 24,	ddr, MFSEL3, 26,	none, NONE, 0,		none, NONE, 0,		none, NONE, 0,		SLEW), /* DSCNT */1531	NPCM8XX_PINCFG(209,	rg2, MFSEL4, 24,	ddr, MFSEL3, 26,	rmii3, MFSEL5, 11,	none, NONE, 0,		none, NONE, 0,		SLEW), /* DSCNT */1532	NPCM8XX_PINCFG(210,	rg2, MFSEL4, 24,	ddr, MFSEL3, 26,	rmii3, MFSEL5, 11,	none, NONE, 0,		none, NONE, 0,		DSTR(8, 12) | SLEW),1533	NPCM8XX_PINCFG(211,	rg2, MFSEL4, 24,	ddr, MFSEL3, 26,	rmii3, MFSEL5, 11,	none, NONE, 0,		none, NONE, 0,		DSTR(8, 12) | SLEW),1534	NPCM8XX_PINCFG(212,	rg2, MFSEL4, 24,	ddr, MFSEL3, 26,	r3rxer, MFSEL6, 30,	none, NONE, 0,		none, NONE, 0,		DSTR(8, 12) | SLEW),1535	NPCM8XX_PINCFG(213,	rg2, MFSEL4, 24,	ddr, MFSEL3, 26,	r3oen, MFSEL5, 14,	none, NONE, 0,		none, NONE, 0,		DSTR(8, 12) | SLEW),1536	NPCM8XX_PINCFG(214,	rg2, MFSEL4, 24,	ddr, MFSEL3, 26,	rmii3, MFSEL5, 11,	none, NONE, 0,		none, NONE, 0,		DSTR(8, 12) | SLEW),1537	NPCM8XX_PINCFG(215,	rg2, MFSEL4, 24,	ddr, MFSEL3, 26,	rmii3, MFSEL5, 11,	none, NONE, 0,		none, NONE, 0,		DSTR(8, 12) | SLEW),1538	NPCM8XX_PINCFG(216,	rg2mdio, MFSEL4, 23,	ddr, MFSEL3, 26,	none, NONE, 0,		none, NONE, 0,		none, NONE, 0,		DSTR(8, 12) | SLEW),1539	NPCM8XX_PINCFG(217,	rg2mdio, MFSEL4, 23,	ddr, MFSEL3, 26,	none, NONE, 0,		none, NONE, 0,		none, NONE, 0,		DSTR(8, 12) | SLEW),1540	NPCM8XX_PINCFG(218,	wdog1, MFSEL3, 19,	smb16b, MFSEL7, 30,	none, NONE, 0,		none, NONE, 0,		none, NONE, 0,		SLEW),1541	NPCM8XX_PINCFG(219,	wdog2, MFSEL3, 20,	smb16b, MFSEL7, 30,	none, NONE, 0,		none, NONE, 0,		none, NONE, 0,		SLEW),1542	NPCM8XX_PINCFG(220,	smb12, MFSEL3, 5,	pwm8, MFSEL6, 11,	none, NONE, 0,		none, NONE, 0,		none, NONE, 0,		SLEW),1543	NPCM8XX_PINCFG(221,	smb12, MFSEL3, 5,	pwm9, MFSEL6, 12,	none, NONE, 0,		none, NONE, 0,		none, NONE, 0,		SLEW),1544	NPCM8XX_PINCFG(222,	smb13, MFSEL3, 6,	none, NONE, 0,		none, NONE, 0,		none, NONE, 0,		none, NONE, 0,		SLEW),1545	NPCM8XX_PINCFG(223,	smb13, MFSEL3, 6,	none, NONE, 0,		none, NONE, 0,		none, NONE, 0,		none, NONE, 0,		SLEW),1546	NPCM8XX_PINCFG(224,	spix, MFSEL4, 27,	fm2, MFSEL6, 18,	none, NONE, 0,		none, NONE, 0,		none, NONE, 0,		DSTR(8, 12) | SLEW),1547	NPCM8XX_PINCFG(225,	spix, MFSEL4, 27,	fm2, MFSEL6, 18,	none, NONE, 0,		none, NONE, 0,		none, NONE, 0,		DSTR(8, 12) | SLEW),1548	NPCM8XX_PINCFG(226,	none, NONE, 0,		none, NONE, 0,		none, NONE, 0,		none, NONE, 0,		none, NONE, 0,		GPO | DSTR(8, 12) | SLEW),1549	NPCM8XX_PINCFG(227,	spix, MFSEL4, 27,	fm2, MFSEL6, 18,	none, NONE, 0,		none, NONE, 0,		none, NONE, 0,		DSTR(8, 12) | SLEW),1550	NPCM8XX_PINCFG(228,	spixcs1, MFSEL4, 28,	fm2, MFSEL6, 18,	none, NONE, 0,		none, NONE, 0,		none, NONE, 0,		DSTR(8, 12) | SLEW),1551	NPCM8XX_PINCFG(229,	spix, MFSEL4, 27,	fm2, MFSEL6, 18,	none, NONE, 0,		none, NONE, 0,		none, NONE, 0,		GPO | DSTR(8, 12) | SLEW),1552	NPCM8XX_PINCFG(230,	spix, MFSEL4, 27,	fm2, MFSEL6, 18,	none, NONE, 0,		none, NONE, 0,		none, NONE, 0,		GPO | DSTR(8, 12) | SLEW),1553	NPCM8XX_PINCFG(231,	clkreq, MFSEL4, 9,	none, NONE, 0,		none, NONE, 0,		none, NONE, 0,		none, NONE, 0,		DSTR(4, 12) | SLEW),1554	NPCM8XX_PINCFG(233,	spi1cs1, MFSEL5, 0,	fm1, MFSEL6, 17,	none, NONE, 0,		none, NONE, 0,		none, NONE, 0,		0), /* slewlpc ? */1555	NPCM8XX_PINCFG(234,	pwm10, MFSEL6, 13,	smb20, MFSEL5, 28,	none, NONE, 0,		none, NONE, 0,		none, NONE, 0,		0),1556	NPCM8XX_PINCFG(235,	pwm11, MFSEL6, 14,	smb20, MFSEL5, 28,	none, NONE, 0,		none, NONE, 0,		none, NONE, 0,		SLEW),1557	NPCM8XX_PINCFG(240,	i3c0, MFSEL5, 17,	none, NONE, 0,		none, NONE, 0,		none, NONE, 0,		none, NONE, 0,		SLEW),1558	NPCM8XX_PINCFG(241,	i3c0, MFSEL5, 17,	none, NONE, 0,		none, NONE, 0,		none, NONE, 0,		none, NONE, 0,		SLEW),1559	NPCM8XX_PINCFG(242,	i3c1, MFSEL5, 19,	none, NONE, 0,		none, NONE, 0,		none, NONE, 0,		none, NONE, 0,		SLEW),1560	NPCM8XX_PINCFG(243,	i3c1, MFSEL5, 19,	none, NONE, 0,		none, NONE, 0,		none, NONE, 0,		none, NONE, 0,		SLEW),1561	NPCM8XX_PINCFG(244,	i3c2, MFSEL5, 21,	none, NONE, 0,		none, NONE, 0,		none, NONE, 0,		none, NONE, 0,		SLEW),1562	NPCM8XX_PINCFG(245,	i3c2, MFSEL5, 21,	none, NONE, 0,		none, NONE, 0,		none, NONE, 0,		none, NONE, 0,		SLEW),1563	NPCM8XX_PINCFG(246,	i3c3, MFSEL5, 23,	none, NONE, 0,		none, NONE, 0,		none, NONE, 0,		none, NONE, 0,		SLEW),1564	NPCM8XX_PINCFG(247,	i3c3, MFSEL5, 23,	none, NONE, 0,		none, NONE, 0,		none, NONE, 0,		none, NONE, 0,		SLEW),1565	NPCM8XX_PINCFG(250,	ddr, MFSEL3, 26,	none, NONE, 0,		none, NONE, 0,		none, NONE, 0,		none, NONE, 0,		DSTR(8, 12) | SLEW),1566	NPCM8XX_PINCFG(251,	jm2, MFSEL5, 1,		none, NONE, 0,		none, NONE, 0,		none, NONE, 0,		none, NONE, 0,		0),1567	NPCM8XX_PINCFG(253,	none, NONE, 0,		none, NONE, 0,		none, NONE, 0,		none, NONE, 0,		none, NONE, 0,		GPI), /* SDHC1 power */1568	NPCM8XX_PINCFG(254,	none, NONE, 0,		none, NONE, 0,		none, NONE, 0,		none, NONE, 0,		none, NONE, 0,		GPI), /* SDHC2 power */1569	NPCM8XX_PINCFG(255,	none, NONE, 0,		none, NONE, 0,		none, NONE, 0,		none, NONE, 0,		none, NONE, 0,		GPI), /* DACOSEL */1570};1571 1572/* number, name, drv_data */1573static const struct pinctrl_pin_desc npcm8xx_pins[] = {1574	PINCTRL_PIN(0,	"GPIO0/IOX1_DI/SMB6C_SDA/SMB18_SDA"),1575	PINCTRL_PIN(1,	"GPIO1/IOX1_LD/SMB6C_SCL/SMB18_SCL"),1576	PINCTRL_PIN(2,	"GPIO2/IOX1_CK/SMB6B_SDA/SMB17_SDA"),1577	PINCTRL_PIN(3,	"GPIO3/IOX1_DO/SMB6B_SCL/SMB17_SCL"),1578	PINCTRL_PIN(4,	"GPIO4/IOX2_DI/SMB1D_SDA"),1579	PINCTRL_PIN(5,	"GPIO5/IOX2_LD/SMB1D_SCL"),1580	PINCTRL_PIN(6,	"GPIO6/IOX2_CK/SMB2D_SDA"),1581	PINCTRL_PIN(7,	"GPIO7/IOX2_D0/SMB2D_SCL"),1582	PINCTRL_PIN(8,	"GPIO8/LKGPO1/TP_GPIO0"),1583	PINCTRL_PIN(9,	"GPIO9/LKGPO2/TP_GPIO1"),1584	PINCTRL_PIN(10, "GPIO10/IOXH_LD/SMB6D_SCL/SMB16_SCL"),1585	PINCTRL_PIN(11, "GPIO11/IOXH_CK/SMB6D_SDA/SMB16_SDA"),1586	PINCTRL_PIN(12, "GPIO12/GSPI_CK/SMB5B_SCL"),1587	PINCTRL_PIN(13, "GPIO13/GSPI_DO/SMB5B_SDA"),1588	PINCTRL_PIN(14, "GPIO14/GSPI_DI/SMB5C_SCL"),1589	PINCTRL_PIN(15, "GPIO15/GSPI_CS/SMB5C_SDA"),1590	PINCTRL_PIN(16, "GPIO16/SMB7B_SDA/LKGPO0/TP_GPIO2"),1591	PINCTRL_PIN(17, "GPIO17/PSPI_DI/CP1_GPIO5"),1592	PINCTRL_PIN(18, "GPIO18/PSPI_D0/SMB4B_SDA"),1593	PINCTRL_PIN(19, "GPIO19/PSPI_CK/SMB4B_SCL"),1594	PINCTRL_PIN(20, "GPIO20/H_GPIO0/SMB4C_SDA/SMB15_SDA"),1595	PINCTRL_PIN(21, "GPIO21/H_GPIO1/SMB4C_SCL/SMB15_SCL"),1596	PINCTRL_PIN(22, "GPIO22/H_GPIO2/SMB4D_SDA/SMB14_SDA"),1597	PINCTRL_PIN(23, "GPIO23/H_GPIO3/SMB4D_SCL/SMB14_SCL"),1598	PINCTRL_PIN(24, "GPIO24/IOXH_DO/H_GPIO4/SMB7C_SCL/TP_SMB2_SCL"),1599	PINCTRL_PIN(25, "GPIO25/IOXH_DI/H_GPIO4/SMB7C_SDA/TP_SMB2_SDA"),1600	PINCTRL_PIN(26, "GPIO26/SMB5_SDA"),1601	PINCTRL_PIN(27, "GPIO27/SMB5_SCL"),1602	PINCTRL_PIN(28, "GPIO28/SMB4_SDA"),1603	PINCTRL_PIN(29, "GPIO29/SMB4_SCL"),1604	PINCTRL_PIN(30, "GPIO30/SMB3_SDA"),1605	PINCTRL_PIN(31, "GPIO31/SMB3_SCL"),1606	PINCTRL_PIN(32, "GPIO32/SMB14B_SCL/SPI0_nCS1"),1607	PINCTRL_PIN(33, "GPIO33/I3C4_SCL"),1608	PINCTRL_PIN(34, "GPIO34/I3C4_SDA"),1609	PINCTRL_PIN(35, "MCBPCK/GPI35_AHB2PCI_DIS"),1610	PINCTRL_PIN(36, "SYSBPCK/GPI36"),1611	PINCTRL_PIN(37, "GPIO37/SMB3C_SDA/SMB23_SDA"),1612	PINCTRL_PIN(38, "GPIO38/SMB3C_SCL/SMB23_SCL"),1613	PINCTRL_PIN(39, "GPIO39/SMB3B_SDA/SMB22_SDA"),1614	PINCTRL_PIN(40, "GPIO40/SMB3B_SCL/SMB22_SCL"),1615	PINCTRL_PIN(41, "GPIO41/BU0_RXD/CP1U_RXD"),1616	PINCTRL_PIN(42, "GPIO42/BU0_TXD/CP1U_TXD"),1617	PINCTRL_PIN(43, "GPIO43/SI1_RXD/BU1_RXD"),1618	PINCTRL_PIN(44, "GPIO44/SI1_nCTS/BU1_nCTS/CP_TDI/TP_TDI/CP_TP_TDI"),1619	PINCTRL_PIN(45, "GPIO45/SI1_nDCD/CP_TMS_SWIO/TP_TMS_SWIO/CP_TP_TMS_SWIO"),1620	PINCTRL_PIN(46, "GPIO46/SI1_nDSR/CP_TCK_SWCLK/TP_TCK_SWCLK/CP_TP_TCK_SWCLK"),1621	PINCTRL_PIN(47, "GPIO47/SI1n_RI1"),1622	PINCTRL_PIN(48, "GPIO48/SI2_TXD/BU0_TXD/STRAP5"),1623	PINCTRL_PIN(49, "GPIO49/SI2_RXD/BU0_RXD"),1624	PINCTRL_PIN(50, "GPIO50/SI2_nCTS/BU6_TXD/TPU_TXD"),1625	PINCTRL_PIN(51, "GPIO51/SI2_nRTS/BU6_RXD/TPU_RXD"),1626	PINCTRL_PIN(52, "GPIO52/SI2_nDCD/BU5_RXD"),1627	PINCTRL_PIN(53, "GPIO53/SI2_nDTR_BOUT2/BU5_TXD"),1628	PINCTRL_PIN(54, "GPIO54/SI2_nDSR/BU4_TXD"),1629	PINCTRL_PIN(55, "GPIO55/SI2_RI2/BU4_RXD"),1630	PINCTRL_PIN(56, "GPIO56/R1_RXERR/R1_OEN"),1631	PINCTRL_PIN(57, "GPIO57/R1_MDC/TP_GPIO4"),1632	PINCTRL_PIN(58, "GPIO58/R1_MDIO/TP_GPIO5"),1633	PINCTRL_PIN(59, "GPIO59/H_GPIO06/SMB3D_SDA/SMB19_SDA"),1634	PINCTRL_PIN(60, "GPIO60/H_GPIO07/SMB3D_SCL/SMB19_SCL"),1635	PINCTRL_PIN(61, "GPIO61/SI1_nDTR_BOUT"),1636	PINCTRL_PIN(62, "GPIO62/SI1_nRTS/BU1_nRTS/CP_TDO_SWO/TP_TDO_SWO/CP_TP_TDO_SWO"),1637	PINCTRL_PIN(63, "GPIO63/BU1_TXD1/SI1_TXD"),1638	PINCTRL_PIN(64, "GPIO64/FANIN0"),1639	PINCTRL_PIN(65, "GPIO65/FANIN1"),1640	PINCTRL_PIN(66, "GPIO66/FANIN2"),1641	PINCTRL_PIN(67, "GPIO67/FANIN3"),1642	PINCTRL_PIN(68, "GPIO68/FANIN4"),1643	PINCTRL_PIN(69, "GPIO69/FANIN5"),1644	PINCTRL_PIN(70, "GPIO70/FANIN6"),1645	PINCTRL_PIN(71, "GPIO71/FANIN7"),1646	PINCTRL_PIN(72, "GPIO72/FANIN8"),1647	PINCTRL_PIN(73, "GPIO73/FANIN9"),1648	PINCTRL_PIN(74, "GPIO74/FANIN10"),1649	PINCTRL_PIN(75, "GPIO75/FANIN11"),1650	PINCTRL_PIN(76, "GPIO76/FANIN12"),1651	PINCTRL_PIN(77, "GPIO77/FANIN13"),1652	PINCTRL_PIN(78, "GPIO78/FANIN14"),1653	PINCTRL_PIN(79, "GPIO79/FANIN15"),1654	PINCTRL_PIN(80, "GPIO80/PWM0"),1655	PINCTRL_PIN(81, "GPIO81/PWM1"),1656	PINCTRL_PIN(82, "GPIO82/PWM2"),1657	PINCTRL_PIN(83, "GPIO83/PWM3"),1658	PINCTRL_PIN(84, "GPIO84/R2_TXD0"),1659	PINCTRL_PIN(85, "GPIO85/R2_TXD1"),1660	PINCTRL_PIN(86, "GPIO86/R2_TXEN"),1661	PINCTRL_PIN(87, "GPIO87/R2_RXD0"),1662	PINCTRL_PIN(88, "GPIO88/R2_RXD1"),1663	PINCTRL_PIN(89, "GPIO89/R2_CRSDV"),1664	PINCTRL_PIN(90, "GPIO90/R2_RXERR/R2_OEN"),1665	PINCTRL_PIN(91, "GPIO91/R2_MDC/CP1_GPIO6/TP_GPIO0"),1666	PINCTRL_PIN(92, "GPIO92/R2_MDIO/CP1_GPIO7/TP_GPIO1"),1667	PINCTRL_PIN(93, "GPIO93/GA20/SMB5D_SCL"),1668	PINCTRL_PIN(94, "GPIO94/nKBRST/SMB5D_SDA"),1669	PINCTRL_PIN(95, "GPIO95/nESPIRST/LPC_nLRESET"),1670	PINCTRL_PIN(96, "GPIO96/CP1_GPIO7/BU2_TXD/TP_GPIO7"),1671	PINCTRL_PIN(97, "GPIO97/CP1_GPIO6/BU2_RXD/TP_GPIO6"),1672	PINCTRL_PIN(98, "GPIO98/CP1_GPIO5/BU4_TXD/TP_GPIO5"),1673	PINCTRL_PIN(99, "GPIO99/CP1_GPIO4/BU4_RXD/TP_GPIO4"),1674	PINCTRL_PIN(100, "GPIO100/CP1_GPIO3/BU5_TXD/TP_GPIO3"),1675	PINCTRL_PIN(101, "GPIO101/CP1_GPIO2/BU5_RXD/TP_GPIO2"),1676	PINCTRL_PIN(102, "GPIO102/HSYNC"),1677	PINCTRL_PIN(103, "GPIO103/VSYNC"),1678	PINCTRL_PIN(104, "GPIO104/DDC_SCL"),1679	PINCTRL_PIN(105, "GPIO105/DDC_SDA"),1680	PINCTRL_PIN(106, "GPIO106/I3C5_SCL"),1681	PINCTRL_PIN(107, "GPIO107/I3C5_SDA"),1682	PINCTRL_PIN(108, "GPIO108/SG1_MDC"),1683	PINCTRL_PIN(109, "GPIO109/SG1_MDIO"),1684	PINCTRL_PIN(110, "GPIO110/RG2_TXD0/DDRV0/R3_TXD0"),1685	PINCTRL_PIN(111, "GPIO111/RG2_TXD1/DDRV1/R3_TXD1"),1686	PINCTRL_PIN(112, "GPIO112/RG2_TXD2/DDRV2"),1687	PINCTRL_PIN(113, "GPIO113/RG2_TXD3/DDRV3"),1688	PINCTRL_PIN(114, "GPIO114/SMB0_SCL"),1689	PINCTRL_PIN(115, "GPIO115/SMB0_SDA"),1690	PINCTRL_PIN(116, "GPIO116/SMB1_SCL"),1691	PINCTRL_PIN(117, "GPIO117/SMB1_SDA"),1692	PINCTRL_PIN(118, "GPIO118/SMB2_SCL"),1693	PINCTRL_PIN(119, "GPIO119/SMB2_SDA"),1694	PINCTRL_PIN(120, "GPIO120/SMB2C_SDA"),1695	PINCTRL_PIN(121, "GPIO121/SMB2C_SCL"),1696	PINCTRL_PIN(122, "GPIO122/SMB2B_SDA"),1697	PINCTRL_PIN(123, "GPIO123/SMB2B_SCL"),1698	PINCTRL_PIN(124, "GPIO124/SMB1C_SDA/CP1_GPIO3"),1699	PINCTRL_PIN(125, "GPIO125/SMB1C_SCL/CP1_GPIO2"),1700	PINCTRL_PIN(126, "GPIO126/SMB1B_SDA/CP1_GPIO1"),1701	PINCTRL_PIN(127, "GPIO127/SMB1B_SCL/CP1_GPIO0"),1702	PINCTRL_PIN(128, "GPIO128/SMB824_SCL"),1703	PINCTRL_PIN(129, "GPIO129/SMB824_SDA"),1704	PINCTRL_PIN(130, "GPIO130/SMB925_SCL"),1705	PINCTRL_PIN(131, "GPIO131/SMB925_SDA"),1706	PINCTRL_PIN(132, "GPIO132/SMB1026_SCL"),1707	PINCTRL_PIN(133, "GPIO133/SMB1026_SDA"),1708	PINCTRL_PIN(134, "GPIO134/SMB11_SCL/SMB23B_SCL"),1709	PINCTRL_PIN(135, "GPIO135/SMB11_SDA/SMB23B_SDA"),1710	PINCTRL_PIN(136, "GPIO136/JM1_TCK"),1711	PINCTRL_PIN(137, "GPIO137/JM1_TDO"),1712	PINCTRL_PIN(138, "GPIO138/JM1_TMS"),1713	PINCTRL_PIN(139, "GPIO139/JM1_TDI"),1714	PINCTRL_PIN(140, "GPIO140/JM1_nTRST"),1715	PINCTRL_PIN(141, "GPIO141/SMB7B_SCL"),1716	PINCTRL_PIN(142, "GPIO142/SMB7D_SCL/TPSMB1_SCL"),1717	PINCTRL_PIN(143, "GPIO143/SMB7D_SDA/TPSMB1_SDA"),1718	PINCTRL_PIN(144, "GPIO144/PWM4"),1719	PINCTRL_PIN(145, "GPIO145/PWM5"),1720	PINCTRL_PIN(146, "GPIO146/PWM6"),1721	PINCTRL_PIN(147, "GPIO147/PWM7"),1722	PINCTRL_PIN(148, "GPIO148/MMC_DT4"),1723	PINCTRL_PIN(149, "GPIO149/MMC_DT5"),1724	PINCTRL_PIN(150, "GPIO150/MMC_DT6"),1725	PINCTRL_PIN(151, "GPIO151/MMC_DT7"),1726	PINCTRL_PIN(152, "GPIO152/MMC_CLK"),1727	PINCTRL_PIN(153, "GPIO153/MMC_WP"),1728	PINCTRL_PIN(154, "GPIO154/MMC_CMD"),1729	PINCTRL_PIN(155, "GPIO155/MMC_nCD/MMC_nRSTLK"),1730	PINCTRL_PIN(156, "GPIO156/MMC_DT0"),1731	PINCTRL_PIN(157, "GPIO157/MMC_DT1"),1732	PINCTRL_PIN(158, "GPIO158/MMC_DT2"),1733	PINCTRL_PIN(159, "GPIO159/MMC_DT3"),1734	PINCTRL_PIN(160, "GPIO160/CLKOUT/RNGOSCOUT/GFXBYPCK"),1735	PINCTRL_PIN(161, "GPIO161/ESPI_nCS/LPC_nLFRAME"),1736	PINCTRL_PIN(162, "GPIO162/SERIRQ"),1737	PINCTRL_PIN(163, "GPIO163/ESPI_CK/LPC_LCLK"),1738	PINCTRL_PIN(164, "GPIO164/ESPI_IO0/LPC_LAD0"),1739	PINCTRL_PIN(165, "GPIO165/ESPI_IO1/LPC_LAD1"),1740	PINCTRL_PIN(166, "GPIO166/ESPI_IO2/LPC_LAD2"),1741	PINCTRL_PIN(167, "GPIO167/ESPI_IO3/LPC_LAD3"),1742	PINCTRL_PIN(168, "GPIO168/ESPI_nALERT/LPC_nCLKRUN"),1743	PINCTRL_PIN(169, "GPIO169/nSCIPME/SMB21_SCL"),1744	PINCTRL_PIN(170, "GPIO170/nSMI/SMB21_SDA"),1745	PINCTRL_PIN(171, "GPIO171/SMB6_SCL"),1746	PINCTRL_PIN(172, "GPIO172/SMB6_SDA"),1747	PINCTRL_PIN(173, "GPIO173/SMB7_SCL"),1748	PINCTRL_PIN(174, "GPIO174/SMB7_SDA"),1749	PINCTRL_PIN(175, "GPIO175/SPI1_CK/FANIN19/FM1_CK"),1750	PINCTRL_PIN(176, "GPIO176/SPI1_DO/FANIN18/FM1_DO/STRAP9"),1751	PINCTRL_PIN(177, "GPIO177/SPI1_DI/FANIN17/FM1_D1/STRAP10"),1752	PINCTRL_PIN(178, "GPIO178/R1_TXD0"),1753	PINCTRL_PIN(179, "GPIO179/R1_TXD1"),1754	PINCTRL_PIN(180, "GPIO180/R1_TXEN"),1755	PINCTRL_PIN(181, "GPIO181/R1_RXD0"),1756	PINCTRL_PIN(182, "GPIO182/R1_RXD1"),1757	PINCTRL_PIN(183, "GPIO183/SPI3_SEL"),1758	PINCTRL_PIN(184, "GPIO184/SPI3_D0/STRAP13"),1759	PINCTRL_PIN(185, "GPIO185/SPI3_D1"),1760	PINCTRL_PIN(186, "GPIO186/SPI3_nCS0"),1761	PINCTRL_PIN(187, "GPO187/SPI3_nCS1_SMB14B_SDA"),1762	PINCTRL_PIN(188, "GPIO188/SPI3_D2/SPI3_nCS2"),1763	PINCTRL_PIN(189, "GPIO189/SPI3_D3/SPI3_nCS3"),1764	PINCTRL_PIN(190, "GPIO190/nPRD_SMI"),1765	PINCTRL_PIN(191, "GPIO191/SPI1_D1/FANIN17/FM1_D1/STRAP10"),1766	PINCTRL_PIN(192, "GPIO192/SPI1_D3/SPI_nCS3/FM1_D3/SMB15_SCL"),1767	PINCTRL_PIN(193, "GPIO193/R1_CRSDV"),1768	PINCTRL_PIN(194, "GPIO194/SMB0B_SCL/FM0_CK"),1769	PINCTRL_PIN(195, "GPIO195/SMB0B_SDA/FM0_D0"),1770	PINCTRL_PIN(196, "GPIO196/SMB0C_SCL/FM0_D1"),1771	PINCTRL_PIN(197, "GPIO197/SMB0DEN/FM0_D3"),1772	PINCTRL_PIN(198, "GPIO198/SMB0D_SDA/FM0_D2"),1773	PINCTRL_PIN(199, "GPIO199/SMB0D_SCL/FM0_CSO"),1774	PINCTRL_PIN(200, "GPIO200/R2_CK"),1775	PINCTRL_PIN(201, "GPIO201/R1_CK"),1776	PINCTRL_PIN(202, "GPIO202/SMB0C_SDA/FM0_CSI"),1777	PINCTRL_PIN(203, "GPIO203/SPI1_nCS0/FANIN16/FM1_CSI"),1778	PINCTRL_PIN(208, "GPIO208/RG2_TXC/DVCK"),1779	PINCTRL_PIN(209, "GPIO209/RG2_TXCTL/DDRV4/R3_TXEN"),1780	PINCTRL_PIN(210, "GPIO210/RG2_RXD0/DDRV5/R3_RXD0"),1781	PINCTRL_PIN(211, "GPIO211/RG2_RXD1/DDRV6/R3_RXD1"),1782	PINCTRL_PIN(212, "GPIO212/RG2_RXD2/DDRV7/R3_RXD2"),1783	PINCTRL_PIN(213, "GPIO213/RG2_RXD3/DDRV8/R3_OEN"),1784	PINCTRL_PIN(214, "GPIO214/RG2_RXC/DDRV9/R3_CK"),1785	PINCTRL_PIN(215, "GPIO215/RG2_RXCTL/DDRV10/R3_CRSDV"),1786	PINCTRL_PIN(216, "GPIO216/RG2_MDC/DDRV11"),1787	PINCTRL_PIN(217, "GPIO217/RG2_MDIO/DVHSYNC"),1788	PINCTRL_PIN(218, "GPIO218/nWDO1/SMB16_SCL"),1789	PINCTRL_PIN(219, "GPIO219/nWDO2/SMB16_SDA"),1790	PINCTRL_PIN(220, "GPIO220/SMB12_SCL/PWM8"),1791	PINCTRL_PIN(221, "GPIO221/SMB12_SDA/PWM9"),1792	PINCTRL_PIN(222, "GPIO222/SMB13_SCL"),1793	PINCTRL_PIN(223, "GPIO223/SMB13_SDA"),1794	PINCTRL_PIN(224, "GPIO224/SPIX_CK/FM2_CK"),1795	PINCTRL_PIN(225, "GPO225/SPIX_D0/FM2_D0/STRAP1"),1796	PINCTRL_PIN(226, "GPO226/SPIX_D1/FM2_D1/STRAP2"),1797	PINCTRL_PIN(227, "GPIO227/SPIX_nCS0/FM2_CSI"),1798	PINCTRL_PIN(228, "GPIO228/SPIX_nCS1/FM2_CSO"),1799	PINCTRL_PIN(229, "GPO229/SPIX_D2/FM2_D2/STRAP3"),1800	PINCTRL_PIN(230, "GPO230/SPIX_D3/FM2_D3/STRAP6"),1801	PINCTRL_PIN(231, "GPIO231/EP_nCLKREQ"),1802	PINCTRL_PIN(233, "GPIO233/SPI1_nCS1/FM1_CSO"),1803	PINCTRL_PIN(234, "GPIO234/PWM10/SMB20_SCL"),1804	PINCTRL_PIN(235, "GPIO235/PWM11/SMB20_SDA"),1805	PINCTRL_PIN(240, "GPIO240/I3C0_SCL"),1806	PINCTRL_PIN(241, "GPIO241/I3C0_SDA"),1807	PINCTRL_PIN(242, "GPIO242/I3C1_SCL"),1808	PINCTRL_PIN(243, "GPIO243/I3C1_SDA"),1809	PINCTRL_PIN(244, "GPIO244/I3C2_SCL"),1810	PINCTRL_PIN(245, "GPIO245/I3C2_SDA"),1811	PINCTRL_PIN(246, "GPIO246/I3C3_SCL"),1812	PINCTRL_PIN(247, "GPIO247/I3C3_SDA"),1813	PINCTRL_PIN(250, "GPIO250/RG2_REFCK/DVVSYNC"),1814	PINCTRL_PIN(251, "JM2/CP1_GPIO"),1815	};1816 1817/* Enable mode in pin group */1818static void npcm8xx_setfunc(struct regmap *gcr_regmap, const unsigned int *pin,1819			    int pin_number, int mode)1820{1821	const struct npcm8xx_pincfg *cfg;1822	int i;1823 1824	for (i = 0 ; i < pin_number ; i++) {1825		cfg = &pincfg[pin[i]];1826		if (mode == fn_gpio || cfg->fn0 == mode || cfg->fn1 == mode ||1827		    cfg->fn2 == mode || cfg->fn3 == mode || cfg->fn4 == mode) {1828			if (cfg->reg0)1829				regmap_update_bits(gcr_regmap, cfg->reg0,1830						   BIT(cfg->bit0),1831						   (cfg->fn0 == mode) ?1832						   BIT(cfg->bit0) : 0);1833			if (cfg->reg1)1834				regmap_update_bits(gcr_regmap, cfg->reg1,1835						   BIT(cfg->bit1),1836						   (cfg->fn1 == mode) ?1837						   BIT(cfg->bit1) : 0);1838			if (cfg->reg2)1839				regmap_update_bits(gcr_regmap, cfg->reg2,1840						   BIT(cfg->bit2),1841						   (cfg->fn2 == mode) ?1842						   BIT(cfg->bit2) : 0);1843			if (cfg->reg3)1844				regmap_update_bits(gcr_regmap, cfg->reg3,1845						   BIT(cfg->bit3),1846						   (cfg->fn3 == mode) ?1847						   BIT(cfg->bit3) : 0);1848			if (cfg->reg4)1849				regmap_update_bits(gcr_regmap, cfg->reg4,1850						   BIT(cfg->bit4),1851						   (cfg->fn4 == mode) ?1852						   BIT(cfg->bit4) : 0);1853		}1854	}1855}1856 1857static int npcm8xx_get_slew_rate(struct npcm8xx_gpio *bank,1858				 struct regmap *gcr_regmap, unsigned int pin)1859{1860	int gpio = pin % bank->gc.ngpio;1861	unsigned long pinmask = BIT(gpio);1862	u32 val;1863 1864	if (pincfg[pin].flag & SLEW)1865		return ioread32(bank->base + NPCM8XX_GP_N_OSRC) & pinmask;1866	/* LPC Slew rate in SRCNT register */1867	if (pincfg[pin].flag & SLEWLPC) {1868		regmap_read(gcr_regmap, NPCM8XX_GCR_SRCNT, &val);1869		return !!(val & SRCNT_ESPI);1870	}1871 1872	return -EINVAL;1873}1874 1875static int npcm8xx_set_slew_rate(struct npcm8xx_gpio *bank,1876				 struct regmap *gcr_regmap, unsigned int pin,1877				 int arg)1878{1879	void __iomem *OSRC_Offset = bank->base + NPCM8XX_GP_N_OSRC;1880	int gpio = BIT(pin % bank->gc.ngpio);1881 1882	if (pincfg[pin].flag & SLEW) {1883		switch (arg) {1884		case 0:1885			npcm_gpio_clr(&bank->gc, OSRC_Offset, gpio);1886			return 0;1887		case 1:1888			npcm_gpio_set(&bank->gc, OSRC_Offset, gpio);1889			return 0;1890		default:1891			return -EINVAL;1892		}1893	}1894 1895	if (!(pincfg[pin].flag & SLEWLPC))1896		return -EINVAL;1897 1898	switch (arg) {1899	case 0:1900		regmap_update_bits(gcr_regmap, NPCM8XX_GCR_SRCNT,1901				   SRCNT_ESPI, 0);1902		break;1903	case 1:1904		regmap_update_bits(gcr_regmap, NPCM8XX_GCR_SRCNT,1905				   SRCNT_ESPI, SRCNT_ESPI);1906		break;1907	default:1908		return -EINVAL;1909		}1910 1911	return 0;1912}1913 1914static int npcm8xx_get_drive_strength(struct pinctrl_dev *pctldev,1915				      unsigned int pin)1916{1917	struct npcm8xx_pinctrl *npcm = pinctrl_dev_get_drvdata(pctldev);1918	struct npcm8xx_gpio *bank =1919		&npcm->gpio_bank[pin / NPCM8XX_GPIO_PER_BANK];1920	int gpio = pin % bank->gc.ngpio;1921	unsigned long pinmask = BIT(gpio);1922	int flg, val;1923	u32 ds = 0;1924 1925	flg = pincfg[pin].flag;1926	if (!(flg & DRIVE_STRENGTH_MASK))1927		return -EINVAL;1928 1929	val = ioread32(bank->base + NPCM8XX_GP_N_ODSC) & pinmask;1930	ds = val ? DSHI(flg) : DSLO(flg);1931	dev_dbg(bank->gc.parent, "pin %d strength %d = %d\n", pin, val, ds);1932 1933	return ds;1934}1935 1936static int npcm8xx_set_drive_strength(struct npcm8xx_pinctrl *npcm,1937				      unsigned int pin, int nval)1938{1939	struct npcm8xx_gpio *bank =1940		&npcm->gpio_bank[pin / NPCM8XX_GPIO_PER_BANK];1941	int gpio = BIT(pin % bank->gc.ngpio);1942	int v;1943 1944	v = pincfg[pin].flag & DRIVE_STRENGTH_MASK;1945 1946	if (DSLO(v) == nval)1947		npcm_gpio_clr(&bank->gc, bank->base + NPCM8XX_GP_N_ODSC, gpio);1948	else if (DSHI(v) == nval)1949		npcm_gpio_set(&bank->gc, bank->base + NPCM8XX_GP_N_ODSC, gpio);1950	else1951		return -ENOTSUPP;1952 1953	return 0;1954}1955 1956/* pinctrl_ops */1957static int npcm8xx_get_groups_count(struct pinctrl_dev *pctldev)1958{1959	return ARRAY_SIZE(npcm8xx_pingroups);1960}1961 1962static const char *npcm8xx_get_group_name(struct pinctrl_dev *pctldev,1963					  unsigned int selector)1964{1965	return npcm8xx_pingroups[selector].name;1966}1967 1968static int npcm8xx_get_group_pins(struct pinctrl_dev *pctldev,1969				  unsigned int selector,1970				  const unsigned int **pins,1971				  unsigned int *npins)1972{1973	*npins = npcm8xx_pingroups[selector].npins;1974	*pins  = npcm8xx_pingroups[selector].pins;1975 1976	return 0;1977}1978 1979static int npcm8xx_dt_node_to_map(struct pinctrl_dev *pctldev,1980				  struct device_node *np_config,1981				  struct pinctrl_map **map,1982				  u32 *num_maps)1983{1984	return pinconf_generic_dt_node_to_map(pctldev, np_config,1985					      map, num_maps,1986					      PIN_MAP_TYPE_INVALID);1987}1988 1989static void npcm8xx_dt_free_map(struct pinctrl_dev *pctldev,1990				struct pinctrl_map *map, u32 num_maps)1991{1992	kfree(map);1993}1994 1995static const struct pinctrl_ops npcm8xx_pinctrl_ops = {1996	.get_groups_count = npcm8xx_get_groups_count,1997	.get_group_name = npcm8xx_get_group_name,1998	.get_group_pins = npcm8xx_get_group_pins,1999	.dt_node_to_map = npcm8xx_dt_node_to_map,2000	.dt_free_map = npcm8xx_dt_free_map,2001};2002 2003static int npcm8xx_get_functions_count(struct pinctrl_dev *pctldev)2004{2005	return ARRAY_SIZE(npcm8xx_funcs);2006}2007 2008static const char *npcm8xx_get_function_name(struct pinctrl_dev *pctldev,2009					     unsigned int function)2010{2011	return npcm8xx_funcs[function].name;2012}2013 2014static int npcm8xx_get_function_groups(struct pinctrl_dev *pctldev,2015				       unsigned int function,2016				       const char * const **groups,2017				       unsigned int * const ngroups)2018{2019	*ngroups = npcm8xx_funcs[function].ngroups;2020	*groups	 = npcm8xx_funcs[function].groups;2021 2022	return 0;2023}2024 2025static int npcm8xx_pinmux_set_mux(struct pinctrl_dev *pctldev,2026				  unsigned int function,2027				  unsigned int group)2028{2029	struct npcm8xx_pinctrl *npcm = pinctrl_dev_get_drvdata(pctldev);2030 2031	npcm8xx_setfunc(npcm->gcr_regmap, npcm8xx_pingroups[group].pins,2032			npcm8xx_pingroups[group].npins, group);2033 2034	return 0;2035}2036 2037static int npcm8xx_gpio_request_enable(struct pinctrl_dev *pctldev,2038				       struct pinctrl_gpio_range *range,2039				       unsigned int offset)2040{2041	struct npcm8xx_pinctrl *npcm = pinctrl_dev_get_drvdata(pctldev);2042	const unsigned int *pin = &offset;2043	int mode = fn_gpio;2044 2045	if ((pin[0] >= 183 && pin[0] <= 189) || pin[0] == 35 || pin[0] == 36)2046		mode = pincfg[pin[0]].fn0;2047 2048	npcm8xx_setfunc(npcm->gcr_regmap, &offset, 1, mode);2049 2050	return 0;2051}2052 2053static void npcm8xx_gpio_request_free(struct pinctrl_dev *pctldev,2054				      struct pinctrl_gpio_range *range,2055				      unsigned int offset)2056{2057	struct npcm8xx_pinctrl *npcm = pinctrl_dev_get_drvdata(pctldev);2058	int virq;2059 2060	virq = irq_find_mapping(npcm->domain, offset);2061	if (virq)2062		irq_dispose_mapping(virq);2063}2064 2065static int npcm_gpio_set_direction(struct pinctrl_dev *pctldev,2066				   struct pinctrl_gpio_range *range,2067				   unsigned int offset, bool input)2068{2069	struct npcm8xx_pinctrl *npcm = pinctrl_dev_get_drvdata(pctldev);2070	struct npcm8xx_gpio *bank =2071		&npcm->gpio_bank[offset / NPCM8XX_GPIO_PER_BANK];2072	int gpio = BIT(offset % bank->gc.ngpio);2073 2074	if (input)2075		iowrite32(gpio, bank->base + NPCM8XX_GP_N_OEC);2076	else2077		iowrite32(gpio, bank->base + NPCM8XX_GP_N_OES);2078 2079	return 0;2080}2081 2082static const struct pinmux_ops npcm8xx_pinmux_ops = {2083	.get_functions_count = npcm8xx_get_functions_count,2084	.get_function_name = npcm8xx_get_function_name,2085	.get_function_groups = npcm8xx_get_function_groups,2086	.set_mux = npcm8xx_pinmux_set_mux,2087	.gpio_request_enable = npcm8xx_gpio_request_enable,2088	.gpio_disable_free = npcm8xx_gpio_request_free,2089	.gpio_set_direction = npcm_gpio_set_direction,2090};2091 2092static int debounce_timing_setting(struct npcm8xx_gpio *bank, u32 gpio,2093				   u32 nanosecs)2094{2095	void __iomem *DBNCS_offset = bank->base + NPCM8XX_GP_N_DBNCS0 + (gpio / 4);2096	int gpio_debounce = (gpio % 16) * 2, debounce_select, i;2097	u32 dbncp_val, dbncp_val_mod;2098 2099	for (i = 0 ; i < NPCM8XX_DEBOUNCE_MAX ; i++) {2100		if (bank->debounce.set_val[i]) {2101			if (bank->debounce.nanosec_val[i] == nanosecs) {2102				debounce_select = i << gpio_debounce;2103				npcm_gpio_set(&bank->gc, DBNCS_offset,2104					      debounce_select);2105				break;2106			}2107		} else {2108			bank->debounce.set_val[i] = true;2109			bank->debounce.nanosec_val[i] = nanosecs;2110			debounce_select = i << gpio_debounce;2111			npcm_gpio_set(&bank->gc, DBNCS_offset, debounce_select);2112			switch (nanosecs) {2113			case 1 ... 1040:2114				iowrite32(0, bank->base + NPCM8XX_GP_N_DBNCP0 + (i * 4));2115				break;2116			case 1041 ... 1640:2117				iowrite32(0x10, bank->base + NPCM8XX_GP_N_DBNCP0 + (i * 4));2118				break;2119			case 1641 ... 2280:2120				iowrite32(0x20, bank->base + NPCM8XX_GP_N_DBNCP0 + (i * 4));2121				break;2122			case 2281 ... 2700:2123				iowrite32(0x30, bank->base + NPCM8XX_GP_N_DBNCP0 + (i * 4));2124				break;2125			case 2701 ... 2856:2126				iowrite32(0x40, bank->base + NPCM8XX_GP_N_DBNCP0 + (i * 4));2127				break;2128			case 2857 ... 3496:2129				iowrite32(0x50, bank->base + NPCM8XX_GP_N_DBNCP0 + (i * 4));2130				break;2131			case 3497 ... 4136:2132				iowrite32(0x60, bank->base + NPCM8XX_GP_N_DBNCP0 + (i * 4));2133				break;2134			case 4137 ... 5025:2135				iowrite32(0x70, bank->base + NPCM8XX_GP_N_DBNCP0 + (i * 4));2136				break;2137			default:2138				dbncp_val = DIV_ROUND_CLOSEST(nanosecs, NPCM8XX_DEBOUNCE_NSEC);2139				if (dbncp_val > NPCM8XX_DEBOUNCE_MAX_VAL)2140					return -ENOTSUPP;2141				dbncp_val_mod = dbncp_val & GENMASK(3, 0);2142				if (dbncp_val_mod > GENMASK(2, 0))2143					dbncp_val += 0x10;2144				iowrite32(dbncp_val & NPCM8XX_DEBOUNCE_VAL_MASK,2145					  bank->base + NPCM8XX_GP_N_DBNCP0 + (i * 4));2146				break;2147			}2148			break;2149		}2150	}2151 2152	if (i == 4)2153		return -ENOTSUPP;2154 2155	return 0;2156}2157 2158static int npcm_set_debounce(struct npcm8xx_pinctrl *npcm, unsigned int pin,2159			     u32 nanosecs)2160{2161	struct npcm8xx_gpio *bank =2162		&npcm->gpio_bank[pin / NPCM8XX_GPIO_PER_BANK];2163	int gpio = BIT(pin % bank->gc.ngpio);2164	int ret;2165 2166	if (nanosecs) {2167		ret = debounce_timing_setting(bank, pin % bank->gc.ngpio,2168					      nanosecs);2169		if (ret)2170			dev_err(npcm->dev, "Pin %d, All four debounce timing values are used, please use one of exist debounce values\n", pin);2171		else2172			npcm_gpio_set(&bank->gc, bank->base + NPCM8XX_GP_N_DBNC,2173				      gpio);2174		return ret;2175	}2176 2177	npcm_gpio_clr(&bank->gc, bank->base + NPCM8XX_GP_N_DBNC, gpio);2178 2179	return 0;2180}2181 2182/* pinconf_ops */2183static int npcm8xx_config_get(struct pinctrl_dev *pctldev, unsigned int pin,2184			      unsigned long *config)2185{2186	enum pin_config_param param = pinconf_to_config_param(*config);2187	struct npcm8xx_pinctrl *npcm = pinctrl_dev_get_drvdata(pctldev);2188	struct npcm8xx_gpio *bank =2189		&npcm->gpio_bank[pin / NPCM8XX_GPIO_PER_BANK];2190	int gpio = pin % bank->gc.ngpio;2191	unsigned long pinmask = BIT(gpio);2192	u32 ie, oe, pu, pd;2193	int rc = 0;2194 2195	switch (param) {2196	case PIN_CONFIG_BIAS_DISABLE:2197	case PIN_CONFIG_BIAS_PULL_UP:2198	case PIN_CONFIG_BIAS_PULL_DOWN:2199		pu = ioread32(bank->base + NPCM8XX_GP_N_PU) & pinmask;2200		pd = ioread32(bank->base + NPCM8XX_GP_N_PD) & pinmask;2201		if (param == PIN_CONFIG_BIAS_DISABLE)2202			rc = !pu && !pd;2203		else if (param == PIN_CONFIG_BIAS_PULL_UP)2204			rc = pu && !pd;2205		else if (param == PIN_CONFIG_BIAS_PULL_DOWN)2206			rc = !pu && pd;2207		break;2208	case PIN_CONFIG_OUTPUT:2209	case PIN_CONFIG_INPUT_ENABLE:2210		ie = ioread32(bank->base + NPCM8XX_GP_N_IEM) & pinmask;2211		oe = ioread32(bank->base + NPCM8XX_GP_N_OE) & pinmask;2212		if (param == PIN_CONFIG_INPUT_ENABLE)2213			rc = (ie && !oe);2214		else if (param == PIN_CONFIG_OUTPUT)2215			rc = (!ie && oe);2216		break;2217	case PIN_CONFIG_DRIVE_PUSH_PULL:2218		rc = !(ioread32(bank->base + NPCM8XX_GP_N_OTYP) & pinmask);2219		break;2220	case PIN_CONFIG_DRIVE_OPEN_DRAIN:2221		rc = ioread32(bank->base + NPCM8XX_GP_N_OTYP) & pinmask;2222		break;2223	case PIN_CONFIG_INPUT_DEBOUNCE:2224		rc = ioread32(bank->base + NPCM8XX_GP_N_DBNC) & pinmask;2225		break;2226	case PIN_CONFIG_DRIVE_STRENGTH:2227		rc = npcm8xx_get_drive_strength(pctldev, pin);2228		if (rc)2229			*config = pinconf_to_config_packed(param, rc);2230		break;2231	case PIN_CONFIG_SLEW_RATE:2232		rc = npcm8xx_get_slew_rate(bank, npcm->gcr_regmap, pin);2233		if (rc >= 0)2234			*config = pinconf_to_config_packed(param, rc);2235		break;2236	default:2237		return -ENOTSUPP;2238	}2239 2240	if (!rc)2241		return -EINVAL;2242 2243	return 0;2244}2245 2246static int npcm8xx_config_set_one(struct npcm8xx_pinctrl *npcm,2247				  unsigned int pin, unsigned long config)2248{2249	enum pin_config_param param = pinconf_to_config_param(config);2250	struct npcm8xx_gpio *bank =2251		&npcm->gpio_bank[pin / NPCM8XX_GPIO_PER_BANK];2252	u32 arg = pinconf_to_config_argument(config);2253	int gpio = BIT(pin % bank->gc.ngpio);2254 2255	switch (param) {2256	case PIN_CONFIG_BIAS_DISABLE:2257		npcm_gpio_clr(&bank->gc, bank->base + NPCM8XX_GP_N_PU, gpio);2258		npcm_gpio_clr(&bank->gc, bank->base + NPCM8XX_GP_N_PD, gpio);2259		break;2260	case PIN_CONFIG_BIAS_PULL_DOWN:2261		npcm_gpio_clr(&bank->gc, bank->base + NPCM8XX_GP_N_PU, gpio);2262		npcm_gpio_set(&bank->gc, bank->base + NPCM8XX_GP_N_PD, gpio);2263		break;2264	case PIN_CONFIG_BIAS_PULL_UP:2265		npcm_gpio_clr(&bank->gc, bank->base + NPCM8XX_GP_N_PD, gpio);2266		npcm_gpio_set(&bank->gc, bank->base + NPCM8XX_GP_N_PU, gpio);2267		break;2268	case PIN_CONFIG_INPUT_ENABLE:2269		iowrite32(gpio, bank->base + NPCM8XX_GP_N_OEC);2270		bank->direction_input(&bank->gc, pin % bank->gc.ngpio);2271		break;2272	case PIN_CONFIG_OUTPUT:2273		bank->direction_output(&bank->gc, pin % bank->gc.ngpio, arg);2274		iowrite32(gpio, bank->base + NPCM8XX_GP_N_OES);2275		break;2276	case PIN_CONFIG_DRIVE_PUSH_PULL:2277		npcm_gpio_clr(&bank->gc, bank->base + NPCM8XX_GP_N_OTYP, gpio);2278		break;2279	case PIN_CONFIG_DRIVE_OPEN_DRAIN:2280		npcm_gpio_set(&bank->gc, bank->base + NPCM8XX_GP_N_OTYP, gpio);2281		break;2282	case PIN_CONFIG_INPUT_DEBOUNCE:2283		return npcm_set_debounce(npcm, pin, arg * 1000);2284	case PIN_CONFIG_SLEW_RATE:2285		return npcm8xx_set_slew_rate(bank, npcm->gcr_regmap, pin, arg);2286	case PIN_CONFIG_DRIVE_STRENGTH:2287		return npcm8xx_set_drive_strength(npcm, pin, arg);2288	default:2289		return -ENOTSUPP;2290	}2291 2292	return 0;2293}2294 2295static int npcm8xx_config_set(struct pinctrl_dev *pctldev, unsigned int pin,2296			      unsigned long *configs, unsigned int num_configs)2297{2298	struct npcm8xx_pinctrl *npcm = pinctrl_dev_get_drvdata(pctldev);2299	int rc;2300 2301	while (num_configs--) {2302		rc = npcm8xx_config_set_one(npcm, pin, *configs++);2303		if (rc)2304			return rc;2305	}2306 2307	return 0;2308}2309 2310static const struct pinconf_ops npcm8xx_pinconf_ops = {2311	.is_generic = true,2312	.pin_config_get = npcm8xx_config_get,2313	.pin_config_set = npcm8xx_config_set,2314};2315 2316/* pinctrl_desc */2317static struct pinctrl_desc npcm8xx_pinctrl_desc = {2318	.name = "npcm8xx-pinctrl",2319	.pins = npcm8xx_pins,2320	.npins = ARRAY_SIZE(npcm8xx_pins),2321	.pctlops = &npcm8xx_pinctrl_ops,2322	.pmxops = &npcm8xx_pinmux_ops,2323	.confops = &npcm8xx_pinconf_ops,2324	.owner = THIS_MODULE,2325};2326 2327static int npcmgpio_add_pin_ranges(struct gpio_chip *chip)2328{2329	struct npcm8xx_gpio *bank = gpiochip_get_data(chip);2330 2331	return gpiochip_add_pin_range(&bank->gc, dev_name(chip->parent),2332				      bank->pinctrl_id, bank->gc.base,2333				      bank->gc.ngpio);2334}2335 2336static int npcm8xx_gpio_fw(struct npcm8xx_pinctrl *pctrl)2337{2338	struct fwnode_reference_args args;2339	struct device *dev = pctrl->dev;2340	struct fwnode_handle *child;2341	int ret = -ENXIO;2342	int id = 0, i;2343 2344	for_each_gpiochip_node(dev, child) {2345		pctrl->gpio_bank[id].base = fwnode_iomap(child, 0);2346		if (!pctrl->gpio_bank[id].base)2347			return dev_err_probe(dev, -ENXIO, "fwnode_iomap id %d failed\n", id);2348 2349		ret = bgpio_init(&pctrl->gpio_bank[id].gc, dev, 4,2350				 pctrl->gpio_bank[id].base + NPCM8XX_GP_N_DIN,2351				 pctrl->gpio_bank[id].base + NPCM8XX_GP_N_DOUT,2352				 NULL,2353				 NULL,2354				 pctrl->gpio_bank[id].base + NPCM8XX_GP_N_IEM,2355				 BGPIOF_READ_OUTPUT_REG_SET);2356		if (ret)2357			return dev_err_probe(dev, ret, "bgpio_init() failed\n");2358 2359		ret = fwnode_property_get_reference_args(child, "gpio-ranges", NULL, 3, 0, &args);2360		if (ret < 0)2361			return dev_err_probe(dev, ret, "gpio-ranges fail for GPIO bank %u\n", id);2362 2363		ret = fwnode_irq_get(child, 0);2364		if (!ret)2365			return dev_err_probe(dev, ret, "No IRQ for GPIO bank %u\n", id);2366 2367		pctrl->gpio_bank[id].irq = ret;2368		pctrl->gpio_bank[id].irq_chip = npcmgpio_irqchip;2369		pctrl->gpio_bank[id].irqbase = id * NPCM8XX_GPIO_PER_BANK;2370		pctrl->gpio_bank[id].pinctrl_id = args.args[0];2371		pctrl->gpio_bank[id].gc.base = -1;2372		pctrl->gpio_bank[id].gc.ngpio = args.args[2];2373		pctrl->gpio_bank[id].gc.owner = THIS_MODULE;2374		pctrl->gpio_bank[id].gc.parent = dev;2375		pctrl->gpio_bank[id].gc.fwnode = child;2376		pctrl->gpio_bank[id].gc.label = devm_kasprintf(dev, GFP_KERNEL, "%pfw", child);2377		pctrl->gpio_bank[id].gc.dbg_show = npcmgpio_dbg_show;2378		pctrl->gpio_bank[id].direction_input = pctrl->gpio_bank[id].gc.direction_input;2379		pctrl->gpio_bank[id].gc.direction_input = npcmgpio_direction_input;2380		pctrl->gpio_bank[id].direction_output = pctrl->gpio_bank[id].gc.direction_output;2381		pctrl->gpio_bank[id].gc.direction_output = npcmgpio_direction_output;2382		pctrl->gpio_bank[id].request = pctrl->gpio_bank[id].gc.request;2383		pctrl->gpio_bank[id].gc.request = npcmgpio_gpio_request;2384		pctrl->gpio_bank[id].gc.free = pinctrl_gpio_free;2385		for (i = 0 ; i < NPCM8XX_DEBOUNCE_MAX ; i++)2386			pctrl->gpio_bank[id].debounce.set_val[i] = false;2387		pctrl->gpio_bank[id].gc.add_pin_ranges = npcmgpio_add_pin_ranges;2388		id++;2389	}2390 2391	pctrl->bank_num = id;2392	return ret;2393}2394 2395static int npcm8xx_gpio_register(struct npcm8xx_pinctrl *pctrl)2396{2397	int ret, id;2398 2399	for (id = 0 ; id < pctrl->bank_num ; id++) {2400		struct gpio_irq_chip *girq;2401 2402		girq = &pctrl->gpio_bank[id].gc.irq;2403		girq->chip = &pctrl->gpio_bank[id].irq_chip;2404		girq->parent_handler = npcmgpio_irq_handler;2405		girq->num_parents = 1;2406		girq->parents = devm_kcalloc(pctrl->dev, girq->num_parents,2407					     sizeof(*girq->parents),2408					     GFP_KERNEL);2409		if (!girq->parents)2410			return -ENOMEM;2411 2412		girq->parents[0] = pctrl->gpio_bank[id].irq;2413		girq->default_type = IRQ_TYPE_NONE;2414		girq->handler = handle_level_irq;2415		ret = devm_gpiochip_add_data(pctrl->dev,2416					     &pctrl->gpio_bank[id].gc,2417					     &pctrl->gpio_bank[id]);2418		if (ret)2419			return dev_err_probe(pctrl->dev, ret, "Failed to add GPIO chip %u\n", id);2420	}2421 2422	return 0;2423}2424 2425static int npcm8xx_pinctrl_probe(struct platform_device *pdev)2426{2427	struct device *dev = &pdev->dev;2428	struct npcm8xx_pinctrl *pctrl;2429	int ret;2430 2431	pctrl = devm_kzalloc(dev, sizeof(*pctrl), GFP_KERNEL);2432	if (!pctrl)2433		return -ENOMEM;2434 2435	pctrl->dev = dev;2436	platform_set_drvdata(pdev, pctrl);2437 2438	pctrl->gcr_regmap =2439		syscon_regmap_lookup_by_phandle(dev->of_node, "nuvoton,sysgcr");2440	if (IS_ERR(pctrl->gcr_regmap))2441		return dev_err_probe(dev, PTR_ERR(pctrl->gcr_regmap),2442				      "Failed to find nuvoton,sysgcr property\n");2443 2444	ret = npcm8xx_gpio_fw(pctrl);2445	if (ret < 0)2446		return dev_err_probe(dev, ret,2447				      "Failed to gpio dt-binding\n");2448 2449	pctrl->pctldev = devm_pinctrl_register(dev, &npcm8xx_pinctrl_desc, pctrl);2450	if (IS_ERR(pctrl->pctldev))2451		return dev_err_probe(dev, PTR_ERR(pctrl->pctldev),2452				     "Failed to register pinctrl device\n");2453 2454	ret = npcm8xx_gpio_register(pctrl);2455	if (ret < 0)2456		dev_err_probe(dev, ret, "Failed to register gpio\n");2457 2458	return 0;2459}2460 2461static const struct of_device_id npcm8xx_pinctrl_match[] = {2462	{ .compatible = "nuvoton,npcm845-pinctrl" },2463	{ }2464};2465MODULE_DEVICE_TABLE(of, npcm8xx_pinctrl_match);2466 2467static struct platform_driver npcm8xx_pinctrl_driver = {2468	.probe = npcm8xx_pinctrl_probe,2469	.driver = {2470		.name = "npcm8xx-pinctrl",2471		.of_match_table = npcm8xx_pinctrl_match,2472		.suppress_bind_attrs = true,2473	},2474};2475 2476static int __init npcm8xx_pinctrl_register(void)2477{2478	return platform_driver_register(&npcm8xx_pinctrl_driver);2479}2480arch_initcall(npcm8xx_pinctrl_register);2481 2482MODULE_LICENSE("GPL v2");2483MODULE_AUTHOR("tomer.maimon@nuvoton.com");2484MODULE_DESCRIPTION("Nuvoton NPCM8XX Pinctrl and GPIO driver");2485