548 lines · c
1// SPDX-License-Identifier: GPL-2.02/*3 * Pinmux and GPIO driver for tps6594 PMIC4 *5 * Copyright (C) 2023 BayLibre Incorporated - https://www.baylibre.com/6 */7 8#include <linux/gpio/driver.h>9#include <linux/gpio/regmap.h>10#include <linux/module.h>11#include <linux/pinctrl/pinmux.h>12#include <linux/platform_device.h>13#include <linux/mod_devicetable.h>14 15#include <linux/mfd/tps6594.h>16 17#define TPS6594_PINCTRL_GPIO_FUNCTION 018#define TPS6594_PINCTRL_SCL_I2C2_CS_SPI_FUNCTION 119#define TPS6594_PINCTRL_TRIG_WDOG_FUNCTION 120#define TPS6594_PINCTRL_CLK32KOUT_FUNCTION 121#define TPS6594_PINCTRL_SCLK_SPMI_FUNCTION 122#define TPS6594_PINCTRL_SDATA_SPMI_FUNCTION 123#define TPS6594_PINCTRL_NERR_MCU_FUNCTION 124#define TPS6594_PINCTRL_PDOG_FUNCTION 125#define TPS6594_PINCTRL_SYNCCLKIN_FUNCTION 126#define TPS6594_PINCTRL_NRSTOUT_SOC_FUNCTION 227#define TPS6594_PINCTRL_SYNCCLKOUT_FUNCTION 228#define TPS6594_PINCTRL_SDA_I2C2_SDO_SPI_FUNCTION 229#define TPS6594_PINCTRL_NERR_SOC_FUNCTION 230#define TPS6594_PINCTRL_DISABLE_WDOG_FUNCTION 331#define TPS6594_PINCTRL_NSLEEP1_FUNCTION 432#define TPS6594_PINCTRL_NSLEEP2_FUNCTION 533#define TPS6594_PINCTRL_WKUP1_FUNCTION 634#define TPS6594_PINCTRL_WKUP2_FUNCTION 735 36/* Special muxval for recalcitrant pins */37#define TPS6594_PINCTRL_DISABLE_WDOG_FUNCTION_GPIO8 238#define TPS6594_PINCTRL_SYNCCLKOUT_FUNCTION_GPIO8 339#define TPS6594_PINCTRL_CLK32KOUT_FUNCTION_GPIO9 340 41/* TPS65224 pin muxval */42#define TPS65224_PINCTRL_SDA_I2C2_SDO_SPI_FUNCTION 143#define TPS65224_PINCTRL_SCL_I2C2_CS_SPI_FUNCTION 144#define TPS65224_PINCTRL_VMON1_FUNCTION 145#define TPS65224_PINCTRL_VMON2_FUNCTION 146#define TPS65224_PINCTRL_WKUP_FUNCTION 147#define TPS65224_PINCTRL_NSLEEP2_FUNCTION 248#define TPS65224_PINCTRL_NSLEEP1_FUNCTION 249#define TPS65224_PINCTRL_SYNCCLKIN_FUNCTION 250#define TPS65224_PINCTRL_NERR_MCU_FUNCTION 251#define TPS65224_PINCTRL_NINT_FUNCTION 352#define TPS65224_PINCTRL_TRIG_WDOG_FUNCTION 353#define TPS65224_PINCTRL_PB_FUNCTION 354#define TPS65224_PINCTRL_ADC_IN_FUNCTION 355 56/* TPS65224 Special muxval for recalcitrant pins */57#define TPS65224_PINCTRL_NSLEEP2_FUNCTION_GPIO5 158#define TPS65224_PINCTRL_WKUP_FUNCTION_GPIO5 459#define TPS65224_PINCTRL_SYNCCLKIN_FUNCTION_GPIO5 360 61#define TPS6594_OFFSET_GPIO_SEL 562 63#define TPS65224_NGPIO_PER_REG 664#define TPS6594_NGPIO_PER_REG 865 66#define FUNCTION(dev_name, fname, v) \67{ \68 .pinfunction = PINCTRL_PINFUNCTION(#fname, \69 dev_name##_##fname##_func_group_names, \70 ARRAY_SIZE(dev_name##_##fname##_func_group_names)),\71 .muxval = v, \72}73 74static const struct pinctrl_pin_desc tps6594_pins[] = {75 PINCTRL_PIN(0, "GPIO0"), PINCTRL_PIN(1, "GPIO1"),76 PINCTRL_PIN(2, "GPIO2"), PINCTRL_PIN(3, "GPIO3"),77 PINCTRL_PIN(4, "GPIO4"), PINCTRL_PIN(5, "GPIO5"),78 PINCTRL_PIN(6, "GPIO6"), PINCTRL_PIN(7, "GPIO7"),79 PINCTRL_PIN(8, "GPIO8"), PINCTRL_PIN(9, "GPIO9"),80 PINCTRL_PIN(10, "GPIO10"),81};82 83static const char *const tps6594_gpio_func_group_names[] = {84 "GPIO0", "GPIO1", "GPIO2", "GPIO3", "GPIO4", "GPIO5",85 "GPIO6", "GPIO7", "GPIO8", "GPIO9", "GPIO10",86};87 88static const char *const tps6594_nsleep1_func_group_names[] = {89 "GPIO0", "GPIO1", "GPIO2", "GPIO3", "GPIO4", "GPIO5",90 "GPIO6", "GPIO7", "GPIO8", "GPIO9", "GPIO10",91};92 93static const char *const tps6594_nsleep2_func_group_names[] = {94 "GPIO0", "GPIO1", "GPIO2", "GPIO3", "GPIO4", "GPIO5",95 "GPIO6", "GPIO7", "GPIO8", "GPIO9", "GPIO10",96};97 98static const char *const tps6594_wkup1_func_group_names[] = {99 "GPIO0", "GPIO1", "GPIO2", "GPIO3", "GPIO4", "GPIO5",100 "GPIO6", "GPIO7", "GPIO8", "GPIO9", "GPIO10",101};102 103static const char *const tps6594_wkup2_func_group_names[] = {104 "GPIO0", "GPIO1", "GPIO2", "GPIO3", "GPIO4", "GPIO5",105 "GPIO6", "GPIO7", "GPIO8", "GPIO9", "GPIO10",106};107 108static const char *const tps6594_scl_i2c2_cs_spi_func_group_names[] = {109 "GPIO0",110 "GPIO1",111};112 113static const char *const tps6594_nrstout_soc_func_group_names[] = {114 "GPIO0",115 "GPIO10",116};117 118static const char *const tps6594_trig_wdog_func_group_names[] = {119 "GPIO1",120 "GPIO10",121};122 123static const char *const tps6594_sda_i2c2_sdo_spi_func_group_names[] = {124 "GPIO1",125};126 127static const char *const tps6594_clk32kout_func_group_names[] = {128 "GPIO2",129 "GPIO3",130 "GPIO7",131};132 133static const char *const tps6594_nerr_soc_func_group_names[] = {134 "GPIO2",135};136 137static const char *const tps6594_sclk_spmi_func_group_names[] = {138 "GPIO4",139};140 141static const char *const tps6594_sdata_spmi_func_group_names[] = {142 "GPIO5",143};144 145static const char *const tps6594_nerr_mcu_func_group_names[] = {146 "GPIO6",147};148 149static const char *const tps6594_syncclkout_func_group_names[] = {150 "GPIO7",151 "GPIO9",152};153 154static const char *const tps6594_disable_wdog_func_group_names[] = {155 "GPIO7",156 "GPIO8",157};158 159static const char *const tps6594_pdog_func_group_names[] = {160 "GPIO8",161};162 163static const char *const tps6594_syncclkin_func_group_names[] = {164 "GPIO9",165};166 167static const struct pinctrl_pin_desc tps65224_pins[] = {168 PINCTRL_PIN(0, "GPIO0"), PINCTRL_PIN(1, "GPIO1"),169 PINCTRL_PIN(2, "GPIO2"), PINCTRL_PIN(3, "GPIO3"),170 PINCTRL_PIN(4, "GPIO4"), PINCTRL_PIN(5, "GPIO5"),171};172 173static const char *const tps65224_gpio_func_group_names[] = {174 "GPIO0", "GPIO1", "GPIO2", "GPIO3", "GPIO4", "GPIO5",175};176 177static const char *const tps65224_sda_i2c2_sdo_spi_func_group_names[] = {178 "GPIO0",179};180 181static const char *const tps65224_nsleep2_func_group_names[] = {182 "GPIO0", "GPIO5",183};184 185static const char *const tps65224_nint_func_group_names[] = {186 "GPIO0",187};188 189static const char *const tps65224_scl_i2c2_cs_spi_func_group_names[] = {190 "GPIO1",191};192 193static const char *const tps65224_nsleep1_func_group_names[] = {194 "GPIO1", "GPIO2", "GPIO3",195};196 197static const char *const tps65224_trig_wdog_func_group_names[] = {198 "GPIO1",199};200 201static const char *const tps65224_vmon1_func_group_names[] = {202 "GPIO2",203};204 205static const char *const tps65224_pb_func_group_names[] = {206 "GPIO2",207};208 209static const char *const tps65224_vmon2_func_group_names[] = {210 "GPIO3",211};212 213static const char *const tps65224_adc_in_func_group_names[] = {214 "GPIO3", "GPIO4",215};216 217static const char *const tps65224_wkup_func_group_names[] = {218 "GPIO4", "GPIO5",219};220 221static const char *const tps65224_syncclkin_func_group_names[] = {222 "GPIO4", "GPIO5",223};224 225static const char *const tps65224_nerr_mcu_func_group_names[] = {226 "GPIO5",227};228 229struct tps6594_pinctrl_function {230 struct pinfunction pinfunction;231 u8 muxval;232};233 234struct muxval_remap {235 unsigned int group;236 u8 muxval;237 u8 remap;238};239 240static struct muxval_remap tps65224_muxval_remap[] = {241 {5, TPS6594_PINCTRL_DISABLE_WDOG_FUNCTION, TPS65224_PINCTRL_WKUP_FUNCTION_GPIO5},242 {5, TPS65224_PINCTRL_SYNCCLKIN_FUNCTION, TPS65224_PINCTRL_SYNCCLKIN_FUNCTION_GPIO5},243 {5, TPS65224_PINCTRL_NSLEEP2_FUNCTION, TPS65224_PINCTRL_NSLEEP2_FUNCTION_GPIO5},244};245 246static struct muxval_remap tps6594_muxval_remap[] = {247 {8, TPS6594_PINCTRL_DISABLE_WDOG_FUNCTION, TPS6594_PINCTRL_DISABLE_WDOG_FUNCTION_GPIO8},248 {8, TPS6594_PINCTRL_SYNCCLKOUT_FUNCTION, TPS6594_PINCTRL_SYNCCLKOUT_FUNCTION_GPIO8},249 {9, TPS6594_PINCTRL_CLK32KOUT_FUNCTION, TPS6594_PINCTRL_CLK32KOUT_FUNCTION_GPIO9},250};251 252static const struct tps6594_pinctrl_function pinctrl_functions[] = {253 FUNCTION(tps6594, gpio, TPS6594_PINCTRL_GPIO_FUNCTION),254 FUNCTION(tps6594, nsleep1, TPS6594_PINCTRL_NSLEEP1_FUNCTION),255 FUNCTION(tps6594, nsleep2, TPS6594_PINCTRL_NSLEEP2_FUNCTION),256 FUNCTION(tps6594, wkup1, TPS6594_PINCTRL_WKUP1_FUNCTION),257 FUNCTION(tps6594, wkup2, TPS6594_PINCTRL_WKUP2_FUNCTION),258 FUNCTION(tps6594, scl_i2c2_cs_spi, TPS6594_PINCTRL_SCL_I2C2_CS_SPI_FUNCTION),259 FUNCTION(tps6594, nrstout_soc, TPS6594_PINCTRL_NRSTOUT_SOC_FUNCTION),260 FUNCTION(tps6594, trig_wdog, TPS6594_PINCTRL_TRIG_WDOG_FUNCTION),261 FUNCTION(tps6594, sda_i2c2_sdo_spi, TPS6594_PINCTRL_SDA_I2C2_SDO_SPI_FUNCTION),262 FUNCTION(tps6594, clk32kout, TPS6594_PINCTRL_CLK32KOUT_FUNCTION),263 FUNCTION(tps6594, nerr_soc, TPS6594_PINCTRL_NERR_SOC_FUNCTION),264 FUNCTION(tps6594, sclk_spmi, TPS6594_PINCTRL_SCLK_SPMI_FUNCTION),265 FUNCTION(tps6594, sdata_spmi, TPS6594_PINCTRL_SDATA_SPMI_FUNCTION),266 FUNCTION(tps6594, nerr_mcu, TPS6594_PINCTRL_NERR_MCU_FUNCTION),267 FUNCTION(tps6594, syncclkout, TPS6594_PINCTRL_SYNCCLKOUT_FUNCTION),268 FUNCTION(tps6594, disable_wdog, TPS6594_PINCTRL_DISABLE_WDOG_FUNCTION),269 FUNCTION(tps6594, pdog, TPS6594_PINCTRL_PDOG_FUNCTION),270 FUNCTION(tps6594, syncclkin, TPS6594_PINCTRL_SYNCCLKIN_FUNCTION),271};272 273static const struct tps6594_pinctrl_function tps65224_pinctrl_functions[] = {274 FUNCTION(tps65224, gpio, TPS6594_PINCTRL_GPIO_FUNCTION),275 FUNCTION(tps65224, sda_i2c2_sdo_spi, TPS65224_PINCTRL_SDA_I2C2_SDO_SPI_FUNCTION),276 FUNCTION(tps65224, nsleep2, TPS65224_PINCTRL_NSLEEP2_FUNCTION),277 FUNCTION(tps65224, nint, TPS65224_PINCTRL_NINT_FUNCTION),278 FUNCTION(tps65224, scl_i2c2_cs_spi, TPS65224_PINCTRL_SCL_I2C2_CS_SPI_FUNCTION),279 FUNCTION(tps65224, nsleep1, TPS65224_PINCTRL_NSLEEP1_FUNCTION),280 FUNCTION(tps65224, trig_wdog, TPS65224_PINCTRL_TRIG_WDOG_FUNCTION),281 FUNCTION(tps65224, vmon1, TPS65224_PINCTRL_VMON1_FUNCTION),282 FUNCTION(tps65224, pb, TPS65224_PINCTRL_PB_FUNCTION),283 FUNCTION(tps65224, vmon2, TPS65224_PINCTRL_VMON2_FUNCTION),284 FUNCTION(tps65224, adc_in, TPS65224_PINCTRL_ADC_IN_FUNCTION),285 FUNCTION(tps65224, wkup, TPS65224_PINCTRL_WKUP_FUNCTION),286 FUNCTION(tps65224, syncclkin, TPS65224_PINCTRL_SYNCCLKIN_FUNCTION),287 FUNCTION(tps65224, nerr_mcu, TPS65224_PINCTRL_NERR_MCU_FUNCTION),288};289 290struct tps6594_pinctrl {291 struct tps6594 *tps;292 struct gpio_regmap *gpio_regmap;293 struct pinctrl_dev *pctl_dev;294 const struct tps6594_pinctrl_function *funcs;295 const struct pinctrl_pin_desc *pins;296 int func_cnt;297 int num_pins;298 u8 mux_sel_mask;299 unsigned int remap_cnt;300 struct muxval_remap *remap;301};302 303static struct tps6594_pinctrl tps65224_template_pinctrl = {304 .funcs = tps65224_pinctrl_functions,305 .func_cnt = ARRAY_SIZE(tps65224_pinctrl_functions),306 .pins = tps65224_pins,307 .num_pins = ARRAY_SIZE(tps65224_pins),308 .mux_sel_mask = TPS65224_MASK_GPIO_SEL,309 .remap = tps65224_muxval_remap,310 .remap_cnt = ARRAY_SIZE(tps65224_muxval_remap),311};312 313static struct tps6594_pinctrl tps6594_template_pinctrl = {314 .funcs = pinctrl_functions,315 .func_cnt = ARRAY_SIZE(pinctrl_functions),316 .pins = tps6594_pins,317 .num_pins = ARRAY_SIZE(tps6594_pins),318 .mux_sel_mask = TPS6594_MASK_GPIO_SEL,319 .remap = tps6594_muxval_remap,320 .remap_cnt = ARRAY_SIZE(tps6594_muxval_remap),321};322 323static int tps6594_gpio_regmap_xlate(struct gpio_regmap *gpio,324 unsigned int base, unsigned int offset,325 unsigned int *reg, unsigned int *mask)326{327 unsigned int line = offset % 8;328 unsigned int stride = offset / 8;329 330 switch (base) {331 case TPS6594_REG_GPIOX_CONF(0):332 *reg = TPS6594_REG_GPIOX_CONF(offset);333 *mask = TPS6594_BIT_GPIO_DIR;334 return 0;335 case TPS6594_REG_GPIO_IN_1:336 case TPS6594_REG_GPIO_OUT_1:337 *reg = base + stride;338 *mask = BIT(line);339 return 0;340 default:341 return -EINVAL;342 }343}344 345static int tps6594_pmx_func_cnt(struct pinctrl_dev *pctldev)346{347 struct tps6594_pinctrl *pinctrl = pinctrl_dev_get_drvdata(pctldev);348 349 return pinctrl->func_cnt;350}351 352static const char *tps6594_pmx_func_name(struct pinctrl_dev *pctldev,353 unsigned int selector)354{355 struct tps6594_pinctrl *pinctrl = pinctrl_dev_get_drvdata(pctldev);356 357 return pinctrl->funcs[selector].pinfunction.name;358}359 360static int tps6594_pmx_func_groups(struct pinctrl_dev *pctldev,361 unsigned int selector,362 const char *const **groups,363 unsigned int *num_groups)364{365 struct tps6594_pinctrl *pinctrl = pinctrl_dev_get_drvdata(pctldev);366 367 *groups = pinctrl->funcs[selector].pinfunction.groups;368 *num_groups = pinctrl->funcs[selector].pinfunction.ngroups;369 370 return 0;371}372 373static int tps6594_pmx_set(struct tps6594_pinctrl *pinctrl, unsigned int pin,374 u8 muxval)375{376 u8 mux_sel_val = muxval << TPS6594_OFFSET_GPIO_SEL;377 u8 mux_sel_mask = pinctrl->mux_sel_mask;378 379 if (pinctrl->tps->chip_id == TPS65224 && pin == 5) {380 /* GPIO6 has a different mask in TPS65224*/381 mux_sel_mask = TPS65224_MASK_GPIO_SEL_GPIO6;382 }383 384 return regmap_update_bits(pinctrl->tps->regmap,385 TPS6594_REG_GPIOX_CONF(pin),386 mux_sel_mask, mux_sel_val);387}388 389static int tps6594_pmx_set_mux(struct pinctrl_dev *pctldev,390 unsigned int function, unsigned int group)391{392 struct tps6594_pinctrl *pinctrl = pinctrl_dev_get_drvdata(pctldev);393 u8 muxval = pinctrl->funcs[function].muxval;394 unsigned int remap_cnt = pinctrl->remap_cnt;395 struct muxval_remap *remap = pinctrl->remap;396 397 for (unsigned int i = 0; i < remap_cnt; i++) {398 if (group == remap[i].group && muxval == remap[i].muxval) {399 muxval = remap[i].remap;400 break;401 }402 }403 404 return tps6594_pmx_set(pinctrl, group, muxval);405}406 407static int tps6594_pmx_gpio_set_direction(struct pinctrl_dev *pctldev,408 struct pinctrl_gpio_range *range,409 unsigned int offset, bool input)410{411 struct tps6594_pinctrl *pinctrl = pinctrl_dev_get_drvdata(pctldev);412 u8 muxval = pinctrl->funcs[TPS6594_PINCTRL_GPIO_FUNCTION].muxval;413 414 return tps6594_pmx_set(pinctrl, offset, muxval);415}416 417static const struct pinmux_ops tps6594_pmx_ops = {418 .get_functions_count = tps6594_pmx_func_cnt,419 .get_function_name = tps6594_pmx_func_name,420 .get_function_groups = tps6594_pmx_func_groups,421 .set_mux = tps6594_pmx_set_mux,422 .gpio_set_direction = tps6594_pmx_gpio_set_direction,423 .strict = true,424};425 426static int tps6594_groups_cnt(struct pinctrl_dev *pctldev)427{428 struct tps6594_pinctrl *pinctrl = pinctrl_dev_get_drvdata(pctldev);429 430 return pinctrl->num_pins;431}432 433static int tps6594_group_pins(struct pinctrl_dev *pctldev,434 unsigned int selector, const unsigned int **pins,435 unsigned int *num_pins)436{437 struct tps6594_pinctrl *pinctrl = pinctrl_dev_get_drvdata(pctldev);438 439 *pins = &pinctrl->pins[selector].number;440 *num_pins = 1;441 442 return 0;443}444 445static const char *tps6594_group_name(struct pinctrl_dev *pctldev,446 unsigned int selector)447{448 struct tps6594_pinctrl *pinctrl = pinctrl_dev_get_drvdata(pctldev);449 450 return pinctrl->pins[selector].name;451}452 453static const struct pinctrl_ops tps6594_pctrl_ops = {454 .dt_node_to_map = pinconf_generic_dt_node_to_map_group,455 .dt_free_map = pinconf_generic_dt_free_map,456 .get_groups_count = tps6594_groups_cnt,457 .get_group_name = tps6594_group_name,458 .get_group_pins = tps6594_group_pins,459};460 461static int tps6594_pinctrl_probe(struct platform_device *pdev)462{463 struct tps6594 *tps = dev_get_drvdata(pdev->dev.parent);464 struct device *dev = &pdev->dev;465 struct tps6594_pinctrl *pinctrl;466 struct pinctrl_desc *pctrl_desc;467 struct gpio_regmap_config config = {};468 469 pctrl_desc = devm_kzalloc(dev, sizeof(*pctrl_desc), GFP_KERNEL);470 if (!pctrl_desc)471 return -ENOMEM;472 473 pinctrl = devm_kzalloc(dev, sizeof(*pinctrl), GFP_KERNEL);474 if (!pinctrl)475 return -ENOMEM;476 477 switch (tps->chip_id) {478 case TPS65224:479 pctrl_desc->pins = tps65224_pins;480 pctrl_desc->npins = ARRAY_SIZE(tps65224_pins);481 482 *pinctrl = tps65224_template_pinctrl;483 484 config.ngpio = ARRAY_SIZE(tps65224_gpio_func_group_names);485 config.ngpio_per_reg = TPS65224_NGPIO_PER_REG;486 break;487 case TPS6593:488 case TPS6594:489 case LP8764:490 pctrl_desc->pins = tps6594_pins;491 pctrl_desc->npins = ARRAY_SIZE(tps6594_pins);492 493 *pinctrl = tps6594_template_pinctrl;494 495 config.ngpio = ARRAY_SIZE(tps6594_gpio_func_group_names);496 config.ngpio_per_reg = TPS6594_NGPIO_PER_REG;497 break;498 default:499 break;500 }501 502 pinctrl->tps = tps;503 504 pctrl_desc->name = dev_name(dev);505 pctrl_desc->owner = THIS_MODULE;506 pctrl_desc->pctlops = &tps6594_pctrl_ops;507 pctrl_desc->pmxops = &tps6594_pmx_ops;508 509 config.parent = tps->dev;510 config.regmap = tps->regmap;511 config.reg_dat_base = TPS6594_REG_GPIO_IN_1;512 config.reg_set_base = TPS6594_REG_GPIO_OUT_1;513 config.reg_dir_out_base = TPS6594_REG_GPIOX_CONF(0);514 config.reg_mask_xlate = tps6594_gpio_regmap_xlate;515 516 pinctrl->pctl_dev = devm_pinctrl_register(dev, pctrl_desc, pinctrl);517 if (IS_ERR(pinctrl->pctl_dev))518 return dev_err_probe(dev, PTR_ERR(pinctrl->pctl_dev),519 "Couldn't register pinctrl driver\n");520 521 pinctrl->gpio_regmap = devm_gpio_regmap_register(dev, &config);522 if (IS_ERR(pinctrl->gpio_regmap))523 return dev_err_probe(dev, PTR_ERR(pinctrl->gpio_regmap),524 "Couldn't register gpio_regmap driver\n");525 526 return 0;527}528 529static const struct platform_device_id tps6594_pinctrl_id_table[] = {530 { "tps6594-pinctrl", },531 {}532};533MODULE_DEVICE_TABLE(platform, tps6594_pinctrl_id_table);534 535static struct platform_driver tps6594_pinctrl_driver = {536 .probe = tps6594_pinctrl_probe,537 .driver = {538 .name = "tps6594-pinctrl",539 },540 .id_table = tps6594_pinctrl_id_table,541};542module_platform_driver(tps6594_pinctrl_driver);543 544MODULE_AUTHOR("Esteban Blanc <eblanc@baylibre.com>");545MODULE_AUTHOR("Nirmala Devi Mal Nadar <m.nirmaladevi@ltts.com>");546MODULE_DESCRIPTION("TPS6594 pinctrl and GPIO driver");547MODULE_LICENSE("GPL");548