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1// SPDX-License-Identifier: GPL-2.02/*3 * CZ.NIC's Turris Omnia MCU GPIO and IRQ driver4 *5 * 2024 by Marek Behún <kabel@kernel.org>6 */7 8#include <linux/array_size.h>9#include <linux/bitfield.h>10#include <linux/bitops.h>11#include <linux/bug.h>12#include <linux/cleanup.h>13#include <linux/device.h>14#include <linux/devm-helpers.h>15#include <linux/errno.h>16#include <linux/gpio/driver.h>17#include <linux/i2c.h>18#include <linux/interrupt.h>19#include <linux/mutex.h>20#include <linux/sysfs.h>21#include <linux/types.h>22#include <linux/workqueue.h>23#include <linux/unaligned.h>24 25#include <linux/turris-omnia-mcu-interface.h>26#include "turris-omnia-mcu.h"27 28#define OMNIA_CMD_INT_ARG_LEN 829#define FRONT_BUTTON_RELEASE_DELAY_MS 5030 31static const char * const omnia_mcu_gpio_templates[64] = {32 /* GPIOs with value read from the 16-bit wide status */33 [4] = "MiniPCIe0 Card Detect",34 [5] = "MiniPCIe0 mSATA Indicator",35 [6] = "Front USB3 port over-current",36 [7] = "Rear USB3 port over-current",37 [8] = "Front USB3 port power",38 [9] = "Rear USB3 port power",39 [12] = "Front Button",40 41 /* GPIOs with value read from the 32-bit wide extended status */42 [16] = "SFP nDET",43 [28] = "MiniPCIe0 LED",44 [29] = "MiniPCIe1 LED",45 [30] = "MiniPCIe2 LED",46 [31] = "MiniPCIe0 PAN LED",47 [32] = "MiniPCIe1 PAN LED",48 [33] = "MiniPCIe2 PAN LED",49 [34] = "WAN PHY LED0",50 [35] = "WAN PHY LED1",51 [36] = "LAN switch p0 LED0",52 [37] = "LAN switch p0 LED1",53 [38] = "LAN switch p1 LED0",54 [39] = "LAN switch p1 LED1",55 [40] = "LAN switch p2 LED0",56 [41] = "LAN switch p2 LED1",57 [42] = "LAN switch p3 LED0",58 [43] = "LAN switch p3 LED1",59 [44] = "LAN switch p4 LED0",60 [45] = "LAN switch p4 LED1",61 [46] = "LAN switch p5 LED0",62 [47] = "LAN switch p5 LED1",63 64 /* GPIOs with value read from the 16-bit wide extended control status */65 [48] = "eMMC nRESET",66 [49] = "LAN switch nRESET",67 [50] = "WAN PHY nRESET",68 [51] = "MiniPCIe0 nPERST",69 [52] = "MiniPCIe1 nPERST",70 [53] = "MiniPCIe2 nPERST",71 [54] = "WAN PHY SFP mux",72 [56] = "VHV power disable",73};74 75struct omnia_gpio {76 u8 cmd;77 u8 ctl_cmd;78 u8 bit;79 u8 ctl_bit;80 u8 int_bit;81 u16 feat;82 u16 feat_mask;83};84 85#define OMNIA_GPIO_INVALID_INT_BIT 0xff86 87#define _DEF_GPIO(_cmd, _ctl_cmd, _bit, _ctl_bit, _int_bit, _feat, _feat_mask) \88 { \89 .cmd = _cmd, \90 .ctl_cmd = _ctl_cmd, \91 .bit = _bit, \92 .ctl_bit = _ctl_bit, \93 .int_bit = (_int_bit) < 0 ? OMNIA_GPIO_INVALID_INT_BIT \94 : (_int_bit), \95 .feat = _feat, \96 .feat_mask = _feat_mask, \97 }98 99#define _DEF_GPIO_STS(_name) \100 _DEF_GPIO(OMNIA_CMD_GET_STATUS_WORD, 0, __bf_shf(OMNIA_STS_ ## _name), \101 0, __bf_shf(OMNIA_INT_ ## _name), 0, 0)102 103#define _DEF_GPIO_CTL(_name) \104 _DEF_GPIO(OMNIA_CMD_GET_STATUS_WORD, OMNIA_CMD_GENERAL_CONTROL, \105 __bf_shf(OMNIA_STS_ ## _name), __bf_shf(OMNIA_CTL_ ## _name), \106 -1, 0, 0)107 108#define _DEF_GPIO_EXT_STS(_name, _feat) \109 _DEF_GPIO(OMNIA_CMD_GET_EXT_STATUS_DWORD, 0, \110 __bf_shf(OMNIA_EXT_STS_ ## _name), 0, \111 __bf_shf(OMNIA_INT_ ## _name), \112 OMNIA_FEAT_ ## _feat | OMNIA_FEAT_EXT_CMDS, \113 OMNIA_FEAT_ ## _feat | OMNIA_FEAT_EXT_CMDS)114 115#define _DEF_GPIO_EXT_STS_LED(_name, _ledext) \116 _DEF_GPIO(OMNIA_CMD_GET_EXT_STATUS_DWORD, 0, \117 __bf_shf(OMNIA_EXT_STS_ ## _name), 0, \118 __bf_shf(OMNIA_INT_ ## _name), \119 OMNIA_FEAT_LED_STATE_ ## _ledext, \120 OMNIA_FEAT_LED_STATE_EXT_MASK)121 122#define _DEF_GPIO_EXT_STS_LEDALL(_name) \123 _DEF_GPIO(OMNIA_CMD_GET_EXT_STATUS_DWORD, 0, \124 __bf_shf(OMNIA_EXT_STS_ ## _name), 0, \125 __bf_shf(OMNIA_INT_ ## _name), \126 OMNIA_FEAT_LED_STATE_EXT_MASK, 0)127 128#define _DEF_GPIO_EXT_CTL(_name, _feat) \129 _DEF_GPIO(OMNIA_CMD_GET_EXT_CONTROL_STATUS, OMNIA_CMD_EXT_CONTROL, \130 __bf_shf(OMNIA_EXT_CTL_ ## _name), \131 __bf_shf(OMNIA_EXT_CTL_ ## _name), -1, \132 OMNIA_FEAT_ ## _feat | OMNIA_FEAT_EXT_CMDS, \133 OMNIA_FEAT_ ## _feat | OMNIA_FEAT_EXT_CMDS)134 135#define _DEF_INT(_name) \136 _DEF_GPIO(0, 0, 0, 0, __bf_shf(OMNIA_INT_ ## _name), 0, 0)137 138static inline bool is_int_bit_valid(const struct omnia_gpio *gpio)139{140 return gpio->int_bit != OMNIA_GPIO_INVALID_INT_BIT;141}142 143static const struct omnia_gpio omnia_gpios[64] = {144 /* GPIOs with value read from the 16-bit wide status */145 [4] = _DEF_GPIO_STS(CARD_DET),146 [5] = _DEF_GPIO_STS(MSATA_IND),147 [6] = _DEF_GPIO_STS(USB30_OVC),148 [7] = _DEF_GPIO_STS(USB31_OVC),149 [8] = _DEF_GPIO_CTL(USB30_PWRON),150 [9] = _DEF_GPIO_CTL(USB31_PWRON),151 152 /* brightness changed interrupt, no GPIO */153 [11] = _DEF_INT(BRIGHTNESS_CHANGED),154 155 [12] = _DEF_GPIO_STS(BUTTON_PRESSED),156 157 /* TRNG interrupt, no GPIO */158 [13] = _DEF_INT(TRNG),159 160 /* MESSAGE_SIGNED interrupt, no GPIO */161 [14] = _DEF_INT(MESSAGE_SIGNED),162 163 /* GPIOs with value read from the 32-bit wide extended status */164 [16] = _DEF_GPIO_EXT_STS(SFP_nDET, PERIPH_MCU),165 [28] = _DEF_GPIO_EXT_STS_LEDALL(WLAN0_MSATA_LED),166 [29] = _DEF_GPIO_EXT_STS_LEDALL(WLAN1_LED),167 [30] = _DEF_GPIO_EXT_STS_LEDALL(WLAN2_LED),168 [31] = _DEF_GPIO_EXT_STS_LED(WPAN0_LED, EXT),169 [32] = _DEF_GPIO_EXT_STS_LED(WPAN1_LED, EXT),170 [33] = _DEF_GPIO_EXT_STS_LED(WPAN2_LED, EXT),171 [34] = _DEF_GPIO_EXT_STS_LEDALL(WAN_LED0),172 [35] = _DEF_GPIO_EXT_STS_LED(WAN_LED1, EXT_V32),173 [36] = _DEF_GPIO_EXT_STS_LEDALL(LAN0_LED0),174 [37] = _DEF_GPIO_EXT_STS_LEDALL(LAN0_LED1),175 [38] = _DEF_GPIO_EXT_STS_LEDALL(LAN1_LED0),176 [39] = _DEF_GPIO_EXT_STS_LEDALL(LAN1_LED1),177 [40] = _DEF_GPIO_EXT_STS_LEDALL(LAN2_LED0),178 [41] = _DEF_GPIO_EXT_STS_LEDALL(LAN2_LED1),179 [42] = _DEF_GPIO_EXT_STS_LEDALL(LAN3_LED0),180 [43] = _DEF_GPIO_EXT_STS_LEDALL(LAN3_LED1),181 [44] = _DEF_GPIO_EXT_STS_LEDALL(LAN4_LED0),182 [45] = _DEF_GPIO_EXT_STS_LEDALL(LAN4_LED1),183 [46] = _DEF_GPIO_EXT_STS_LEDALL(LAN5_LED0),184 [47] = _DEF_GPIO_EXT_STS_LEDALL(LAN5_LED1),185 186 /* GPIOs with value read from the 16-bit wide extended control status */187 [48] = _DEF_GPIO_EXT_CTL(nRES_MMC, PERIPH_MCU),188 [49] = _DEF_GPIO_EXT_CTL(nRES_LAN, PERIPH_MCU),189 [50] = _DEF_GPIO_EXT_CTL(nRES_PHY, PERIPH_MCU),190 [51] = _DEF_GPIO_EXT_CTL(nPERST0, PERIPH_MCU),191 [52] = _DEF_GPIO_EXT_CTL(nPERST1, PERIPH_MCU),192 [53] = _DEF_GPIO_EXT_CTL(nPERST2, PERIPH_MCU),193 [54] = _DEF_GPIO_EXT_CTL(PHY_SFP, PERIPH_MCU),194 [56] = _DEF_GPIO_EXT_CTL(nVHV_CTRL, PERIPH_MCU),195};196 197/* mapping from interrupts to indexes of GPIOs in the omnia_gpios array */198const u8 omnia_int_to_gpio_idx[32] = {199 [__bf_shf(OMNIA_INT_CARD_DET)] = 4,200 [__bf_shf(OMNIA_INT_MSATA_IND)] = 5,201 [__bf_shf(OMNIA_INT_USB30_OVC)] = 6,202 [__bf_shf(OMNIA_INT_USB31_OVC)] = 7,203 [__bf_shf(OMNIA_INT_BUTTON_PRESSED)] = 12,204 [__bf_shf(OMNIA_INT_TRNG)] = 13,205 [__bf_shf(OMNIA_INT_MESSAGE_SIGNED)] = 14,206 [__bf_shf(OMNIA_INT_SFP_nDET)] = 16,207 [__bf_shf(OMNIA_INT_BRIGHTNESS_CHANGED)] = 11,208 [__bf_shf(OMNIA_INT_WLAN0_MSATA_LED)] = 28,209 [__bf_shf(OMNIA_INT_WLAN1_LED)] = 29,210 [__bf_shf(OMNIA_INT_WLAN2_LED)] = 30,211 [__bf_shf(OMNIA_INT_WPAN0_LED)] = 31,212 [__bf_shf(OMNIA_INT_WPAN1_LED)] = 32,213 [__bf_shf(OMNIA_INT_WPAN2_LED)] = 33,214 [__bf_shf(OMNIA_INT_WAN_LED0)] = 34,215 [__bf_shf(OMNIA_INT_WAN_LED1)] = 35,216 [__bf_shf(OMNIA_INT_LAN0_LED0)] = 36,217 [__bf_shf(OMNIA_INT_LAN0_LED1)] = 37,218 [__bf_shf(OMNIA_INT_LAN1_LED0)] = 38,219 [__bf_shf(OMNIA_INT_LAN1_LED1)] = 39,220 [__bf_shf(OMNIA_INT_LAN2_LED0)] = 40,221 [__bf_shf(OMNIA_INT_LAN2_LED1)] = 41,222 [__bf_shf(OMNIA_INT_LAN3_LED0)] = 42,223 [__bf_shf(OMNIA_INT_LAN3_LED1)] = 43,224 [__bf_shf(OMNIA_INT_LAN4_LED0)] = 44,225 [__bf_shf(OMNIA_INT_LAN4_LED1)] = 45,226 [__bf_shf(OMNIA_INT_LAN5_LED0)] = 46,227 [__bf_shf(OMNIA_INT_LAN5_LED1)] = 47,228};229 230/* index of PHY_SFP GPIO in the omnia_gpios array */231#define OMNIA_GPIO_PHY_SFP_OFFSET 54232 233static int omnia_ctl_cmd_locked(struct omnia_mcu *mcu, u8 cmd, u16 val, u16 mask)234{235 unsigned int len;236 u8 buf[5];237 238 buf[0] = cmd;239 240 switch (cmd) {241 case OMNIA_CMD_GENERAL_CONTROL:242 buf[1] = val;243 buf[2] = mask;244 len = 3;245 break;246 247 case OMNIA_CMD_EXT_CONTROL:248 put_unaligned_le16(val, &buf[1]);249 put_unaligned_le16(mask, &buf[3]);250 len = 5;251 break;252 253 default:254 BUG();255 }256 257 return omnia_cmd_write(mcu->client, buf, len);258}259 260static int omnia_ctl_cmd(struct omnia_mcu *mcu, u8 cmd, u16 val, u16 mask)261{262 guard(mutex)(&mcu->lock);263 264 return omnia_ctl_cmd_locked(mcu, cmd, val, mask);265}266 267static int omnia_gpio_request(struct gpio_chip *gc, unsigned int offset)268{269 if (!omnia_gpios[offset].cmd)270 return -EINVAL;271 272 return 0;273}274 275static int omnia_gpio_get_direction(struct gpio_chip *gc, unsigned int offset)276{277 struct omnia_mcu *mcu = gpiochip_get_data(gc);278 279 if (offset == OMNIA_GPIO_PHY_SFP_OFFSET) {280 int val;281 282 scoped_guard(mutex, &mcu->lock) {283 val = omnia_cmd_read_bit(mcu->client,284 OMNIA_CMD_GET_EXT_CONTROL_STATUS,285 OMNIA_EXT_CTL_PHY_SFP_AUTO);286 if (val < 0)287 return val;288 }289 290 if (val)291 return GPIO_LINE_DIRECTION_IN;292 293 return GPIO_LINE_DIRECTION_OUT;294 }295 296 if (omnia_gpios[offset].ctl_cmd)297 return GPIO_LINE_DIRECTION_OUT;298 299 return GPIO_LINE_DIRECTION_IN;300}301 302static int omnia_gpio_direction_input(struct gpio_chip *gc, unsigned int offset)303{304 const struct omnia_gpio *gpio = &omnia_gpios[offset];305 struct omnia_mcu *mcu = gpiochip_get_data(gc);306 307 if (offset == OMNIA_GPIO_PHY_SFP_OFFSET)308 return omnia_ctl_cmd(mcu, OMNIA_CMD_EXT_CONTROL,309 OMNIA_EXT_CTL_PHY_SFP_AUTO,310 OMNIA_EXT_CTL_PHY_SFP_AUTO);311 312 if (gpio->ctl_cmd)313 return -ENOTSUPP;314 315 return 0;316}317 318static int omnia_gpio_direction_output(struct gpio_chip *gc,319 unsigned int offset, int value)320{321 const struct omnia_gpio *gpio = &omnia_gpios[offset];322 struct omnia_mcu *mcu = gpiochip_get_data(gc);323 u16 val, mask;324 325 if (!gpio->ctl_cmd)326 return -ENOTSUPP;327 328 mask = BIT(gpio->ctl_bit);329 val = value ? mask : 0;330 331 if (offset == OMNIA_GPIO_PHY_SFP_OFFSET)332 mask |= OMNIA_EXT_CTL_PHY_SFP_AUTO;333 334 return omnia_ctl_cmd(mcu, gpio->ctl_cmd, val, mask);335}336 337static int omnia_gpio_get(struct gpio_chip *gc, unsigned int offset)338{339 const struct omnia_gpio *gpio = &omnia_gpios[offset];340 struct omnia_mcu *mcu = gpiochip_get_data(gc);341 342 /*343 * If firmware does not support the new interrupt API, we are informed344 * of every change of the status word by an interrupt from MCU and save345 * its value in the interrupt service routine. Simply return the saved346 * value.347 */348 if (gpio->cmd == OMNIA_CMD_GET_STATUS_WORD &&349 !(mcu->features & OMNIA_FEAT_NEW_INT_API))350 return test_bit(gpio->bit, &mcu->last_status);351 352 guard(mutex)(&mcu->lock);353 354 /*355 * If firmware does support the new interrupt API, we may have cached356 * the value of a GPIO in the interrupt service routine. If not, read357 * the relevant bit now.358 */359 if (is_int_bit_valid(gpio) && test_bit(gpio->int_bit, &mcu->is_cached))360 return test_bit(gpio->int_bit, &mcu->cached);361 362 return omnia_cmd_read_bit(mcu->client, gpio->cmd, BIT(gpio->bit));363}364 365static unsigned long *366_relevant_field_for_sts_cmd(u8 cmd, unsigned long *sts, unsigned long *ext_sts,367 unsigned long *ext_ctl)368{369 switch (cmd) {370 case OMNIA_CMD_GET_STATUS_WORD:371 return sts;372 case OMNIA_CMD_GET_EXT_STATUS_DWORD:373 return ext_sts;374 case OMNIA_CMD_GET_EXT_CONTROL_STATUS:375 return ext_ctl;376 default:377 return NULL;378 }379}380 381static int omnia_gpio_get_multiple(struct gpio_chip *gc, unsigned long *mask,382 unsigned long *bits)383{384 unsigned long sts = 0, ext_sts = 0, ext_ctl = 0, *field;385 struct omnia_mcu *mcu = gpiochip_get_data(gc);386 struct i2c_client *client = mcu->client;387 unsigned int i;388 int err;389 390 /* determine which bits to read from the 3 possible commands */391 for_each_set_bit(i, mask, ARRAY_SIZE(omnia_gpios)) {392 field = _relevant_field_for_sts_cmd(omnia_gpios[i].cmd,393 &sts, &ext_sts, &ext_ctl);394 if (!field)395 continue;396 397 __set_bit(omnia_gpios[i].bit, field);398 }399 400 guard(mutex)(&mcu->lock);401 402 if (mcu->features & OMNIA_FEAT_NEW_INT_API) {403 /* read relevant bits from status */404 err = omnia_cmd_read_bits(client, OMNIA_CMD_GET_STATUS_WORD,405 sts, &sts);406 if (err)407 return err;408 } else {409 /*410 * Use status word value cached in the interrupt service routine411 * if firmware does not support the new interrupt API.412 */413 sts = mcu->last_status;414 }415 416 /* read relevant bits from extended status */417 err = omnia_cmd_read_bits(client, OMNIA_CMD_GET_EXT_STATUS_DWORD,418 ext_sts, &ext_sts);419 if (err)420 return err;421 422 /* read relevant bits from extended control */423 err = omnia_cmd_read_bits(client, OMNIA_CMD_GET_EXT_CONTROL_STATUS,424 ext_ctl, &ext_ctl);425 if (err)426 return err;427 428 /* assign relevant bits in result */429 for_each_set_bit(i, mask, ARRAY_SIZE(omnia_gpios)) {430 field = _relevant_field_for_sts_cmd(omnia_gpios[i].cmd,431 &sts, &ext_sts, &ext_ctl);432 if (!field)433 continue;434 435 __assign_bit(i, bits, test_bit(omnia_gpios[i].bit, field));436 }437 438 return 0;439}440 441static void omnia_gpio_set(struct gpio_chip *gc, unsigned int offset, int value)442{443 const struct omnia_gpio *gpio = &omnia_gpios[offset];444 struct omnia_mcu *mcu = gpiochip_get_data(gc);445 u16 val, mask;446 447 if (!gpio->ctl_cmd)448 return;449 450 mask = BIT(gpio->ctl_bit);451 val = value ? mask : 0;452 453 omnia_ctl_cmd(mcu, gpio->ctl_cmd, val, mask);454}455 456static void omnia_gpio_set_multiple(struct gpio_chip *gc, unsigned long *mask,457 unsigned long *bits)458{459 unsigned long ctl = 0, ctl_mask = 0, ext_ctl = 0, ext_ctl_mask = 0;460 struct omnia_mcu *mcu = gpiochip_get_data(gc);461 unsigned int i;462 463 for_each_set_bit(i, mask, ARRAY_SIZE(omnia_gpios)) {464 unsigned long *field, *field_mask;465 u8 bit = omnia_gpios[i].ctl_bit;466 467 switch (omnia_gpios[i].ctl_cmd) {468 case OMNIA_CMD_GENERAL_CONTROL:469 field = &ctl;470 field_mask = &ctl_mask;471 break;472 case OMNIA_CMD_EXT_CONTROL:473 field = &ext_ctl;474 field_mask = &ext_ctl_mask;475 break;476 default:477 field = field_mask = NULL;478 break;479 }480 481 if (!field)482 continue;483 484 __set_bit(bit, field_mask);485 __assign_bit(bit, field, test_bit(i, bits));486 }487 488 guard(mutex)(&mcu->lock);489 490 if (ctl_mask)491 omnia_ctl_cmd_locked(mcu, OMNIA_CMD_GENERAL_CONTROL,492 ctl, ctl_mask);493 494 if (ext_ctl_mask)495 omnia_ctl_cmd_locked(mcu, OMNIA_CMD_EXT_CONTROL,496 ext_ctl, ext_ctl_mask);497}498 499static bool omnia_gpio_available(struct omnia_mcu *mcu,500 const struct omnia_gpio *gpio)501{502 if (gpio->feat_mask)503 return (mcu->features & gpio->feat_mask) == gpio->feat;504 505 if (gpio->feat)506 return mcu->features & gpio->feat;507 508 return true;509}510 511static int omnia_gpio_init_valid_mask(struct gpio_chip *gc,512 unsigned long *valid_mask,513 unsigned int ngpios)514{515 struct omnia_mcu *mcu = gpiochip_get_data(gc);516 517 for (unsigned int i = 0; i < ngpios; i++) {518 const struct omnia_gpio *gpio = &omnia_gpios[i];519 520 if (gpio->cmd || is_int_bit_valid(gpio))521 __assign_bit(i, valid_mask,522 omnia_gpio_available(mcu, gpio));523 else524 __clear_bit(i, valid_mask);525 }526 527 return 0;528}529 530static int omnia_gpio_of_xlate(struct gpio_chip *gc,531 const struct of_phandle_args *gpiospec,532 u32 *flags)533{534 u32 bank, gpio;535 536 if (WARN_ON(gpiospec->args_count != 3))537 return -EINVAL;538 539 if (flags)540 *flags = gpiospec->args[2];541 542 bank = gpiospec->args[0];543 gpio = gpiospec->args[1];544 545 switch (bank) {546 case 0:547 return gpio < 16 ? gpio : -EINVAL;548 case 1:549 return gpio < 32 ? 16 + gpio : -EINVAL;550 case 2:551 return gpio < 16 ? 48 + gpio : -EINVAL;552 default:553 return -EINVAL;554 }555}556 557static void omnia_irq_shutdown(struct irq_data *d)558{559 struct gpio_chip *gc = irq_data_get_irq_chip_data(d);560 struct omnia_mcu *mcu = gpiochip_get_data(gc);561 irq_hw_number_t hwirq = irqd_to_hwirq(d);562 u8 bit = omnia_gpios[hwirq].int_bit;563 564 __clear_bit(bit, &mcu->rising);565 __clear_bit(bit, &mcu->falling);566}567 568static void omnia_irq_mask(struct irq_data *d)569{570 struct gpio_chip *gc = irq_data_get_irq_chip_data(d);571 struct omnia_mcu *mcu = gpiochip_get_data(gc);572 irq_hw_number_t hwirq = irqd_to_hwirq(d);573 u8 bit = omnia_gpios[hwirq].int_bit;574 575 if (!omnia_gpios[hwirq].cmd)576 __clear_bit(bit, &mcu->rising);577 __clear_bit(bit, &mcu->mask);578 gpiochip_disable_irq(gc, hwirq);579}580 581static void omnia_irq_unmask(struct irq_data *d)582{583 struct gpio_chip *gc = irq_data_get_irq_chip_data(d);584 struct omnia_mcu *mcu = gpiochip_get_data(gc);585 irq_hw_number_t hwirq = irqd_to_hwirq(d);586 u8 bit = omnia_gpios[hwirq].int_bit;587 588 gpiochip_enable_irq(gc, hwirq);589 __set_bit(bit, &mcu->mask);590 if (!omnia_gpios[hwirq].cmd)591 __set_bit(bit, &mcu->rising);592}593 594static int omnia_irq_set_type(struct irq_data *d, unsigned int type)595{596 struct gpio_chip *gc = irq_data_get_irq_chip_data(d);597 struct omnia_mcu *mcu = gpiochip_get_data(gc);598 irq_hw_number_t hwirq = irqd_to_hwirq(d);599 struct device *dev = &mcu->client->dev;600 u8 bit = omnia_gpios[hwirq].int_bit;601 602 if (!(type & IRQ_TYPE_EDGE_BOTH)) {603 dev_err(dev, "irq %u: unsupported type %u\n", d->irq, type);604 return -EINVAL;605 }606 607 __assign_bit(bit, &mcu->rising, type & IRQ_TYPE_EDGE_RISING);608 __assign_bit(bit, &mcu->falling, type & IRQ_TYPE_EDGE_FALLING);609 610 return 0;611}612 613static void omnia_irq_bus_lock(struct irq_data *d)614{615 struct gpio_chip *gc = irq_data_get_irq_chip_data(d);616 struct omnia_mcu *mcu = gpiochip_get_data(gc);617 618 /* nothing to do if MCU firmware does not support new interrupt API */619 if (!(mcu->features & OMNIA_FEAT_NEW_INT_API))620 return;621 622 mutex_lock(&mcu->lock);623}624 625/**626 * omnia_mask_interleave - Interleaves the bytes from @rising and @falling627 * @dst: the destination u8 array of interleaved bytes628 * @rising: rising mask629 * @falling: falling mask630 *631 * Interleaves the little-endian bytes from @rising and @falling words.632 *633 * If @rising = (r0, r1, r2, r3) and @falling = (f0, f1, f2, f3), the result is634 * @dst = (r0, f0, r1, f1, r2, f2, r3, f3).635 *636 * The MCU receives an interrupt mask and reports a pending interrupt bitmap in637 * this interleaved format. The rationale behind this is that the low-indexed638 * bits are more important - in many cases, the user will be interested only in639 * interrupts with indexes 0 to 7, and so the system can stop reading after640 * first 2 bytes (r0, f0), to save time on the slow I2C bus.641 *642 * Feel free to remove this function and its inverse, omnia_mask_deinterleave,643 * and use an appropriate bitmap_*() function once such a function exists.644 */645static void646omnia_mask_interleave(u8 *dst, unsigned long rising, unsigned long falling)647{648 for (unsigned int i = 0; i < sizeof(u32); i++) {649 dst[2 * i] = rising >> (8 * i);650 dst[2 * i + 1] = falling >> (8 * i);651 }652}653 654/**655 * omnia_mask_deinterleave - Deinterleaves the bytes into @rising and @falling656 * @src: the source u8 array containing the interleaved bytes657 * @rising: pointer where to store the rising mask gathered from @src658 * @falling: pointer where to store the falling mask gathered from @src659 *660 * This is the inverse function to omnia_mask_interleave.661 */662static void omnia_mask_deinterleave(const u8 *src, unsigned long *rising,663 unsigned long *falling)664{665 *rising = *falling = 0;666 667 for (unsigned int i = 0; i < sizeof(u32); i++) {668 *rising |= src[2 * i] << (8 * i);669 *falling |= src[2 * i + 1] << (8 * i);670 }671}672 673static void omnia_irq_bus_sync_unlock(struct irq_data *d)674{675 struct gpio_chip *gc = irq_data_get_irq_chip_data(d);676 struct omnia_mcu *mcu = gpiochip_get_data(gc);677 struct device *dev = &mcu->client->dev;678 u8 cmd[1 + OMNIA_CMD_INT_ARG_LEN];679 unsigned long rising, falling;680 int err;681 682 /* nothing to do if MCU firmware does not support new interrupt API */683 if (!(mcu->features & OMNIA_FEAT_NEW_INT_API))684 return;685 686 cmd[0] = OMNIA_CMD_SET_INT_MASK;687 688 rising = mcu->rising & mcu->mask;689 falling = mcu->falling & mcu->mask;690 691 /* interleave the rising and falling bytes into the command arguments */692 omnia_mask_interleave(&cmd[1], rising, falling);693 694 dev_dbg(dev, "set int mask %8ph\n", &cmd[1]);695 696 err = omnia_cmd_write(mcu->client, cmd, sizeof(cmd));697 if (err) {698 dev_err(dev, "Cannot set mask: %d\n", err);699 goto unlock;700 }701 702 /*703 * Remember which GPIOs have both rising and falling interrupts enabled.704 * For those we will cache their value so that .get() method is faster.705 * We also need to forget cached values of GPIOs that aren't cached706 * anymore.707 */708 mcu->both = rising & falling;709 mcu->is_cached &= mcu->both;710 711unlock:712 mutex_unlock(&mcu->lock);713}714 715static const struct irq_chip omnia_mcu_irq_chip = {716 .name = "Turris Omnia MCU interrupts",717 .irq_shutdown = omnia_irq_shutdown,718 .irq_mask = omnia_irq_mask,719 .irq_unmask = omnia_irq_unmask,720 .irq_set_type = omnia_irq_set_type,721 .irq_bus_lock = omnia_irq_bus_lock,722 .irq_bus_sync_unlock = omnia_irq_bus_sync_unlock,723 .flags = IRQCHIP_IMMUTABLE,724 GPIOCHIP_IRQ_RESOURCE_HELPERS,725};726 727static void omnia_irq_init_valid_mask(struct gpio_chip *gc,728 unsigned long *valid_mask,729 unsigned int ngpios)730{731 struct omnia_mcu *mcu = gpiochip_get_data(gc);732 733 for (unsigned int i = 0; i < ngpios; i++) {734 const struct omnia_gpio *gpio = &omnia_gpios[i];735 736 if (is_int_bit_valid(gpio))737 __assign_bit(i, valid_mask,738 omnia_gpio_available(mcu, gpio));739 else740 __clear_bit(i, valid_mask);741 }742}743 744static int omnia_irq_init_hw(struct gpio_chip *gc)745{746 struct omnia_mcu *mcu = gpiochip_get_data(gc);747 u8 cmd[1 + OMNIA_CMD_INT_ARG_LEN] = {};748 749 cmd[0] = OMNIA_CMD_SET_INT_MASK;750 751 return omnia_cmd_write(mcu->client, cmd, sizeof(cmd));752}753 754/*755 * Determine how many bytes we need to read from the reply to the756 * OMNIA_CMD_GET_INT_AND_CLEAR command in order to retrieve all unmasked757 * interrupts.758 */759static unsigned int760omnia_irq_compute_pending_length(unsigned long rising, unsigned long falling)761{762 return max(omnia_compute_reply_length(rising, true, 0),763 omnia_compute_reply_length(falling, true, 1));764}765 766static bool omnia_irq_read_pending_new(struct omnia_mcu *mcu,767 unsigned long *pending)768{769 struct device *dev = &mcu->client->dev;770 u8 reply[OMNIA_CMD_INT_ARG_LEN] = {};771 unsigned long rising, falling;772 unsigned int len;773 int err;774 775 len = omnia_irq_compute_pending_length(mcu->rising & mcu->mask,776 mcu->falling & mcu->mask);777 if (!len)778 return false;779 780 guard(mutex)(&mcu->lock);781 782 err = omnia_cmd_read(mcu->client, OMNIA_CMD_GET_INT_AND_CLEAR, reply,783 len);784 if (err) {785 dev_err(dev, "Cannot read pending IRQs: %d\n", err);786 return false;787 }788 789 /* deinterleave the reply bytes into rising and falling */790 omnia_mask_deinterleave(reply, &rising, &falling);791 792 rising &= mcu->mask;793 falling &= mcu->mask;794 *pending = rising | falling;795 796 /* cache values for GPIOs that have both edges enabled */797 mcu->is_cached &= ~(rising & falling);798 mcu->is_cached |= mcu->both & (rising ^ falling);799 mcu->cached = (mcu->cached | rising) & ~falling;800 801 return true;802}803 804static int omnia_read_status_word_old_fw(struct omnia_mcu *mcu,805 unsigned long *status)806{807 u16 raw_status;808 int err;809 810 err = omnia_cmd_read_u16(mcu->client, OMNIA_CMD_GET_STATUS_WORD,811 &raw_status);812 if (err)813 return err;814 815 /*816 * Old firmware has a bug wherein it never resets the USB port817 * overcurrent bits back to zero. Ignore them.818 */819 *status = raw_status & ~(OMNIA_STS_USB30_OVC | OMNIA_STS_USB31_OVC);820 821 return 0;822}823 824static void button_release_emul_fn(struct work_struct *work)825{826 struct omnia_mcu *mcu = container_of(to_delayed_work(work),827 struct omnia_mcu,828 button_release_emul_work);829 830 mcu->button_pressed_emul = false;831 generic_handle_irq_safe(mcu->client->irq);832}833 834static void835fill_int_from_sts(unsigned long *rising, unsigned long *falling,836 unsigned long rising_sts, unsigned long falling_sts,837 unsigned long sts_bit, unsigned long int_bit)838{839 if (rising_sts & sts_bit)840 *rising |= int_bit;841 if (falling_sts & sts_bit)842 *falling |= int_bit;843}844 845static bool omnia_irq_read_pending_old(struct omnia_mcu *mcu,846 unsigned long *pending)847{848 unsigned long status, rising_sts, falling_sts, rising, falling;849 struct device *dev = &mcu->client->dev;850 int err;851 852 guard(mutex)(&mcu->lock);853 854 err = omnia_read_status_word_old_fw(mcu, &status);855 if (err) {856 dev_err(dev, "Cannot read pending IRQs: %d\n", err);857 return false;858 }859 860 /*861 * The old firmware triggers an interrupt whenever status word changes,862 * but does not inform about which bits rose or fell. We need to compute863 * this here by comparing with the last status word value.864 *865 * The OMNIA_STS_BUTTON_PRESSED bit needs special handling, because the866 * old firmware clears the OMNIA_STS_BUTTON_PRESSED bit on successful867 * completion of the OMNIA_CMD_GET_STATUS_WORD command, resulting in868 * another interrupt:869 * - first we get an interrupt, we read the status word where870 * OMNIA_STS_BUTTON_PRESSED is present,871 * - MCU clears the OMNIA_STS_BUTTON_PRESSED bit because we read the872 * status word,873 * - we get another interrupt because the status word changed again874 * (the OMNIA_STS_BUTTON_PRESSED bit was cleared).875 *876 * The gpiolib-cdev, gpiolib-sysfs and gpio-keys input driver all call877 * the gpiochip's .get() method after an edge event on a requested GPIO878 * occurs.879 *880 * We ensure that the .get() method reads 1 for the button GPIO for some881 * time.882 */883 884 if (status & OMNIA_STS_BUTTON_PRESSED) {885 mcu->button_pressed_emul = true;886 mod_delayed_work(system_wq, &mcu->button_release_emul_work,887 msecs_to_jiffies(FRONT_BUTTON_RELEASE_DELAY_MS));888 } else if (mcu->button_pressed_emul) {889 status |= OMNIA_STS_BUTTON_PRESSED;890 }891 892 rising_sts = ~mcu->last_status & status;893 falling_sts = mcu->last_status & ~status;894 895 mcu->last_status = status;896 897 /*898 * Fill in the relevant interrupt bits from status bits for CARD_DET,899 * MSATA_IND and BUTTON_PRESSED.900 */901 rising = 0;902 falling = 0;903 fill_int_from_sts(&rising, &falling, rising_sts, falling_sts,904 OMNIA_STS_CARD_DET, OMNIA_INT_CARD_DET);905 fill_int_from_sts(&rising, &falling, rising_sts, falling_sts,906 OMNIA_STS_MSATA_IND, OMNIA_INT_MSATA_IND);907 fill_int_from_sts(&rising, &falling, rising_sts, falling_sts,908 OMNIA_STS_BUTTON_PRESSED, OMNIA_INT_BUTTON_PRESSED);909 910 /* Use only bits that are enabled */911 rising &= mcu->rising & mcu->mask;912 falling &= mcu->falling & mcu->mask;913 *pending = rising | falling;914 915 return true;916}917 918static bool omnia_irq_read_pending(struct omnia_mcu *mcu,919 unsigned long *pending)920{921 if (mcu->features & OMNIA_FEAT_NEW_INT_API)922 return omnia_irq_read_pending_new(mcu, pending);923 else924 return omnia_irq_read_pending_old(mcu, pending);925}926 927static irqreturn_t omnia_irq_thread_handler(int irq, void *dev_id)928{929 struct omnia_mcu *mcu = dev_id;930 struct irq_domain *domain;931 unsigned long pending;932 unsigned int i;933 934 if (!omnia_irq_read_pending(mcu, &pending))935 return IRQ_NONE;936 937 domain = mcu->gc.irq.domain;938 939 for_each_set_bit(i, &pending, 32) {940 unsigned int nested_irq;941 942 nested_irq = irq_find_mapping(domain, omnia_int_to_gpio_idx[i]);943 944 handle_nested_irq(nested_irq);945 }946 947 return IRQ_RETVAL(pending);948}949 950static const char * const front_button_modes[] = { "mcu", "cpu" };951 952static ssize_t front_button_mode_show(struct device *dev,953 struct device_attribute *a, char *buf)954{955 struct omnia_mcu *mcu = dev_get_drvdata(dev);956 int val;957 958 if (mcu->features & OMNIA_FEAT_NEW_INT_API) {959 val = omnia_cmd_read_bit(mcu->client, OMNIA_CMD_GET_STATUS_WORD,960 OMNIA_STS_BUTTON_MODE);961 if (val < 0)962 return val;963 } else {964 val = !!(mcu->last_status & OMNIA_STS_BUTTON_MODE);965 }966 967 return sysfs_emit(buf, "%s\n", front_button_modes[val]);968}969 970static ssize_t front_button_mode_store(struct device *dev,971 struct device_attribute *a,972 const char *buf, size_t count)973{974 struct omnia_mcu *mcu = dev_get_drvdata(dev);975 int err, i;976 977 i = sysfs_match_string(front_button_modes, buf);978 if (i < 0)979 return i;980 981 err = omnia_ctl_cmd_locked(mcu, OMNIA_CMD_GENERAL_CONTROL,982 i ? OMNIA_CTL_BUTTON_MODE : 0,983 OMNIA_CTL_BUTTON_MODE);984 if (err)985 return err;986 987 return count;988}989static DEVICE_ATTR_RW(front_button_mode);990 991static struct attribute *omnia_mcu_gpio_attrs[] = {992 &dev_attr_front_button_mode.attr,993 NULL994};995 996const struct attribute_group omnia_mcu_gpio_group = {997 .attrs = omnia_mcu_gpio_attrs,998};999 1000int omnia_mcu_register_gpiochip(struct omnia_mcu *mcu)1001{1002 bool new_api = mcu->features & OMNIA_FEAT_NEW_INT_API;1003 struct device *dev = &mcu->client->dev;1004 unsigned long irqflags;1005 int err;1006 1007 err = devm_mutex_init(dev, &mcu->lock);1008 if (err)1009 return err;1010 1011 mcu->gc.request = omnia_gpio_request;1012 mcu->gc.get_direction = omnia_gpio_get_direction;1013 mcu->gc.direction_input = omnia_gpio_direction_input;1014 mcu->gc.direction_output = omnia_gpio_direction_output;1015 mcu->gc.get = omnia_gpio_get;1016 mcu->gc.get_multiple = omnia_gpio_get_multiple;1017 mcu->gc.set = omnia_gpio_set;1018 mcu->gc.set_multiple = omnia_gpio_set_multiple;1019 mcu->gc.init_valid_mask = omnia_gpio_init_valid_mask;1020 mcu->gc.can_sleep = true;1021 mcu->gc.names = omnia_mcu_gpio_templates;1022 mcu->gc.base = -1;1023 mcu->gc.ngpio = ARRAY_SIZE(omnia_gpios);1024 mcu->gc.label = "Turris Omnia MCU GPIOs";1025 mcu->gc.parent = dev;1026 mcu->gc.owner = THIS_MODULE;1027 mcu->gc.of_gpio_n_cells = 3;1028 mcu->gc.of_xlate = omnia_gpio_of_xlate;1029 1030 gpio_irq_chip_set_chip(&mcu->gc.irq, &omnia_mcu_irq_chip);1031 /* This will let us handle the parent IRQ in the driver */1032 mcu->gc.irq.parent_handler = NULL;1033 mcu->gc.irq.num_parents = 0;1034 mcu->gc.irq.parents = NULL;1035 mcu->gc.irq.default_type = IRQ_TYPE_NONE;1036 mcu->gc.irq.handler = handle_bad_irq;1037 mcu->gc.irq.threaded = true;1038 if (new_api)1039 mcu->gc.irq.init_hw = omnia_irq_init_hw;1040 mcu->gc.irq.init_valid_mask = omnia_irq_init_valid_mask;1041 1042 err = devm_gpiochip_add_data(dev, &mcu->gc, mcu);1043 if (err)1044 return dev_err_probe(dev, err, "Cannot add GPIO chip\n");1045 1046 /*1047 * Before requesting the interrupt, if firmware does not support the new1048 * interrupt API, we need to cache the value of the status word, so that1049 * when it changes, we may compare the new value with the cached one in1050 * the interrupt handler.1051 */1052 if (!new_api) {1053 err = omnia_read_status_word_old_fw(mcu, &mcu->last_status);1054 if (err)1055 return dev_err_probe(dev, err,1056 "Cannot read status word\n");1057 1058 INIT_DELAYED_WORK(&mcu->button_release_emul_work,1059 button_release_emul_fn);1060 }1061 1062 irqflags = IRQF_ONESHOT;1063 if (new_api)1064 irqflags |= IRQF_TRIGGER_LOW;1065 else1066 irqflags |= IRQF_TRIGGER_FALLING;1067 1068 err = devm_request_threaded_irq(dev, mcu->client->irq, NULL,1069 omnia_irq_thread_handler, irqflags,1070 "turris-omnia-mcu", mcu);1071 if (err)1072 return dev_err_probe(dev, err, "Cannot request IRQ\n");1073 1074 if (!new_api) {1075 /*1076 * The button_release_emul_work has to be initialized before the1077 * thread is requested, and on driver remove it needs to be1078 * canceled before the thread is freed. Therefore we can't use1079 * devm_delayed_work_autocancel() directly, because the order1080 * devm_delayed_work_autocancel();1081 * devm_request_threaded_irq();1082 * would cause improper release order:1083 * free_irq();1084 * cancel_delayed_work_sync();1085 * Instead we first initialize the work above, and only now1086 * after IRQ is requested we add the work devm action.1087 */1088 err = devm_add_action(dev, devm_delayed_work_drop,1089 &mcu->button_release_emul_work);1090 if (err)1091 return err;1092 }1093 1094 return 0;1095}1096