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1// SPDX-License-Identifier: GPL-2.02/*3 * Primary to Sideband (P2SB) bridge access support4 *5 * Copyright (c) 2017, 2021-2022 Intel Corporation.6 *7 * Authors: Andy Shevchenko <andriy.shevchenko@linux.intel.com>8 * Jonathan Yong <jonathan.yong@intel.com>9 */10 11#include <linux/bits.h>12#include <linux/export.h>13#include <linux/pci.h>14#include <linux/platform_data/x86/p2sb.h>15 16#include <asm/cpu_device_id.h>17#include <asm/intel-family.h>18 19#define P2SBC 0xe020#define P2SBC_HIDE BIT(8)21 22#define P2SB_DEVFN_DEFAULT PCI_DEVFN(31, 1)23#define P2SB_DEVFN_GOLDMONT PCI_DEVFN(13, 0)24#define SPI_DEVFN_GOLDMONT PCI_DEVFN(13, 2)25 26static const struct x86_cpu_id p2sb_cpu_ids[] = {27 X86_MATCH_VFM(INTEL_ATOM_GOLDMONT, P2SB_DEVFN_GOLDMONT),28 {}29};30 31/*32 * Cache BAR0 of P2SB device functions 0 to 7.33 * TODO: The constant 8 is the number of functions that PCI specification34 * defines. Same definitions exist tree-wide. Unify this definition and35 * the other definitions then move to include/uapi/linux/pci.h.36 */37#define NR_P2SB_RES_CACHE 838 39struct p2sb_res_cache {40 u32 bus_dev_id;41 struct resource res;42};43 44static struct p2sb_res_cache p2sb_resources[NR_P2SB_RES_CACHE];45 46static void p2sb_get_devfn(unsigned int *devfn)47{48 unsigned int fn = P2SB_DEVFN_DEFAULT;49 const struct x86_cpu_id *id;50 51 id = x86_match_cpu(p2sb_cpu_ids);52 if (id)53 fn = (unsigned int)id->driver_data;54 55 *devfn = fn;56}57 58static bool p2sb_valid_resource(const struct resource *res)59{60 return res->flags & ~IORESOURCE_UNSET;61}62 63/* Copy resource from the first BAR of the device in question */64static void p2sb_read_bar0(struct pci_dev *pdev, struct resource *mem)65{66 struct resource *bar0 = pci_resource_n(pdev, 0);67 68 /* Make sure we have no dangling pointers in the output */69 memset(mem, 0, sizeof(*mem));70 71 /*72 * We copy only selected fields from the original resource.73 * Because a PCI device will be removed soon, we may not use74 * any allocated data, hence we may not copy any pointers.75 */76 mem->start = bar0->start;77 mem->end = bar0->end;78 mem->flags = bar0->flags;79 mem->desc = bar0->desc;80}81 82static void p2sb_scan_and_cache_devfn(struct pci_bus *bus, unsigned int devfn)83{84 struct p2sb_res_cache *cache = &p2sb_resources[PCI_FUNC(devfn)];85 struct pci_dev *pdev;86 87 pdev = pci_scan_single_device(bus, devfn);88 if (!pdev)89 return;90 91 p2sb_read_bar0(pdev, &cache->res);92 cache->bus_dev_id = bus->dev.id;93 94 pci_stop_and_remove_bus_device(pdev);95}96 97static int p2sb_scan_and_cache(struct pci_bus *bus, unsigned int devfn)98{99 /* Scan the P2SB device and cache its BAR0 */100 p2sb_scan_and_cache_devfn(bus, devfn);101 102 /* On Goldmont p2sb_bar() also gets called for the SPI controller */103 if (devfn == P2SB_DEVFN_GOLDMONT)104 p2sb_scan_and_cache_devfn(bus, SPI_DEVFN_GOLDMONT);105 106 if (!p2sb_valid_resource(&p2sb_resources[PCI_FUNC(devfn)].res))107 return -ENOENT;108 109 return 0;110}111 112static struct pci_bus *p2sb_get_bus(struct pci_bus *bus)113{114 static struct pci_bus *p2sb_bus;115 116 bus = bus ?: p2sb_bus;117 if (bus)118 return bus;119 120 /* Assume P2SB is on the bus 0 in domain 0 */121 p2sb_bus = pci_find_bus(0, 0);122 return p2sb_bus;123}124 125static int p2sb_cache_resources(void)126{127 unsigned int devfn_p2sb;128 u32 value = P2SBC_HIDE;129 struct pci_bus *bus;130 u16 class;131 int ret;132 133 /* Get devfn for P2SB device itself */134 p2sb_get_devfn(&devfn_p2sb);135 136 bus = p2sb_get_bus(NULL);137 if (!bus)138 return -ENODEV;139 140 /*141 * When a device with same devfn exists and its device class is not142 * PCI_CLASS_MEMORY_OTHER for P2SB, do not touch it.143 */144 pci_bus_read_config_word(bus, devfn_p2sb, PCI_CLASS_DEVICE, &class);145 if (!PCI_POSSIBLE_ERROR(class) && class != PCI_CLASS_MEMORY_OTHER)146 return -ENODEV;147 148 /*149 * Prevent concurrent PCI bus scan from seeing the P2SB device and150 * removing via sysfs while it is temporarily exposed.151 */152 pci_lock_rescan_remove();153 154 /*155 * The BIOS prevents the P2SB device from being enumerated by the PCI156 * subsystem, so we need to unhide and hide it back to lookup the BAR.157 * Unhide the P2SB device here, if needed.158 */159 pci_bus_read_config_dword(bus, devfn_p2sb, P2SBC, &value);160 if (value & P2SBC_HIDE)161 pci_bus_write_config_dword(bus, devfn_p2sb, P2SBC, 0);162 163 ret = p2sb_scan_and_cache(bus, devfn_p2sb);164 165 /* Hide the P2SB device, if it was hidden */166 if (value & P2SBC_HIDE)167 pci_bus_write_config_dword(bus, devfn_p2sb, P2SBC, P2SBC_HIDE);168 169 pci_unlock_rescan_remove();170 171 return ret;172}173 174/**175 * p2sb_bar - Get Primary to Sideband (P2SB) bridge device BAR176 * @bus: PCI bus to communicate with177 * @devfn: PCI slot and function to communicate with178 * @mem: memory resource to be filled in179 *180 * If @bus is NULL, the bus 0 in domain 0 will be used.181 * If @devfn is 0, it will be replaced by devfn of the P2SB device.182 *183 * Caller must provide a valid pointer to @mem.184 *185 * Return:186 * 0 on success or appropriate errno value on error.187 */188int p2sb_bar(struct pci_bus *bus, unsigned int devfn, struct resource *mem)189{190 struct p2sb_res_cache *cache;191 192 bus = p2sb_get_bus(bus);193 if (!bus)194 return -ENODEV;195 196 if (!devfn)197 p2sb_get_devfn(&devfn);198 199 cache = &p2sb_resources[PCI_FUNC(devfn)];200 if (cache->bus_dev_id != bus->dev.id)201 return -ENODEV;202 203 if (!p2sb_valid_resource(&cache->res))204 return -ENOENT;205 206 memcpy(mem, &cache->res, sizeof(*mem));207 return 0;208}209EXPORT_SYMBOL_GPL(p2sb_bar);210 211static int __init p2sb_fs_init(void)212{213 return p2sb_cache_resources();214}215 216/*217 * pci_rescan_remove_lock() can not be locked in sysfs PCI bus rescan path218 * because of deadlock. To avoid the deadlock, access P2SB devices with the lock219 * at an early step in kernel initialization and cache required resources.220 *221 * We want to run as early as possible. If the P2SB was assigned a bad BAR,222 * we'll need to wait on pcibios_assign_resources() to fix it. So, our list of223 * initcall dependencies looks something like this:224 *225 * ...226 * subsys_initcall (pci_subsys_init)227 * fs_initcall (pcibios_assign_resources)228 */229fs_initcall_sync(p2sb_fs_init);230