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1/* SPDX-License-Identifier: GPL-2.0 */2/*3 * R-Car Gen4 System Controller4 *5 * Copyright (C) 2021 Renesas Electronics Corp.6 */7#ifndef __SOC_RENESAS_RCAR_GEN4_SYSC_H__8#define __SOC_RENESAS_RCAR_GEN4_SYSC_H__9 10#include <linux/types.h>11 12/*13 * Power Domain flags14 */15#define PD_CPU BIT(0) /* Area contains main CPU core */16#define PD_SCU BIT(1) /* Area contains SCU and L2 cache */17#define PD_NO_CR BIT(2) /* Area lacks PWR{ON,OFF}CR registers */18 19#define PD_CPU_NOCR (PD_CPU | PD_NO_CR) /* CPU area lacks CR */20#define PD_ALWAYS_ON PD_NO_CR /* Always-on area */21 22/*23 * Description of a Power Area24 */25struct rcar_gen4_sysc_area {26 const char *name;27 u8 pdr; /* PDRn */28 s8 parent; /* -1 if none */29 u8 flags; /* See PD_* */30};31 32/*33 * SoC-specific Power Area Description34 */35struct rcar_gen4_sysc_info {36 const struct rcar_gen4_sysc_area *areas;37 unsigned int num_areas;38};39 40extern const struct rcar_gen4_sysc_info r8a779a0_sysc_info;41extern const struct rcar_gen4_sysc_info r8a779f0_sysc_info;42extern const struct rcar_gen4_sysc_info r8a779g0_sysc_info;43extern const struct rcar_gen4_sysc_info r8a779h0_sysc_info;44 45#endif /* __SOC_RENESAS_RCAR_GEN4_SYSC_H__ */46