1275 lines · c
1// SPDX-License-Identifier: GPL-2.0-only2/*3 * Copyright (C) 2022 Richtek Technology Corp.4 *5 * Author: ChiYuan Huang <cy_huang@richtek.com>6 * ChiaEn Wu <chiaen_wu@richtek.com>7 */8 9#include <linux/bits.h>10#include <linux/bitfield.h>11#include <linux/completion.h>12#include <linux/delay.h>13#include <linux/gpio/consumer.h>14#include <linux/i2c.h>15#include <linux/interrupt.h>16#include <linux/kernel.h>17#include <linux/kstrtox.h>18#include <linux/linear_range.h>19#include <linux/module.h>20#include <linux/mod_devicetable.h>21#include <linux/mutex.h>22#include <linux/of.h>23#include <linux/power_supply.h>24#include <linux/regmap.h>25#include <linux/regulator/driver.h>26#include <linux/units.h>27#include <linux/sysfs.h>28 29#define RT9467_REG_CORE_CTRL0 0x0030#define RT9467_REG_CHG_CTRL1 0x0131#define RT9467_REG_CHG_CTRL2 0x0232#define RT9467_REG_CHG_CTRL3 0x0333#define RT9467_REG_CHG_CTRL4 0x0434#define RT9467_REG_CHG_CTRL5 0x0535#define RT9467_REG_CHG_CTRL6 0x0636#define RT9467_REG_CHG_CTRL7 0x0737#define RT9467_REG_CHG_CTRL8 0x0838#define RT9467_REG_CHG_CTRL9 0x0939#define RT9467_REG_CHG_CTRL10 0x0A40#define RT9467_REG_CHG_CTRL12 0x0C41#define RT9467_REG_CHG_CTRL13 0x0D42#define RT9467_REG_CHG_CTRL14 0x0E43#define RT9467_REG_CHG_ADC 0x1144#define RT9467_REG_CHG_DPDM1 0x1245#define RT9467_REG_CHG_DPDM2 0x1346#define RT9467_REG_DEVICE_ID 0x4047#define RT9467_REG_CHG_STAT 0x4248#define RT9467_REG_ADC_DATA_H 0x4449#define RT9467_REG_CHG_STATC 0x5050#define RT9467_REG_CHG_IRQ1 0x5351#define RT9467_REG_CHG_STATC_CTRL 0x6052#define RT9467_REG_CHG_IRQ1_CTRL 0x6353 54#define RT9467_MASK_PWR_RDY BIT(7)55#define RT9467_MASK_MIVR_STAT BIT(6)56#define RT9467_MASK_OTG_CSEL GENMASK(2, 0)57#define RT9467_MASK_OTG_VSEL GENMASK(7, 2)58#define RT9467_MASK_OTG_EN BIT(0)59#define RT9467_MASK_ADC_IN_SEL GENMASK(7, 4)60#define RT9467_MASK_ADC_START BIT(0)61 62#define RT9467_NUM_IRQ_REGS 463#define RT9467_ICHG_MIN_uA 10000064#define RT9467_ICHG_MAX_uA 500000065#define RT9467_CV_MAX_uV 471000066#define RT9467_OTG_MIN_uV 442500067#define RT9467_OTG_MAX_uV 582500068#define RT9467_OTG_STEP_uV 2500069#define RT9467_NUM_VOTG (RT9467_OTG_MAX_uV - RT9467_OTG_MIN_uV + 1)70#define RT9467_AICLVTH_GAP_uV 20000071#define RT9467_ADCCONV_TIME_MS 3572 73#define RT9466_VID 0x874#define RT9467_VID 0x975 76/* IRQ number */77#define RT9467_IRQ_TS_STATC 078#define RT9467_IRQ_CHG_FAULT 179#define RT9467_IRQ_CHG_STATC 280#define RT9467_IRQ_CHG_TMR 381#define RT9467_IRQ_CHG_BATABS 482#define RT9467_IRQ_CHG_ADPBAD 583#define RT9467_IRQ_CHG_RVP 684#define RT9467_IRQ_OTP 785 86#define RT9467_IRQ_CHG_AICLM 887#define RT9467_IRQ_CHG_ICHGM 988#define RT9467_IRQ_WDTMR 1189#define RT9467_IRQ_SSFINISH 1290#define RT9467_IRQ_CHG_RECHG 1391#define RT9467_IRQ_CHG_TERM 1492#define RT9467_IRQ_CHG_IEOC 1593 94#define RT9467_IRQ_ADC_DONE 1695#define RT9467_IRQ_PUMPX_DONE 1796#define RT9467_IRQ_BST_BATUV 2197#define RT9467_IRQ_BST_MIDOV 2298#define RT9467_IRQ_BST_OLP 2399 100#define RT9467_IRQ_ATTACH 24101#define RT9467_IRQ_DETACH 25102#define RT9467_IRQ_HVDCP_DET 29103#define RT9467_IRQ_CHGDET 30104#define RT9467_IRQ_DCDT 31105 106enum rt9467_fields {107 /* RT9467_REG_CORE_CTRL0 */108 F_RST = 0,109 /* RT9467_REG_CHG_CTRL1 */110 F_HZ, F_OTG_PIN_EN, F_OPA_MODE,111 /* RT9467_REG_CHG_CTRL2 */112 F_SHIP_MODE, F_TE, F_IINLMTSEL, F_CFO_EN, F_CHG_EN,113 /* RT9467_REG_CHG_CTRL3 */114 F_IAICR, F_ILIM_EN,115 /* RT9467_REG_CHG_CTRL4 */116 F_VOREG,117 /* RT9467_REG_CHG_CTRL6 */118 F_VMIVR,119 /* RT9467_REG_CHG_CTRL7 */120 F_ICHG,121 /* RT9467_REG_CHG_CTRL8 */122 F_IPREC,123 /* RT9467_REG_CHG_CTRL9 */124 F_IEOC,125 /* RT9467_REG_CHG_CTRL12 */126 F_WT_FC,127 /* RT9467_REG_CHG_CTRL13 */128 F_OCP,129 /* RT9467_REG_CHG_CTRL14 */130 F_AICL_MEAS, F_AICL_VTH,131 /* RT9467_REG_CHG_DPDM1 */132 F_USBCHGEN,133 /* RT9467_REG_CHG_DPDM2 */134 F_USB_STATUS,135 /* RT9467_REG_DEVICE_ID */136 F_VENDOR,137 /* RT9467_REG_CHG_STAT */138 F_CHG_STAT,139 /* RT9467_REG_CHG_STATC */140 F_PWR_RDY, F_CHG_MIVR,141 F_MAX_FIELDS142};143 144static const struct regmap_irq rt9467_irqs[] = {145 REGMAP_IRQ_REG_LINE(RT9467_IRQ_TS_STATC, 8),146 REGMAP_IRQ_REG_LINE(RT9467_IRQ_CHG_FAULT, 8),147 REGMAP_IRQ_REG_LINE(RT9467_IRQ_CHG_STATC, 8),148 REGMAP_IRQ_REG_LINE(RT9467_IRQ_CHG_TMR, 8),149 REGMAP_IRQ_REG_LINE(RT9467_IRQ_CHG_BATABS, 8),150 REGMAP_IRQ_REG_LINE(RT9467_IRQ_CHG_ADPBAD, 8),151 REGMAP_IRQ_REG_LINE(RT9467_IRQ_CHG_RVP, 8),152 REGMAP_IRQ_REG_LINE(RT9467_IRQ_OTP, 8),153 REGMAP_IRQ_REG_LINE(RT9467_IRQ_CHG_AICLM, 8),154 REGMAP_IRQ_REG_LINE(RT9467_IRQ_CHG_ICHGM, 8),155 REGMAP_IRQ_REG_LINE(RT9467_IRQ_WDTMR, 8),156 REGMAP_IRQ_REG_LINE(RT9467_IRQ_SSFINISH, 8),157 REGMAP_IRQ_REG_LINE(RT9467_IRQ_CHG_RECHG, 8),158 REGMAP_IRQ_REG_LINE(RT9467_IRQ_CHG_TERM, 8),159 REGMAP_IRQ_REG_LINE(RT9467_IRQ_CHG_IEOC, 8),160 REGMAP_IRQ_REG_LINE(RT9467_IRQ_ADC_DONE, 8),161 REGMAP_IRQ_REG_LINE(RT9467_IRQ_PUMPX_DONE, 8),162 REGMAP_IRQ_REG_LINE(RT9467_IRQ_BST_BATUV, 8),163 REGMAP_IRQ_REG_LINE(RT9467_IRQ_BST_MIDOV, 8),164 REGMAP_IRQ_REG_LINE(RT9467_IRQ_BST_OLP, 8),165 REGMAP_IRQ_REG_LINE(RT9467_IRQ_ATTACH, 8),166 REGMAP_IRQ_REG_LINE(RT9467_IRQ_DETACH, 8),167 REGMAP_IRQ_REG_LINE(RT9467_IRQ_HVDCP_DET, 8),168 REGMAP_IRQ_REG_LINE(RT9467_IRQ_CHGDET, 8),169 REGMAP_IRQ_REG_LINE(RT9467_IRQ_DCDT, 8)170};171 172static const struct regmap_irq_chip rt9467_irq_chip = {173 .name = "rt9467-irqs",174 .status_base = RT9467_REG_CHG_IRQ1,175 .mask_base = RT9467_REG_CHG_IRQ1_CTRL,176 .num_regs = RT9467_NUM_IRQ_REGS,177 .irqs = rt9467_irqs,178 .num_irqs = ARRAY_SIZE(rt9467_irqs),179};180 181enum rt9467_ranges {182 RT9467_RANGE_IAICR = 0,183 RT9467_RANGE_VOREG,184 RT9467_RANGE_VMIVR,185 RT9467_RANGE_ICHG,186 RT9467_RANGE_IPREC,187 RT9467_RANGE_IEOC,188 RT9467_RANGE_AICL_VTH,189 RT9467_RANGES_MAX190};191 192static const struct linear_range rt9467_ranges[RT9467_RANGES_MAX] = {193 LINEAR_RANGE_IDX(RT9467_RANGE_IAICR, 100000, 0x0, 0x3F, 50000),194 LINEAR_RANGE_IDX(RT9467_RANGE_VOREG, 3900000, 0x0, 0x51, 10000),195 LINEAR_RANGE_IDX(RT9467_RANGE_VMIVR, 3900000, 0x0, 0x5F, 100000),196 LINEAR_RANGE_IDX(RT9467_RANGE_ICHG, 900000, 0x08, 0x31, 100000),197 LINEAR_RANGE_IDX(RT9467_RANGE_IPREC, 100000, 0x0, 0x0F, 50000),198 LINEAR_RANGE_IDX(RT9467_RANGE_IEOC, 100000, 0x0, 0x0F, 50000),199 LINEAR_RANGE_IDX(RT9467_RANGE_AICL_VTH, 4100000, 0x0, 0x7, 100000),200};201 202static const struct reg_field rt9467_chg_fields[] = {203 [F_RST] = REG_FIELD(RT9467_REG_CORE_CTRL0, 7, 7),204 [F_HZ] = REG_FIELD(RT9467_REG_CHG_CTRL1, 2, 2),205 [F_OTG_PIN_EN] = REG_FIELD(RT9467_REG_CHG_CTRL1, 1, 1),206 [F_OPA_MODE] = REG_FIELD(RT9467_REG_CHG_CTRL1, 0, 0),207 [F_SHIP_MODE] = REG_FIELD(RT9467_REG_CHG_CTRL2, 7, 7),208 [F_TE] = REG_FIELD(RT9467_REG_CHG_CTRL2, 4, 4),209 [F_IINLMTSEL] = REG_FIELD(RT9467_REG_CHG_CTRL2, 2, 3),210 [F_CFO_EN] = REG_FIELD(RT9467_REG_CHG_CTRL2, 1, 1),211 [F_CHG_EN] = REG_FIELD(RT9467_REG_CHG_CTRL2, 0, 0),212 [F_IAICR] = REG_FIELD(RT9467_REG_CHG_CTRL3, 2, 7),213 [F_ILIM_EN] = REG_FIELD(RT9467_REG_CHG_CTRL3, 0, 0),214 [F_VOREG] = REG_FIELD(RT9467_REG_CHG_CTRL4, 1, 7),215 [F_VMIVR] = REG_FIELD(RT9467_REG_CHG_CTRL6, 1, 7),216 [F_ICHG] = REG_FIELD(RT9467_REG_CHG_CTRL7, 2, 7),217 [F_IPREC] = REG_FIELD(RT9467_REG_CHG_CTRL8, 0, 3),218 [F_IEOC] = REG_FIELD(RT9467_REG_CHG_CTRL9, 4, 7),219 [F_WT_FC] = REG_FIELD(RT9467_REG_CHG_CTRL12, 5, 7),220 [F_OCP] = REG_FIELD(RT9467_REG_CHG_CTRL13, 2, 2),221 [F_AICL_MEAS] = REG_FIELD(RT9467_REG_CHG_CTRL14, 7, 7),222 [F_AICL_VTH] = REG_FIELD(RT9467_REG_CHG_CTRL14, 0, 2),223 [F_USBCHGEN] = REG_FIELD(RT9467_REG_CHG_DPDM1, 7, 7),224 [F_USB_STATUS] = REG_FIELD(RT9467_REG_CHG_DPDM2, 0, 2),225 [F_VENDOR] = REG_FIELD(RT9467_REG_DEVICE_ID, 4, 7),226 [F_CHG_STAT] = REG_FIELD(RT9467_REG_CHG_STAT, 6, 7),227 [F_PWR_RDY] = REG_FIELD(RT9467_REG_CHG_STATC, 7, 7),228 [F_CHG_MIVR] = REG_FIELD(RT9467_REG_CHG_STATC, 6, 6),229};230 231enum {232 RT9467_STAT_READY = 0,233 RT9467_STAT_PROGRESS,234 RT9467_STAT_CHARGE_DONE,235 RT9467_STAT_FAULT236};237 238enum rt9467_adc_chan {239 RT9467_ADC_VBUS_DIV5 = 0,240 RT9467_ADC_VBUS_DIV2,241 RT9467_ADC_VSYS,242 RT9467_ADC_VBAT,243 RT9467_ADC_TS_BAT,244 RT9467_ADC_IBUS,245 RT9467_ADC_IBAT,246 RT9467_ADC_REGN,247 RT9467_ADC_TEMP_JC248};249 250enum rt9467_chg_type {251 RT9467_CHG_TYPE_NOVBUS = 0,252 RT9467_CHG_TYPE_UNDER_GOING,253 RT9467_CHG_TYPE_SDP,254 RT9467_CHG_TYPE_SDPNSTD,255 RT9467_CHG_TYPE_DCP,256 RT9467_CHG_TYPE_CDP,257 RT9467_CHG_TYPE_MAX258};259 260enum rt9467_iin_limit_sel {261 RT9467_IINLMTSEL_3_2A = 0,262 RT9467_IINLMTSEL_CHG_TYP,263 RT9467_IINLMTSEL_AICR,264 RT9467_IINLMTSEL_LOWER_LEVEL, /* lower of above three */265};266 267struct rt9467_chg_data {268 struct device *dev;269 struct regmap *regmap;270 struct regmap_field *rm_field[F_MAX_FIELDS];271 struct regmap_irq_chip_data *irq_chip_data;272 struct power_supply *psy;273 struct mutex adc_lock;274 struct mutex attach_lock;275 struct mutex ichg_ieoc_lock;276 struct regulator_dev *rdev;277 struct completion aicl_done;278 enum power_supply_usb_type psy_usb_type;279 unsigned int old_stat;280 unsigned int vid;281 int ichg_ua;282 int ieoc_ua;283};284 285static int rt9467_otg_of_parse_cb(struct device_node *of,286 const struct regulator_desc *desc,287 struct regulator_config *cfg)288{289 struct rt9467_chg_data *data = cfg->driver_data;290 291 cfg->ena_gpiod = fwnode_gpiod_get_index(of_fwnode_handle(of),292 "enable", 0, GPIOD_OUT_LOW |293 GPIOD_FLAGS_BIT_NONEXCLUSIVE,294 desc->name);295 if (IS_ERR(cfg->ena_gpiod)) {296 cfg->ena_gpiod = NULL;297 return 0;298 }299 300 return regmap_field_write(data->rm_field[F_OTG_PIN_EN], 1);301}302 303static const struct regulator_ops rt9467_otg_regulator_ops = {304 .enable = regulator_enable_regmap,305 .disable = regulator_disable_regmap,306 .is_enabled = regulator_is_enabled_regmap,307 .list_voltage = regulator_list_voltage_linear,308 .set_voltage_sel = regulator_set_voltage_sel_regmap,309 .get_voltage_sel = regulator_get_voltage_sel_regmap,310 .set_current_limit = regulator_set_current_limit_regmap,311 .get_current_limit = regulator_get_current_limit_regmap,312};313 314static const u32 rt9467_otg_microamp[] = {315 500000, 700000, 1100000, 1300000, 1800000, 2100000, 2400000, 3000000316};317 318static const struct regulator_desc rt9467_otg_desc = {319 .name = "rt9476-usb-otg-vbus",320 .of_match = "usb-otg-vbus-regulator",321 .of_parse_cb = rt9467_otg_of_parse_cb,322 .type = REGULATOR_VOLTAGE,323 .owner = THIS_MODULE,324 .min_uV = RT9467_OTG_MIN_uV,325 .uV_step = RT9467_OTG_STEP_uV,326 .n_voltages = RT9467_NUM_VOTG,327 .curr_table = rt9467_otg_microamp,328 .n_current_limits = ARRAY_SIZE(rt9467_otg_microamp),329 .csel_reg = RT9467_REG_CHG_CTRL10,330 .csel_mask = RT9467_MASK_OTG_CSEL,331 .vsel_reg = RT9467_REG_CHG_CTRL5,332 .vsel_mask = RT9467_MASK_OTG_VSEL,333 .enable_reg = RT9467_REG_CHG_CTRL1,334 .enable_mask = RT9467_MASK_OTG_EN,335 .ops = &rt9467_otg_regulator_ops,336};337 338static int rt9467_register_otg_regulator(struct rt9467_chg_data *data)339{340 struct regulator_config cfg = {341 .dev = data->dev,342 .regmap = data->regmap,343 .driver_data = data,344 };345 346 data->rdev = devm_regulator_register(data->dev, &rt9467_otg_desc, &cfg);347 return PTR_ERR_OR_ZERO(data->rdev);348}349 350static int rt9467_get_value_from_ranges(struct rt9467_chg_data *data,351 enum rt9467_fields field,352 enum rt9467_ranges rsel,353 int *value)354{355 const struct linear_range *range = rt9467_ranges + rsel;356 unsigned int sel;357 int ret;358 359 ret = regmap_field_read(data->rm_field[field], &sel);360 if (ret)361 return ret;362 363 return linear_range_get_value(range, sel, value);364}365 366static int rt9467_set_value_from_ranges(struct rt9467_chg_data *data,367 enum rt9467_fields field,368 enum rt9467_ranges rsel,369 int value)370{371 const struct linear_range *range = rt9467_ranges + rsel;372 unsigned int sel;373 bool found;374 int ret;375 376 if (rsel == RT9467_RANGE_VMIVR) {377 ret = linear_range_get_selector_high(range, value, &sel, &found);378 if (ret)379 value = range->max_sel;380 } else {381 linear_range_get_selector_within(range, value, &sel);382 }383 384 return regmap_field_write(data->rm_field[field], sel);385}386 387static int rt9467_get_adc_sel(enum rt9467_adc_chan chan, int *sel)388{389 switch (chan) {390 case RT9467_ADC_VBUS_DIV5:391 case RT9467_ADC_VBUS_DIV2:392 case RT9467_ADC_VSYS:393 case RT9467_ADC_VBAT:394 *sel = chan + 1;395 return 0;396 case RT9467_ADC_TS_BAT:397 *sel = chan + 2;398 return 0;399 case RT9467_ADC_IBUS:400 case RT9467_ADC_IBAT:401 *sel = chan + 3;402 return 0;403 case RT9467_ADC_REGN:404 case RT9467_ADC_TEMP_JC:405 *sel = chan + 4;406 return 0;407 default:408 return -EINVAL;409 }410}411 412static int rt9467_get_adc_raw_data(struct rt9467_chg_data *data,413 enum rt9467_adc_chan chan, int *val)414{415 unsigned int adc_stat, reg_val, adc_sel;416 __be16 chan_raw_data;417 int ret;418 419 mutex_lock(&data->adc_lock);420 421 ret = rt9467_get_adc_sel(chan, &adc_sel);422 if (ret)423 goto adc_unlock;424 425 ret = regmap_write(data->regmap, RT9467_REG_CHG_ADC, 0);426 if (ret) {427 dev_err(data->dev, "Failed to clear ADC enable\n");428 goto adc_unlock;429 }430 431 reg_val = RT9467_MASK_ADC_START | FIELD_PREP(RT9467_MASK_ADC_IN_SEL, adc_sel);432 ret = regmap_write(data->regmap, RT9467_REG_CHG_ADC, reg_val);433 if (ret)434 goto adc_unlock;435 436 /* Minimum wait time for one channel processing */437 msleep(RT9467_ADCCONV_TIME_MS);438 439 ret = regmap_read_poll_timeout(data->regmap, RT9467_REG_CHG_ADC,440 adc_stat,441 !(adc_stat & RT9467_MASK_ADC_START),442 MILLI, RT9467_ADCCONV_TIME_MS * MILLI);443 if (ret) {444 dev_err(data->dev, "Failed to wait ADC conversion, chan = %d\n", chan);445 goto adc_unlock;446 }447 448 ret = regmap_raw_read(data->regmap, RT9467_REG_ADC_DATA_H,449 &chan_raw_data, sizeof(chan_raw_data));450 if (ret)451 goto adc_unlock;452 453 *val = be16_to_cpu(chan_raw_data);454 455adc_unlock:456 mutex_unlock(&data->adc_lock);457 return ret;458}459 460static int rt9467_get_adc(struct rt9467_chg_data *data,461 enum rt9467_adc_chan chan, int *val)462{463 unsigned int aicr_ua, ichg_ua;464 int ret;465 466 ret = rt9467_get_adc_raw_data(data, chan, val);467 if (ret)468 return ret;469 470 switch (chan) {471 case RT9467_ADC_VBUS_DIV5:472 *val *= 25000;473 return 0;474 case RT9467_ADC_VBUS_DIV2:475 *val *= 10000;476 return 0;477 case RT9467_ADC_VBAT:478 case RT9467_ADC_VSYS:479 case RT9467_ADC_REGN:480 *val *= 5000;481 return 0;482 case RT9467_ADC_TS_BAT:483 *val /= 400;484 return 0;485 case RT9467_ADC_IBUS:486 /* UUG MOS turn-on ratio will affect the IBUS adc scale */487 ret = rt9467_get_value_from_ranges(data, F_IAICR,488 RT9467_RANGE_IAICR, &aicr_ua);489 if (ret)490 return ret;491 492 *val *= aicr_ua < 400000 ? 29480 : 50000;493 return 0;494 case RT9467_ADC_IBAT:495 /* PP MOS turn-on ratio will affect the ICHG adc scale */496 ret = rt9467_get_value_from_ranges(data, F_ICHG,497 RT9467_RANGE_ICHG, &ichg_ua);498 if (ret)499 return ret;500 501 *val *= ichg_ua <= 400000 ? 28500 :502 ichg_ua <= 800000 ? 31500 : 500000;503 return 0;504 case RT9467_ADC_TEMP_JC:505 *val = ((*val * 2) - 40) * 10;506 return 0;507 default:508 return -EINVAL;509 }510}511 512static int rt9467_psy_get_status(struct rt9467_chg_data *data, int *state)513{514 unsigned int status;515 int ret;516 517 ret = regmap_field_read(data->rm_field[F_CHG_STAT], &status);518 if (ret)519 return ret;520 521 switch (status) {522 case RT9467_STAT_READY:523 *state = POWER_SUPPLY_STATUS_NOT_CHARGING;524 return 0;525 case RT9467_STAT_PROGRESS:526 *state = POWER_SUPPLY_STATUS_CHARGING;527 return 0;528 case RT9467_STAT_CHARGE_DONE:529 *state = POWER_SUPPLY_STATUS_FULL;530 return 0;531 default:532 *state = POWER_SUPPLY_STATUS_UNKNOWN;533 return 0;534 }535}536 537static int rt9467_psy_set_ichg(struct rt9467_chg_data *data, int microamp)538{539 int ret;540 541 mutex_lock(&data->ichg_ieoc_lock);542 543 if (microamp < 500000) {544 dev_err(data->dev, "Minimum value must be 500mA\n");545 microamp = 500000;546 }547 548 ret = rt9467_set_value_from_ranges(data, F_ICHG, RT9467_RANGE_ICHG, microamp);549 if (ret)550 goto out;551 552 ret = rt9467_get_value_from_ranges(data, F_ICHG, RT9467_RANGE_ICHG,553 &data->ichg_ua);554 if (ret)555 goto out;556 557out:558 mutex_unlock(&data->ichg_ieoc_lock);559 return ret;560}561 562static int rt9467_run_aicl(struct rt9467_chg_data *data)563{564 unsigned int statc, aicl_vth;565 int mivr_vth, aicr_get;566 int ret = 0;567 568 569 ret = regmap_read(data->regmap, RT9467_REG_CHG_STATC, &statc);570 if (ret) {571 dev_err(data->dev, "Failed to read status\n");572 return ret;573 }574 575 if (!(statc & RT9467_MASK_PWR_RDY) || !(statc & RT9467_MASK_MIVR_STAT)) {576 dev_info(data->dev, "Condition not matched %d\n", statc);577 return 0;578 }579 580 ret = rt9467_get_value_from_ranges(data, F_VMIVR, RT9467_RANGE_VMIVR,581 &mivr_vth);582 if (ret) {583 dev_err(data->dev, "Failed to get mivr\n");584 return ret;585 }586 587 /* AICL_VTH = MIVR_VTH + 200mV */588 aicl_vth = mivr_vth + RT9467_AICLVTH_GAP_uV;589 ret = rt9467_set_value_from_ranges(data, F_AICL_VTH,590 RT9467_RANGE_AICL_VTH, aicl_vth);591 592 /* Trigger AICL function */593 ret = regmap_field_write(data->rm_field[F_AICL_MEAS], 1);594 if (ret) {595 dev_err(data->dev, "Failed to set aicl measurement\n");596 return ret;597 }598 599 reinit_completion(&data->aicl_done);600 ret = wait_for_completion_timeout(&data->aicl_done, msecs_to_jiffies(3500));601 if (ret == 0)602 return -ETIMEDOUT;603 604 ret = rt9467_get_value_from_ranges(data, F_IAICR, RT9467_RANGE_IAICR, &aicr_get);605 if (ret) {606 dev_err(data->dev, "Failed to get aicr\n");607 return ret;608 }609 610 dev_info(data->dev, "aicr get = %d uA\n", aicr_get);611 return 0;612}613 614static int rt9467_psy_set_ieoc(struct rt9467_chg_data *data, int microamp)615{616 int ret;617 618 mutex_lock(&data->ichg_ieoc_lock);619 620 ret = rt9467_set_value_from_ranges(data, F_IEOC, RT9467_RANGE_IEOC, microamp);621 if (ret)622 goto out;623 624 ret = rt9467_get_value_from_ranges(data, F_IEOC, RT9467_RANGE_IEOC, &data->ieoc_ua);625 if (ret)626 goto out;627 628out:629 mutex_unlock(&data->ichg_ieoc_lock);630 return ret;631}632 633static const enum power_supply_property rt9467_chg_properties[] = {634 POWER_SUPPLY_PROP_STATUS,635 POWER_SUPPLY_PROP_ONLINE,636 POWER_SUPPLY_PROP_CURRENT_MAX,637 POWER_SUPPLY_PROP_CONSTANT_CHARGE_CURRENT,638 POWER_SUPPLY_PROP_CONSTANT_CHARGE_CURRENT_MAX,639 POWER_SUPPLY_PROP_CONSTANT_CHARGE_VOLTAGE,640 POWER_SUPPLY_PROP_CONSTANT_CHARGE_VOLTAGE_MAX,641 POWER_SUPPLY_PROP_INPUT_CURRENT_LIMIT,642 POWER_SUPPLY_PROP_INPUT_VOLTAGE_LIMIT,643 POWER_SUPPLY_PROP_USB_TYPE,644 POWER_SUPPLY_PROP_PRECHARGE_CURRENT,645 POWER_SUPPLY_PROP_CHARGE_TERM_CURRENT,646};647 648static int rt9467_psy_get_property(struct power_supply *psy,649 enum power_supply_property psp,650 union power_supply_propval *val)651{652 struct rt9467_chg_data *data = power_supply_get_drvdata(psy);653 654 switch (psp) {655 case POWER_SUPPLY_PROP_STATUS:656 return rt9467_psy_get_status(data, &val->intval);657 case POWER_SUPPLY_PROP_ONLINE:658 return regmap_field_read(data->rm_field[F_PWR_RDY], &val->intval);659 case POWER_SUPPLY_PROP_CURRENT_MAX:660 mutex_lock(&data->attach_lock);661 if (data->psy_usb_type == POWER_SUPPLY_USB_TYPE_UNKNOWN ||662 data->psy_usb_type == POWER_SUPPLY_USB_TYPE_SDP)663 val->intval = 500000;664 else665 val->intval = 1500000;666 mutex_unlock(&data->attach_lock);667 return 0;668 case POWER_SUPPLY_PROP_CONSTANT_CHARGE_CURRENT:669 mutex_lock(&data->ichg_ieoc_lock);670 val->intval = data->ichg_ua;671 mutex_unlock(&data->ichg_ieoc_lock);672 return 0;673 case POWER_SUPPLY_PROP_CONSTANT_CHARGE_CURRENT_MAX:674 val->intval = RT9467_ICHG_MAX_uA;675 return 0;676 case POWER_SUPPLY_PROP_CONSTANT_CHARGE_VOLTAGE:677 return rt9467_get_value_from_ranges(data, F_VOREG,678 RT9467_RANGE_VOREG,679 &val->intval);680 case POWER_SUPPLY_PROP_CONSTANT_CHARGE_VOLTAGE_MAX:681 val->intval = RT9467_CV_MAX_uV;682 return 0;683 case POWER_SUPPLY_PROP_INPUT_CURRENT_LIMIT:684 return rt9467_get_value_from_ranges(data, F_IAICR,685 RT9467_RANGE_IAICR,686 &val->intval);687 case POWER_SUPPLY_PROP_INPUT_VOLTAGE_LIMIT:688 return rt9467_get_value_from_ranges(data, F_VMIVR,689 RT9467_RANGE_VMIVR,690 &val->intval);691 case POWER_SUPPLY_PROP_USB_TYPE:692 mutex_lock(&data->attach_lock);693 val->intval = data->psy_usb_type;694 mutex_unlock(&data->attach_lock);695 return 0;696 case POWER_SUPPLY_PROP_PRECHARGE_CURRENT:697 return rt9467_get_value_from_ranges(data, F_IPREC,698 RT9467_RANGE_IPREC,699 &val->intval);700 case POWER_SUPPLY_PROP_CHARGE_TERM_CURRENT:701 mutex_lock(&data->ichg_ieoc_lock);702 val->intval = data->ieoc_ua;703 mutex_unlock(&data->ichg_ieoc_lock);704 return 0;705 default:706 return -ENODATA;707 }708}709 710static int rt9467_psy_set_property(struct power_supply *psy,711 enum power_supply_property psp,712 const union power_supply_propval *val)713{714 struct rt9467_chg_data *data = power_supply_get_drvdata(psy);715 716 switch (psp) {717 case POWER_SUPPLY_PROP_STATUS:718 return regmap_field_write(data->rm_field[F_CHG_EN], val->intval);719 case POWER_SUPPLY_PROP_ONLINE:720 return regmap_field_write(data->rm_field[F_HZ], val->intval);721 case POWER_SUPPLY_PROP_CONSTANT_CHARGE_CURRENT:722 return rt9467_psy_set_ichg(data, val->intval);723 case POWER_SUPPLY_PROP_CONSTANT_CHARGE_VOLTAGE:724 return rt9467_set_value_from_ranges(data, F_VOREG,725 RT9467_RANGE_VOREG, val->intval);726 case POWER_SUPPLY_PROP_INPUT_CURRENT_LIMIT:727 if (val->intval == -1)728 return rt9467_run_aicl(data);729 else730 return rt9467_set_value_from_ranges(data, F_IAICR,731 RT9467_RANGE_IAICR,732 val->intval);733 case POWER_SUPPLY_PROP_INPUT_VOLTAGE_LIMIT:734 return rt9467_set_value_from_ranges(data, F_VMIVR,735 RT9467_RANGE_VMIVR, val->intval);736 case POWER_SUPPLY_PROP_PRECHARGE_CURRENT:737 return rt9467_set_value_from_ranges(data, F_IPREC,738 RT9467_RANGE_IPREC, val->intval);739 case POWER_SUPPLY_PROP_CHARGE_TERM_CURRENT:740 return rt9467_psy_set_ieoc(data, val->intval);741 default:742 return -EINVAL;743 }744}745 746static int rt9467_chg_prop_is_writeable(struct power_supply *psy,747 enum power_supply_property psp)748{749 switch (psp) {750 case POWER_SUPPLY_PROP_STATUS:751 case POWER_SUPPLY_PROP_ONLINE:752 case POWER_SUPPLY_PROP_CONSTANT_CHARGE_CURRENT:753 case POWER_SUPPLY_PROP_CONSTANT_CHARGE_VOLTAGE:754 case POWER_SUPPLY_PROP_INPUT_CURRENT_LIMIT:755 case POWER_SUPPLY_PROP_INPUT_VOLTAGE_LIMIT:756 case POWER_SUPPLY_PROP_CHARGE_TERM_CURRENT:757 case POWER_SUPPLY_PROP_PRECHARGE_CURRENT:758 return 1;759 default:760 return 0;761 }762}763 764static const struct power_supply_desc rt9467_chg_psy_desc = {765 .name = "rt9467-charger",766 .type = POWER_SUPPLY_TYPE_USB,767 .usb_types = BIT(POWER_SUPPLY_USB_TYPE_SDP) |768 BIT(POWER_SUPPLY_USB_TYPE_CDP) |769 BIT(POWER_SUPPLY_USB_TYPE_DCP) |770 BIT(POWER_SUPPLY_USB_TYPE_UNKNOWN),771 .properties = rt9467_chg_properties,772 .num_properties = ARRAY_SIZE(rt9467_chg_properties),773 .property_is_writeable = rt9467_chg_prop_is_writeable,774 .get_property = rt9467_psy_get_property,775 .set_property = rt9467_psy_set_property,776};777 778static inline struct rt9467_chg_data *psy_device_to_chip(struct device *dev)779{780 return power_supply_get_drvdata(to_power_supply(dev));781}782 783static ssize_t sysoff_enable_show(struct device *dev,784 struct device_attribute *attr, char *buf)785{786 struct rt9467_chg_data *data = psy_device_to_chip(dev);787 unsigned int sysoff_enable;788 int ret;789 790 ret = regmap_field_read(data->rm_field[F_SHIP_MODE], &sysoff_enable);791 if (ret)792 return ret;793 794 return sysfs_emit(buf, "%d\n", sysoff_enable);795}796 797static ssize_t sysoff_enable_store(struct device *dev,798 struct device_attribute *attr,799 const char *buf, size_t count)800{801 struct rt9467_chg_data *data = psy_device_to_chip(dev);802 unsigned int tmp;803 int ret;804 805 ret = kstrtouint(buf, 10, &tmp);806 if (ret)807 return ret;808 809 ret = regmap_field_write(data->rm_field[F_SHIP_MODE], !!tmp);810 if (ret)811 return ret;812 813 return count;814}815 816static DEVICE_ATTR_RW(sysoff_enable);817 818static struct attribute *rt9467_sysfs_attrs[] = {819 &dev_attr_sysoff_enable.attr,820 NULL821};822 823ATTRIBUTE_GROUPS(rt9467_sysfs);824 825static int rt9467_register_psy(struct rt9467_chg_data *data)826{827 struct power_supply_config cfg = {828 .drv_data = data,829 .of_node = dev_of_node(data->dev),830 .attr_grp = rt9467_sysfs_groups,831 };832 833 data->psy = devm_power_supply_register(data->dev, &rt9467_chg_psy_desc,834 &cfg);835 return PTR_ERR_OR_ZERO(data->psy);836}837 838static int rt9467_mivr_handler(struct rt9467_chg_data *data)839{840 unsigned int mivr_act;841 int ret, ibus_ma;842 843 /*844 * back-boost workaround845 * If (mivr_active & ibus < 100mA), toggle cfo bit846 */847 ret = regmap_field_read(data->rm_field[F_CHG_MIVR], &mivr_act);848 if (ret) {849 dev_err(data->dev, "Failed to read MIVR stat\n");850 return ret;851 }852 853 if (!mivr_act)854 return 0;855 856 ret = rt9467_get_adc(data, RT9467_ADC_IBUS, &ibus_ma);857 if (ret) {858 dev_err(data->dev, "Failed to get IBUS\n");859 return ret;860 }861 862 if (ibus_ma < 100000) {863 ret = regmap_field_write(data->rm_field[F_CFO_EN], 0);864 ret |= regmap_field_write(data->rm_field[F_CFO_EN], 1);865 if (ret)866 dev_err(data->dev, "Failed to toggle cfo\n");867 }868 869 return ret;870}871 872static irqreturn_t rt9467_statc_handler(int irq, void *priv)873{874 struct rt9467_chg_data *data = priv;875 unsigned int new_stat, evts = 0;876 int ret;877 878 ret = regmap_read(data->regmap, RT9467_REG_CHG_STATC, &new_stat);879 if (ret) {880 dev_err(data->dev, "Failed to read chg_statc\n");881 return IRQ_NONE;882 }883 884 evts = data->old_stat ^ new_stat;885 data->old_stat = new_stat;886 887 if ((evts & new_stat) & RT9467_MASK_MIVR_STAT) {888 ret = rt9467_mivr_handler(data);889 if (ret)890 dev_err(data->dev, "Failed to handle mivr stat\n");891 }892 893 return IRQ_HANDLED;894}895 896static irqreturn_t rt9467_wdt_handler(int irq, void *priv)897{898 struct rt9467_chg_data *data = priv;899 unsigned int dev_id;900 int ret;901 902 /* Any i2c communication can kick watchdog timer */903 ret = regmap_read(data->regmap, RT9467_REG_DEVICE_ID, &dev_id);904 if (ret) {905 dev_err(data->dev, "Failed to kick wdt (%d)\n", ret);906 return IRQ_NONE;907 }908 909 return IRQ_HANDLED;910}911 912static int rt9467_report_usb_state(struct rt9467_chg_data *data)913{914 unsigned int usb_stat, power_ready;915 bool psy_changed = true;916 int ret;917 918 ret = regmap_field_read(data->rm_field[F_USB_STATUS], &usb_stat);919 ret |= regmap_field_read(data->rm_field[F_PWR_RDY], &power_ready);920 if (ret)921 return ret;922 923 if (!power_ready)924 usb_stat = RT9467_CHG_TYPE_NOVBUS;925 926 mutex_lock(&data->attach_lock);927 928 switch (usb_stat) {929 case RT9467_CHG_TYPE_NOVBUS:930 data->psy_usb_type = POWER_SUPPLY_USB_TYPE_UNKNOWN;931 break;932 case RT9467_CHG_TYPE_SDP:933 data->psy_usb_type = POWER_SUPPLY_USB_TYPE_SDP;934 break;935 case RT9467_CHG_TYPE_SDPNSTD:936 data->psy_usb_type = POWER_SUPPLY_USB_TYPE_DCP;937 break;938 case RT9467_CHG_TYPE_DCP:939 data->psy_usb_type = POWER_SUPPLY_USB_TYPE_DCP;940 break;941 case RT9467_CHG_TYPE_CDP:942 data->psy_usb_type = POWER_SUPPLY_USB_TYPE_CDP;943 break;944 case RT9467_CHG_TYPE_UNDER_GOING:945 default:946 psy_changed = false;947 break;948 }949 950 mutex_unlock(&data->attach_lock);951 952 if (psy_changed)953 power_supply_changed(data->psy);954 955 return 0;956}957 958static irqreturn_t rt9467_usb_state_handler(int irq, void *priv)959{960 struct rt9467_chg_data *data = priv;961 int ret;962 963 ret = rt9467_report_usb_state(data);964 if (ret) {965 dev_err(data->dev, "Failed to report attach type (%d)\n", ret);966 return IRQ_NONE;967 }968 969 return IRQ_HANDLED;970}971 972static irqreturn_t rt9467_aiclmeas_handler(int irq, void *priv)973{974 struct rt9467_chg_data *data = priv;975 976 complete(&data->aicl_done);977 return IRQ_HANDLED;978}979 980#define RT9467_IRQ_DESC(_name, _handler_func, _hwirq) \981{ \982 .name = #_name, \983 .handler = rt9467_##_handler_func##_handler, \984 .hwirq = _hwirq, \985}986 987static int rt9467_request_interrupt(struct rt9467_chg_data *data)988{989 struct device *dev = data->dev;990 static const struct {991 const char *name;992 int hwirq;993 irq_handler_t handler;994 } rt9467_exclusive_irqs[] = {995 RT9467_IRQ_DESC(statc, statc, RT9467_IRQ_TS_STATC),996 RT9467_IRQ_DESC(wdt, wdt, RT9467_IRQ_WDTMR),997 RT9467_IRQ_DESC(attach, usb_state, RT9467_IRQ_ATTACH),998 RT9467_IRQ_DESC(detach, usb_state, RT9467_IRQ_DETACH),999 RT9467_IRQ_DESC(aiclmeas, aiclmeas, RT9467_IRQ_CHG_AICLM),1000 }, rt9466_exclusive_irqs[] = {1001 RT9467_IRQ_DESC(statc, statc, RT9467_IRQ_TS_STATC),1002 RT9467_IRQ_DESC(wdt, wdt, RT9467_IRQ_WDTMR),1003 RT9467_IRQ_DESC(aiclmeas, aiclmeas, RT9467_IRQ_CHG_AICLM),1004 }, *chg_irqs;1005 int num_chg_irqs, i, virq, ret;1006 1007 if (data->vid == RT9466_VID) {1008 chg_irqs = rt9466_exclusive_irqs;1009 num_chg_irqs = ARRAY_SIZE(rt9466_exclusive_irqs);1010 } else {1011 chg_irqs = rt9467_exclusive_irqs;1012 num_chg_irqs = ARRAY_SIZE(rt9467_exclusive_irqs);1013 }1014 1015 for (i = 0; i < num_chg_irqs; i++) {1016 virq = regmap_irq_get_virq(data->irq_chip_data, chg_irqs[i].hwirq);1017 if (virq <= 0)1018 return dev_err_probe(dev, -EINVAL, "Failed to get (%s) irq\n",1019 chg_irqs[i].name);1020 1021 ret = devm_request_threaded_irq(dev, virq, NULL, chg_irqs[i].handler,1022 IRQF_ONESHOT, chg_irqs[i].name, data);1023 if (ret)1024 return dev_err_probe(dev, ret, "Failed to request (%s) irq\n",1025 chg_irqs[i].name);1026 }1027 1028 return 0;1029}1030 1031static int rt9467_do_charger_init(struct rt9467_chg_data *data)1032{1033 struct device *dev = data->dev;1034 int ret;1035 1036 ret = regmap_write(data->regmap, RT9467_REG_CHG_ADC, 0);1037 if (ret)1038 return dev_err_probe(dev, ret, "Failed to reset ADC\n");1039 1040 ret = rt9467_get_value_from_ranges(data, F_ICHG, RT9467_RANGE_ICHG,1041 &data->ichg_ua);1042 ret |= rt9467_get_value_from_ranges(data, F_IEOC, RT9467_RANGE_IEOC,1043 &data->ieoc_ua);1044 if (ret)1045 return dev_err_probe(dev, ret, "Failed to init ichg/ieoc value\n");1046 1047 ret = regmap_update_bits(data->regmap, RT9467_REG_CHG_STATC_CTRL,1048 RT9467_MASK_PWR_RDY | RT9467_MASK_MIVR_STAT, 0);1049 if (ret)1050 return dev_err_probe(dev, ret, "Failed to make statc unmask\n");1051 1052 /* Select IINLMTSEL to use AICR */1053 ret = regmap_field_write(data->rm_field[F_IINLMTSEL],1054 RT9467_IINLMTSEL_AICR);1055 if (ret)1056 return dev_err_probe(dev, ret, "Failed to set iinlmtsel to AICR\n");1057 1058 /* Wait for AICR Rampping */1059 msleep(150);1060 1061 /* Disable hardware ILIM */1062 ret = regmap_field_write(data->rm_field[F_ILIM_EN], 0);1063 if (ret)1064 return dev_err_probe(dev, ret, "Failed to disable hardware ILIM\n");1065 1066 /* Set inductor OCP to high level */1067 ret = regmap_field_write(data->rm_field[F_OCP], 1);1068 if (ret)1069 return dev_err_probe(dev, ret, "Failed to set higher inductor OCP level\n");1070 1071 /* Set charge termination default enable */1072 ret = regmap_field_write(data->rm_field[F_TE], 1);1073 if (ret)1074 return dev_err_probe(dev, ret, "Failed to set TE=1\n");1075 1076 /* Set 12hrs fast charger timer */1077 ret = regmap_field_write(data->rm_field[F_WT_FC], 4);1078 if (ret)1079 return dev_err_probe(dev, ret, "Failed to set WT_FC\n");1080 1081 /* Toggle BC12 function */1082 ret = regmap_field_write(data->rm_field[F_USBCHGEN], 0);1083 if (ret)1084 return dev_err_probe(dev, ret, "Failed to disable BC12\n");1085 1086 return regmap_field_write(data->rm_field[F_USBCHGEN], 1);1087}1088 1089static bool rt9467_is_accessible_reg(struct device *dev, unsigned int reg)1090{1091 switch (reg) {1092 case 0x00 ... 0x1A:1093 case 0x20 ... 0x38:1094 case 0x40 ... 0x49:1095 case 0x50 ... 0x57:1096 case 0x60 ... 0x67:1097 case 0x70 ... 0x79:1098 case 0x82 ... 0x85:1099 return true;1100 default:1101 return false;1102 }1103}1104 1105static const struct regmap_config rt9467_regmap_config = {1106 .reg_bits = 8,1107 .val_bits = 8,1108 .max_register = 0x85,1109 .writeable_reg = rt9467_is_accessible_reg,1110 .readable_reg = rt9467_is_accessible_reg,1111};1112 1113static int rt9467_check_vendor_info(struct rt9467_chg_data *data)1114{1115 unsigned int vid;1116 int ret;1117 1118 ret = regmap_field_read(data->rm_field[F_VENDOR], &vid);1119 if (ret) {1120 dev_err(data->dev, "Failed to get vid\n");1121 return ret;1122 }1123 1124 if ((vid != RT9466_VID) && (vid != RT9467_VID))1125 return dev_err_probe(data->dev, -ENODEV,1126 "VID not correct [0x%02X]\n", vid);1127 1128 data->vid = vid;1129 return 0;1130}1131 1132static int rt9467_reset_chip(struct rt9467_chg_data *data)1133{1134 int ret;1135 1136 /* Disable HZ before reset chip */1137 ret = regmap_field_write(data->rm_field[F_HZ], 0);1138 if (ret)1139 return ret;1140 1141 return regmap_field_write(data->rm_field[F_RST], 1);1142}1143 1144static void rt9467_chg_destroy_adc_lock(void *data)1145{1146 struct mutex *adc_lock = data;1147 1148 mutex_destroy(adc_lock);1149}1150 1151static void rt9467_chg_destroy_attach_lock(void *data)1152{1153 struct mutex *attach_lock = data;1154 1155 mutex_destroy(attach_lock);1156}1157 1158static void rt9467_chg_destroy_ichg_ieoc_lock(void *data)1159{1160 struct mutex *ichg_ieoc_lock = data;1161 1162 mutex_destroy(ichg_ieoc_lock);1163}1164 1165static void rt9467_chg_complete_aicl_done(void *data)1166{1167 struct completion *aicl_done = data;1168 1169 complete(aicl_done);1170}1171 1172static int rt9467_charger_probe(struct i2c_client *i2c)1173{1174 struct device *dev = &i2c->dev;1175 struct rt9467_chg_data *data;1176 struct gpio_desc *ceb_gpio;1177 int ret;1178 1179 data = devm_kzalloc(dev, sizeof(*data), GFP_KERNEL);1180 if (!data)1181 return -ENOMEM;1182 1183 data->dev = &i2c->dev;1184 i2c_set_clientdata(i2c, data);1185 1186 /* Default pull charge enable gpio to make 'CHG_EN' by SW control only */1187 ceb_gpio = devm_gpiod_get_optional(dev, "charge-enable", GPIOD_OUT_HIGH);1188 if (IS_ERR(ceb_gpio))1189 return dev_err_probe(dev, PTR_ERR(ceb_gpio),1190 "Failed to config charge enable gpio\n");1191 1192 data->regmap = devm_regmap_init_i2c(i2c, &rt9467_regmap_config);1193 if (IS_ERR(data->regmap))1194 return dev_err_probe(dev, PTR_ERR(data->regmap),1195 "Failed to init regmap\n");1196 1197 ret = devm_regmap_field_bulk_alloc(dev, data->regmap,1198 data->rm_field, rt9467_chg_fields,1199 ARRAY_SIZE(rt9467_chg_fields));1200 if (ret)1201 return dev_err_probe(dev, ret, "Failed to alloc regmap fields\n");1202 1203 ret = rt9467_check_vendor_info(data);1204 if (ret)1205 return dev_err_probe(dev, ret, "Failed to check vendor info");1206 1207 ret = rt9467_reset_chip(data);1208 if (ret)1209 return dev_err_probe(dev, ret, "Failed to reset chip\n");1210 1211 ret = devm_regmap_add_irq_chip(dev, data->regmap, i2c->irq,1212 IRQF_TRIGGER_LOW | IRQF_ONESHOT, 0,1213 &rt9467_irq_chip, &data->irq_chip_data);1214 if (ret)1215 return dev_err_probe(dev, ret, "Failed to add irq chip\n");1216 1217 mutex_init(&data->adc_lock);1218 ret = devm_add_action_or_reset(dev, rt9467_chg_destroy_adc_lock,1219 &data->adc_lock);1220 if (ret)1221 return dev_err_probe(dev, ret, "Failed to init ADC lock\n");1222 1223 mutex_init(&data->attach_lock);1224 ret = devm_add_action_or_reset(dev, rt9467_chg_destroy_attach_lock,1225 &data->attach_lock);1226 if (ret)1227 return dev_err_probe(dev, ret, "Failed to init attach lock\n");1228 1229 mutex_init(&data->ichg_ieoc_lock);1230 ret = devm_add_action_or_reset(dev, rt9467_chg_destroy_ichg_ieoc_lock,1231 &data->ichg_ieoc_lock);1232 if (ret)1233 return dev_err_probe(dev, ret, "Failed to init ICHG/IEOC lock\n");1234 1235 init_completion(&data->aicl_done);1236 ret = devm_add_action_or_reset(dev, rt9467_chg_complete_aicl_done,1237 &data->aicl_done);1238 if (ret)1239 return dev_err_probe(dev, ret, "Failed to init AICL done completion\n");1240 1241 ret = rt9467_do_charger_init(data);1242 if (ret)1243 return ret;1244 1245 ret = rt9467_register_otg_regulator(data);1246 if (ret)1247 return ret;1248 1249 ret = rt9467_register_psy(data);1250 if (ret)1251 return ret;1252 1253 return rt9467_request_interrupt(data);1254}1255 1256static const struct of_device_id rt9467_charger_of_match_table[] = {1257 { .compatible = "richtek,rt9467", },1258 {}1259};1260MODULE_DEVICE_TABLE(of, rt9467_charger_of_match_table);1261 1262static struct i2c_driver rt9467_charger_driver = {1263 .driver = {1264 .name = "rt9467-charger",1265 .of_match_table = rt9467_charger_of_match_table,1266 },1267 .probe = rt9467_charger_probe,1268};1269module_i2c_driver(rt9467_charger_driver);1270 1271MODULE_DESCRIPTION("Richtek RT9467 Charger Driver");1272MODULE_AUTHOR("ChiYuan Huang <cy_huang@richtek.com>");1273MODULE_AUTHOR("ChiaEn Wu <chiaen_wu@richtek.com>");1274MODULE_LICENSE("GPL");1275