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1/* SPDX-License-Identifier: GPL-2.0+ */2/*3 * DA9121 Single-channel dual-phase 10A buck converter4 * DA9130 Single-channel dual-phase 10A buck converter (Automotive)5 * DA9217 Single-channel dual-phase 6A buck converter6 * DA9122 Dual-channel single-phase 5A buck converter7 * DA9131 Dual-channel single-phase 5A buck converter (Automotive)8 * DA9220 Dual-channel single-phase 3A buck converter9 * DA9132 Dual-channel single-phase 3A buck converter (Automotive)10 *11 * Copyright (C) 2020 Dialog Semiconductor12 *13 * Authors: Steve Twiss, Dialog Semiconductor14 * Adam Ward, Dialog Semiconductor15 */16 17#ifndef __DA9121_REGISTERS_H__18#define __DA9121_REGISTERS_H__19 20/* Values for: DA9121_REG_BUCK_BUCKx_4 registers, fields CHx_y_MODE21 * DA9121_REG_BUCK_BUCKx_7 registers, fields CHx_RIPPLE_CANCEL22 */23#include <dt-bindings/regulator/dlg,da9121-regulator.h>24 25enum da9121_variant {26 DA9121_TYPE_DA9121_DA9130,27 DA9121_TYPE_DA9220_DA9132,28 DA9121_TYPE_DA9122_DA9131,29 DA9121_TYPE_DA9217,30 DA9121_TYPE_DA9141,31 DA9121_TYPE_DA914232};33 34enum da9121_subvariant {35 DA9121_SUBTYPE_DA9121,36 DA9121_SUBTYPE_DA9130,37 DA9121_SUBTYPE_DA9220,38 DA9121_SUBTYPE_DA9132,39 DA9121_SUBTYPE_DA9122,40 DA9121_SUBTYPE_DA9131,41 DA9121_SUBTYPE_DA9217,42 DA9121_SUBTYPE_DA9141,43 DA9121_SUBTYPE_DA914244};45 46/* Minimum, maximum and default polling millisecond periods are provided47 * here as an example. It is expected that any final implementation will48 * include a modification of these settings to match the required49 * application.50 */51#define DA9121_DEFAULT_POLLING_PERIOD_MS 300052#define DA9121_MAX_POLLING_PERIOD_MS 1000053#define DA9121_MIN_POLLING_PERIOD_MS 100054 55/* Registers */56 57#define DA9121_REG_SYS_STATUS_0 0x0158#define DA9121_REG_SYS_STATUS_1 0x0259#define DA9121_REG_SYS_STATUS_2 0x0360#define DA9121_REG_SYS_EVENT_0 0x0461#define DA9121_REG_SYS_EVENT_1 0x0562#define DA9121_REG_SYS_EVENT_2 0x0663#define DA9121_REG_SYS_MASK_0 0x0764#define DA9121_REG_SYS_MASK_1 0x0865#define DA9121_REG_SYS_MASK_2 0x0966#define DA9121_REG_SYS_MASK_3 0x0A67#define DA9121_REG_SYS_CONFIG_0 0x0B68#define DA9121_REG_SYS_CONFIG_1 0x0C69#define DA9121_REG_SYS_CONFIG_2 0x0D70#define DA9121_REG_SYS_CONFIG_3 0x0E71#define DA9121_REG_SYS_GPIO0_0 0x1072#define DA9121_REG_SYS_GPIO0_1 0x1173#define DA9121_REG_SYS_GPIO1_0 0x1274#define DA9121_REG_SYS_GPIO1_1 0x1375#define DA9121_REG_SYS_GPIO2_0 0x1476#define DA9121_REG_SYS_GPIO2_1 0x1577#define DA914x_REG_SYS_GPIO3_0 0x1678#define DA914x_REG_SYS_GPIO3_1 0x1779#define DA914x_REG_SYS_GPIO4_0 0x1880#define DA914x_REG_SYS_GPIO4_1 0x1981#define DA914x_REG_SYS_ADMUX1_0 0x1A82#define DA914x_REG_SYS_ADMUX1_1 0x1B83#define DA914x_REG_SYS_ADMUX2_0 0x1C84#define DA914x_REG_SYS_ADMUX2_1 0x1D85#define DA9121_REG_BUCK_BUCK1_0 0x2086#define DA9121_REG_BUCK_BUCK1_1 0x2187#define DA9121_REG_BUCK_BUCK1_2 0x2288#define DA9121_REG_BUCK_BUCK1_3 0x2389#define DA9121_REG_BUCK_BUCK1_4 0x2490#define DA9121_REG_BUCK_BUCK1_5 0x2591#define DA9121_REG_BUCK_BUCK1_6 0x2692#define DA9121_REG_BUCK_BUCK1_7 0x2793#define DA9xxx_REG_BUCK_BUCK2_0 0x2894#define DA9xxx_REG_BUCK_BUCK2_1 0x2995#define DA9xxx_REG_BUCK_BUCK2_2 0x2A96#define DA9xxx_REG_BUCK_BUCK2_3 0x2B97#define DA9xxx_REG_BUCK_BUCK2_4 0x2C98#define DA9xxx_REG_BUCK_BUCK2_5 0x2D99#define DA9xxx_REG_BUCK_BUCK2_6 0x2E100#define DA9xxx_REG_BUCK_BUCK2_7 0x2F101#define DA9121_REG_OTP_DEVICE_ID 0x48102#define DA9121_REG_OTP_VARIANT_ID 0x49103#define DA9121_REG_OTP_CUSTOMER_ID 0x4A104#define DA9121_REG_OTP_CONFIG_ID 0x4B105 106/* Register bits */107 108/* DA9121_REG_SYS_STATUS_0 */109 110#define DA9xxx_MASK_SYS_STATUS_0_SG BIT(2)111#define DA9121_MASK_SYS_STATUS_0_TEMP_CRIT BIT(1)112#define DA9121_MASK_SYS_STATUS_0_TEMP_WARN BIT(0)113 114/* DA9121_REG_SYS_STATUS_1 */115 116#define DA9xxx_MASK_SYS_STATUS_1_PG2 BIT(7)117#define DA9xxx_MASK_SYS_STATUS_1_OV2 BIT(6)118#define DA9xxx_MASK_SYS_STATUS_1_UV2 BIT(5)119#define DA9xxx_MASK_SYS_STATUS_1_OC2 BIT(4)120#define DA9121_MASK_SYS_STATUS_1_PG1 BIT(3)121#define DA9121_MASK_SYS_STATUS_1_OV1 BIT(2)122#define DA9121_MASK_SYS_STATUS_1_UV1 BIT(1)123#define DA9121_MASK_SYS_STATUS_1_OC1 BIT(0)124 125/* DA9121_REG_SYS_STATUS_2 */126 127#define DA9121_MASK_SYS_STATUS_2_GPIO2 BIT(2)128#define DA9121_MASK_SYS_STATUS_2_GPIO1 BIT(1)129#define DA9121_MASK_SYS_STATUS_2_GPIO0 BIT(0)130 131/* DA9121_REG_SYS_EVENT_0 */132 133#define DA9xxx_MASK_SYS_EVENT_0_E_SG BIT(2)134#define DA9121_MASK_SYS_EVENT_0_E_TEMP_CRIT BIT(1)135#define DA9121_MASK_SYS_EVENT_0_E_TEMP_WARN BIT(0)136 137/* DA9121_REG_SYS_EVENT_1 */138 139#define DA9xxx_MASK_SYS_EVENT_1_E_PG2 BIT(7)140#define DA9xxx_MASK_SYS_EVENT_1_E_OV2 BIT(6)141#define DA9xxx_MASK_SYS_EVENT_1_E_UV2 BIT(5)142#define DA9xxx_MASK_SYS_EVENT_1_E_OC2 BIT(4)143#define DA9121_MASK_SYS_EVENT_1_E_PG1 BIT(3)144#define DA9121_MASK_SYS_EVENT_1_E_OV1 BIT(2)145#define DA9121_MASK_SYS_EVENT_1_E_UV1 BIT(1)146#define DA9121_MASK_SYS_EVENT_1_E_OC1 BIT(0)147 148/* DA9121_REG_SYS_EVENT_2 */149 150#define DA9121_MASK_SYS_EVENT_2_E_GPIO2 BIT(2)151#define DA9121_MASK_SYS_EVENT_2_E_GPIO1 BIT(1)152#define DA9121_MASK_SYS_EVENT_2_E_GPIO0 BIT(0)153 154/* DA9121_REG_SYS_MASK_0 */155 156#define DA9xxx_MASK_SYS_MASK_0_M_SG BIT(2)157#define DA9121_MASK_SYS_MASK_0_M_TEMP_CRIT BIT(1)158#define DA9121_MASK_SYS_MASK_0_M_TEMP_WARN BIT(0)159 160/* DA9121_REG_SYS_MASK_1 */161 162#define DA9xxx_MASK_SYS_MASK_1_M_PG2 BIT(7)163#define DA9xxx_MASK_SYS_MASK_1_M_OV2 BIT(6)164#define DA9xxx_MASK_SYS_MASK_1_M_UV2 BIT(5)165#define DA9xxx_MASK_SYS_MASK_1_M_OC2 BIT(4)166#define DA9121_MASK_SYS_MASK_1_M_PG1 BIT(3)167#define DA9121_MASK_SYS_MASK_1_M_OV1 BIT(2)168#define DA9121_MASK_SYS_MASK_1_M_UV1 BIT(1)169#define DA9121_MASK_SYS_MASK_1_M_OC1 BIT(0)170 171/* DA9121_REG_SYS_MASK_2 */172 173#define DA9121_MASK_SYS_MASK_2_M_GPIO2 BIT(2)174#define DA9121_MASK_SYS_MASK_2_M_GPIO1 BIT(1)175#define DA9121_MASK_SYS_MASK_2_M_GPIO0 BIT(0)176 177/* DA9122_REG_SYS_MASK_3 */178 179#define DA9121_MASK_SYS_MASK_3_M_VR_HOT BIT(3)180#define DA9xxx_MASK_SYS_MASK_3_M_SG_STAT BIT(2)181#define DA9xxx_MASK_SYS_MASK_3_M_PG2_STAT BIT(1)182#define DA9121_MASK_SYS_MASK_3_M_PG1_STAT BIT(0)183 184/* DA9121_REG_SYS_CONFIG_0 */185 186#define DA9121_MASK_SYS_CONFIG_0_CH1_DIS_DLY 0xF0187#define DA9121_MASK_SYS_CONFIG_0_CH1_EN_DLY 0x0F188 189/* DA9xxx_REG_SYS_CONFIG_1 */190 191#define DA9xxx_MASK_SYS_CONFIG_1_CH2_DIS_DLY 0xF0192#define DA9xxx_MASK_SYS_CONFIG_1_CH2_EN_DLY 0x0F193 194/* DA9121_REG_SYS_CONFIG_2 */195 196#define DA9121_MASK_SYS_CONFIG_2_OC_LATCHOFF 0x60197#define DA9121_MASK_SYS_CONFIG_2_OC_DVC_MASK BIT(4)198#define DA9121_MASK_SYS_CONFIG_2_PG_DVC_MASK 0x0C199 200/* DA9121_REG_SYS_CONFIG_3 */201 202#define DA9121_MASK_SYS_CONFIG_3_OSC_TUNE 0X70203#define DA9121_MASK_SYS_CONFIG_3_I2C_TIMEOUT BIT(1)204 205/* DA9121_REG_SYS_GPIO0_0 */206 207#define DA9121_MASK_SYS_GPIO0_0_GPIO0_MODE 0X1E208#define DA9121_MASK_SYS_GPIO0_0_GPIO0_OBUF BIT(0)209 210/* DA9121_REG_SYS_GPIO0_1 */211 212#define DA9121_MASK_SYS_GPIO0_1_GPIO0_DEB_FALL BIT(7)213#define DA9121_MASK_SYS_GPIO0_1_GPIO0_DEB_RISE BIT(6)214#define DA9121_MASK_SYS_GPIO0_1_GPIO0_DEB 0x30215#define DA9121_MASK_SYS_GPIO0_1_GPIO0_PUPD BIT(3)216#define DA9121_MASK_SYS_GPIO0_1_GPIO0_POL BIT(2)217#define DA9121_MASK_SYS_GPIO0_1_GPIO0_TRIG 0x03218 219/* DA9121_REG_SYS_GPIO1_0 */220 221#define DA9121_MASK_SYS_GPIO1_0_GPIO1_MODE 0x1E222#define DA9121_MASK_SYS_GPIO1_0_GPIO1_OBUF BIT(0)223 224/* DA9121_REG_SYS_GPIO1_1 */225 226#define DA9121_MASK_SYS_GPIO1_1_GPIO1_DEB_FALL BIT(7)227#define DA9121_MASK_SYS_GPIO1_1_GPIO1_DEB_RISE BIT(6)228#define DA9121_MASK_SYS_GPIO1_1_GPIO1_DEB 0x30229#define DA9121_MASK_SYS_GPIO1_1_GPIO1_PUPD BIT(3)230#define DA9121_MASK_SYS_GPIO1_1_GPIO1_POL BIT(2)231#define DA9121_MASK_SYS_GPIO1_1_GPIO1_TRIG 0x03232 233/* DA9121_REG_SYS_GPIO2_0 */234 235#define DA9121_MASK_SYS_GPIO2_0_GPIO2_MODE 0x1E236#define DA9121_MASK_SYS_GPIO2_0_GPIO2_OBUF BIT(0)237 238/* DA9121_REG_SYS_GPIO2_1 */239 240#define DA9121_MASK_SYS_GPIO2_1_GPIO2_DEB_FALL BIT(7)241#define DA9121_MASK_SYS_GPIO2_1_GPIO2_DEB_RISE BIT(6)242#define DA9121_MASK_SYS_GPIO2_1_GPIO2_DEB 0x30243#define DA9121_MASK_SYS_GPIO2_1_GPIO2_PUPD BIT(3)244#define DA9121_MASK_SYS_GPIO2_1_GPIO2_POL BIT(2)245#define DA9121_MASK_SYS_GPIO2_1_GPIO2_TRIG 0x03246 247/* DA9121_REG_BUCK_BUCK1_0 / DA9xxx_REG_BUCK_BUCK2_0 */248 249#define DA9121_MASK_BUCK_BUCKx_0_CHx_SR_DVC_DWN 0x70250#define DA9121_MASK_BUCK_BUCKx_0_CHx_SR_DVC_UP 0x0E251#define DA9121_MASK_BUCK_BUCKx_0_CHx_EN BIT(0)252 253/* DA9121_REG_BUCK_BUCK1_1 / DA9xxx_REG_BUCK_BUCK2_1 */254 255#define DA9121_MASK_BUCK_BUCKx_1_CHx_SR_SHDN 0x70256#define DA9121_MASK_BUCK_BUCKx_1_CHx_SR_STARTUP 0x0E257#define DA9121_MASK_BUCK_BUCKx_1_CHx_PD_DIS BIT(0)258 259/* DA9121_REG_BUCK_BUCK1_2 / DA9xxx_REG_BUCK_BUCK2_2 */260 261#define DA9121_MASK_BUCK_BUCKx_2_CHx_ILIM 0x0F262 263/* DA9121_REG_BUCK_BUCK1_3 / DA9xxx_REG_BUCK_BUCK2_3 */264 265#define DA9121_MASK_BUCK_BUCKx_3_CHx_VMAX 0xFF266 267/* DA9121_REG_BUCK_BUCK1_4 / DA9xxx_REG_BUCK_BUCK2_4 */268 269#define DA9121_MASK_BUCK_BUCKx_4_CHx_VSEL BIT(4)270#define DA9121_MASK_BUCK_BUCKx_4_CHx_B_MODE 0x0C271#define DA9121_MASK_BUCK_BUCKx_4_CHx_A_MODE 0x03272 273/* DA9121_REG_BUCK_BUCK1_5 / DA9xxx_REG_BUCK_BUCK2_5 */274 275#define DA9121_MASK_BUCK_BUCKx_5_CHx_A_VOUT 0xFF276 277/* DA9121_REG_BUCK_BUCK1_6 / DA9xxx_REG_BUCK_BUCK2_6 */278 279#define DA9121_MASK_BUCK_BUCKx_6_CHx_B_VOUT 0xFF280 281/* DA9121_REG_BUCK_BUCK1_7 / DA9xxx_REG_BUCK_BUCK2_7 */282 283#define DA9xxx_MASK_BUCK_BUCKx_7_CHx_RIPPLE_CANCEL 0x03284 285 286/* DA9121_REG_OTP_DEVICE_ID */287 288#define DA9121_MASK_OTP_DEVICE_ID_DEV_ID 0xFF289 290#define DA9121_DEVICE_ID 0x05291#define DA914x_DEVICE_ID 0x26292 293/* DA9121_REG_OTP_VARIANT_ID */294 295#define DA9121_SHIFT_OTP_VARIANT_ID_MRC 4296#define DA9121_MASK_OTP_VARIANT_ID_MRC 0xF0297#define DA9121_SHIFT_OTP_VARIANT_ID_VRC 0298#define DA9121_MASK_OTP_VARIANT_ID_VRC 0x0F299 300#define DA9121_VARIANT_MRC_BASE 0x2301#define DA9121_VARIANT_VRC 0x1302#define DA9220_VARIANT_VRC 0x0303#define DA9122_VARIANT_VRC 0x2304#define DA9217_VARIANT_VRC 0x7305#define DA9130_VARIANT_VRC 0x0306#define DA9131_VARIANT_VRC 0x1307#define DA9132_VARIANT_VRC 0x2308 309#define DA914x_VARIANT_MRC_BASE 0x0310#define DA9141_VARIANT_VRC 0x1311#define DA9142_VARIANT_VRC 0x2312 313/* DA9121_REG_OTP_CUSTOMER_ID */314 315#define DA9121_MASK_OTP_CUSTOMER_ID_CUST_ID 0xFF316 317/* DA9121_REG_OTP_CONFIG_ID */318 319#define DA9121_MASK_OTP_CONFIG_ID_CONFIG_REV 0xFF320 321#endif /* __DA9121_REGISTERS_H__ */322