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1// SPDX-License-Identifier: GPL-2.0-only2/*3 * Maxim MAX77620 Regulator driver4 *5 * Copyright (c) 2016-2018, NVIDIA CORPORATION. All rights reserved.6 *7 * Author: Mallikarjun Kasoju <mkasoju@nvidia.com>8 * Laxman Dewangan <ldewangan@nvidia.com>9 */10 11#include <linux/init.h>12#include <linux/mfd/max77620.h>13#include <linux/module.h>14#include <linux/of.h>15#include <linux/platform_device.h>16#include <linux/regmap.h>17#include <linux/regulator/driver.h>18#include <linux/regulator/machine.h>19#include <linux/regulator/of_regulator.h>20 21#define max77620_rails(_name) "max77620-"#_name22 23/* Power Mode */24#define MAX77620_POWER_MODE_NORMAL 325#define MAX77620_POWER_MODE_LPM 226#define MAX77620_POWER_MODE_GLPM 127#define MAX77620_POWER_MODE_DISABLE 028 29/* SD Slew Rate */30#define MAX77620_SD_SR_13_75 031#define MAX77620_SD_SR_27_5 132#define MAX77620_SD_SR_55 233#define MAX77620_SD_SR_100 334 35enum max77620_regulators {36 MAX77620_REGULATOR_ID_SD0,37 MAX77620_REGULATOR_ID_SD1,38 MAX77620_REGULATOR_ID_SD2,39 MAX77620_REGULATOR_ID_SD3,40 MAX77620_REGULATOR_ID_SD4,41 MAX77620_REGULATOR_ID_LDO0,42 MAX77620_REGULATOR_ID_LDO1,43 MAX77620_REGULATOR_ID_LDO2,44 MAX77620_REGULATOR_ID_LDO3,45 MAX77620_REGULATOR_ID_LDO4,46 MAX77620_REGULATOR_ID_LDO5,47 MAX77620_REGULATOR_ID_LDO6,48 MAX77620_REGULATOR_ID_LDO7,49 MAX77620_REGULATOR_ID_LDO8,50 MAX77620_NUM_REGS,51};52 53/* Regulator types */54enum max77620_regulator_type {55 MAX77620_REGULATOR_TYPE_SD,56 MAX77620_REGULATOR_TYPE_LDO_N,57 MAX77620_REGULATOR_TYPE_LDO_P,58};59 60struct max77620_regulator_info {61 u8 type;62 u8 fps_addr;63 u8 volt_addr;64 u8 cfg_addr;65 u8 power_mode_mask;66 u8 power_mode_shift;67 u8 remote_sense_addr;68 u8 remote_sense_mask;69 struct regulator_desc desc;70};71 72struct max77620_regulator_pdata {73 int active_fps_src;74 int active_fps_pd_slot;75 int active_fps_pu_slot;76 int suspend_fps_src;77 int suspend_fps_pd_slot;78 int suspend_fps_pu_slot;79 int current_mode;80 int power_ok;81 int ramp_rate_setting;82};83 84struct max77620_regulator {85 struct device *dev;86 struct regmap *rmap;87 struct max77620_regulator_info *rinfo[MAX77620_NUM_REGS];88 struct max77620_regulator_pdata reg_pdata[MAX77620_NUM_REGS];89 int enable_power_mode[MAX77620_NUM_REGS];90 int current_power_mode[MAX77620_NUM_REGS];91 int active_fps_src[MAX77620_NUM_REGS];92};93 94#define fps_src_name(fps_src) \95 (fps_src == MAX77620_FPS_SRC_0 ? "FPS_SRC_0" : \96 fps_src == MAX77620_FPS_SRC_1 ? "FPS_SRC_1" : \97 fps_src == MAX77620_FPS_SRC_2 ? "FPS_SRC_2" : "FPS_SRC_NONE")98 99static int max77620_regulator_get_fps_src(struct max77620_regulator *pmic,100 int id)101{102 struct max77620_regulator_info *rinfo = pmic->rinfo[id];103 unsigned int val;104 int ret;105 106 ret = regmap_read(pmic->rmap, rinfo->fps_addr, &val);107 if (ret < 0) {108 dev_err(pmic->dev, "Reg 0x%02x read failed %d\n",109 rinfo->fps_addr, ret);110 return ret;111 }112 113 return (val & MAX77620_FPS_SRC_MASK) >> MAX77620_FPS_SRC_SHIFT;114}115 116static int max77620_regulator_set_fps_src(struct max77620_regulator *pmic,117 int fps_src, int id)118{119 struct max77620_regulator_info *rinfo = pmic->rinfo[id];120 unsigned int val;121 int ret;122 123 if (!rinfo)124 return 0;125 126 switch (fps_src) {127 case MAX77620_FPS_SRC_0:128 case MAX77620_FPS_SRC_1:129 case MAX77620_FPS_SRC_2:130 case MAX77620_FPS_SRC_NONE:131 break;132 133 case MAX77620_FPS_SRC_DEF:134 ret = regmap_read(pmic->rmap, rinfo->fps_addr, &val);135 if (ret < 0) {136 dev_err(pmic->dev, "Reg 0x%02x read failed %d\n",137 rinfo->fps_addr, ret);138 return ret;139 }140 ret = (val & MAX77620_FPS_SRC_MASK) >> MAX77620_FPS_SRC_SHIFT;141 pmic->active_fps_src[id] = ret;142 return 0;143 144 default:145 dev_err(pmic->dev, "Invalid FPS %d for regulator %d\n",146 fps_src, id);147 return -EINVAL;148 }149 150 ret = regmap_update_bits(pmic->rmap, rinfo->fps_addr,151 MAX77620_FPS_SRC_MASK,152 fps_src << MAX77620_FPS_SRC_SHIFT);153 if (ret < 0) {154 dev_err(pmic->dev, "Reg 0x%02x update failed %d\n",155 rinfo->fps_addr, ret);156 return ret;157 }158 pmic->active_fps_src[id] = fps_src;159 160 return 0;161}162 163static int max77620_regulator_set_fps_slots(struct max77620_regulator *pmic,164 int id, bool is_suspend)165{166 struct max77620_regulator_pdata *rpdata = &pmic->reg_pdata[id];167 struct max77620_regulator_info *rinfo = pmic->rinfo[id];168 unsigned int val = 0;169 unsigned int mask = 0;170 int pu = rpdata->active_fps_pu_slot;171 int pd = rpdata->active_fps_pd_slot;172 int ret = 0;173 174 if (!rinfo)175 return 0;176 177 if (is_suspend) {178 pu = rpdata->suspend_fps_pu_slot;179 pd = rpdata->suspend_fps_pd_slot;180 }181 182 /* FPS power up period setting */183 if (pu >= 0) {184 val |= (pu << MAX77620_FPS_PU_PERIOD_SHIFT);185 mask |= MAX77620_FPS_PU_PERIOD_MASK;186 }187 188 /* FPS power down period setting */189 if (pd >= 0) {190 val |= (pd << MAX77620_FPS_PD_PERIOD_SHIFT);191 mask |= MAX77620_FPS_PD_PERIOD_MASK;192 }193 194 if (mask) {195 ret = regmap_update_bits(pmic->rmap, rinfo->fps_addr,196 mask, val);197 if (ret < 0) {198 dev_err(pmic->dev, "Reg 0x%02x update failed: %d\n",199 rinfo->fps_addr, ret);200 return ret;201 }202 }203 204 return ret;205}206 207static int max77620_regulator_set_power_mode(struct max77620_regulator *pmic,208 int power_mode, int id)209{210 struct max77620_regulator_info *rinfo = pmic->rinfo[id];211 u8 mask = rinfo->power_mode_mask;212 u8 shift = rinfo->power_mode_shift;213 u8 addr;214 int ret;215 216 switch (rinfo->type) {217 case MAX77620_REGULATOR_TYPE_SD:218 addr = rinfo->cfg_addr;219 break;220 default:221 addr = rinfo->volt_addr;222 break;223 }224 225 ret = regmap_update_bits(pmic->rmap, addr, mask, power_mode << shift);226 if (ret < 0) {227 dev_err(pmic->dev, "Regulator %d mode set failed: %d\n",228 id, ret);229 return ret;230 }231 pmic->current_power_mode[id] = power_mode;232 233 return ret;234}235 236static int max77620_regulator_get_power_mode(struct max77620_regulator *pmic,237 int id)238{239 struct max77620_regulator_info *rinfo = pmic->rinfo[id];240 unsigned int val, addr;241 u8 mask = rinfo->power_mode_mask;242 u8 shift = rinfo->power_mode_shift;243 int ret;244 245 switch (rinfo->type) {246 case MAX77620_REGULATOR_TYPE_SD:247 addr = rinfo->cfg_addr;248 break;249 default:250 addr = rinfo->volt_addr;251 break;252 }253 254 ret = regmap_read(pmic->rmap, addr, &val);255 if (ret < 0) {256 dev_err(pmic->dev, "Regulator %d: Reg 0x%02x read failed: %d\n",257 id, addr, ret);258 return ret;259 }260 261 return (val & mask) >> shift;262}263 264static int max77620_read_slew_rate(struct max77620_regulator *pmic, int id)265{266 struct max77620_regulator_info *rinfo = pmic->rinfo[id];267 unsigned int rval;268 int slew_rate;269 int ret;270 271 ret = regmap_read(pmic->rmap, rinfo->cfg_addr, &rval);272 if (ret < 0) {273 dev_err(pmic->dev, "Register 0x%02x read failed: %d\n",274 rinfo->cfg_addr, ret);275 return ret;276 }277 278 switch (rinfo->type) {279 case MAX77620_REGULATOR_TYPE_SD:280 slew_rate = (rval >> MAX77620_SD_SR_SHIFT) & 0x3;281 switch (slew_rate) {282 case 0:283 slew_rate = 13750;284 break;285 case 1:286 slew_rate = 27500;287 break;288 case 2:289 slew_rate = 55000;290 break;291 case 3:292 slew_rate = 100000;293 break;294 }295 rinfo->desc.ramp_delay = slew_rate;296 break;297 default:298 slew_rate = rval & 0x1;299 switch (slew_rate) {300 case 0:301 slew_rate = 100000;302 break;303 case 1:304 slew_rate = 5000;305 break;306 }307 rinfo->desc.ramp_delay = slew_rate;308 break;309 }310 311 return 0;312}313 314static int max77620_set_slew_rate(struct max77620_regulator *pmic, int id,315 int slew_rate)316{317 struct max77620_regulator_info *rinfo = pmic->rinfo[id];318 unsigned int val;319 int ret;320 u8 mask;321 322 if (rinfo->type == MAX77620_REGULATOR_TYPE_SD) {323 if (slew_rate <= 13750)324 val = 0;325 else if (slew_rate <= 27500)326 val = 1;327 else if (slew_rate <= 55000)328 val = 2;329 else330 val = 3;331 val <<= MAX77620_SD_SR_SHIFT;332 mask = MAX77620_SD_SR_MASK;333 } else {334 if (slew_rate <= 5000)335 val = 1;336 else337 val = 0;338 mask = MAX77620_LDO_SLEW_RATE_MASK;339 }340 341 ret = regmap_update_bits(pmic->rmap, rinfo->cfg_addr, mask, val);342 if (ret < 0) {343 dev_err(pmic->dev, "Regulator %d slew rate set failed: %d\n",344 id, ret);345 return ret;346 }347 348 return 0;349}350 351static int max77620_config_power_ok(struct max77620_regulator *pmic, int id)352{353 struct max77620_regulator_pdata *rpdata = &pmic->reg_pdata[id];354 struct max77620_regulator_info *rinfo = pmic->rinfo[id];355 struct max77620_chip *chip = dev_get_drvdata(pmic->dev->parent);356 u8 val, mask;357 int ret;358 359 switch (chip->chip_id) {360 case MAX20024:361 if (rpdata->power_ok >= 0) {362 if (rinfo->type == MAX77620_REGULATOR_TYPE_SD)363 mask = MAX20024_SD_CFG1_MPOK_MASK;364 else365 mask = MAX20024_LDO_CFG2_MPOK_MASK;366 367 val = rpdata->power_ok ? mask : 0;368 369 ret = regmap_update_bits(pmic->rmap, rinfo->cfg_addr,370 mask, val);371 if (ret < 0) {372 dev_err(pmic->dev, "Reg 0x%02x update failed %d\n",373 rinfo->cfg_addr, ret);374 return ret;375 }376 }377 break;378 379 default:380 break;381 }382 383 return 0;384}385 386static int max77620_init_pmic(struct max77620_regulator *pmic, int id)387{388 struct max77620_regulator_pdata *rpdata = &pmic->reg_pdata[id];389 int ret;390 391 max77620_config_power_ok(pmic, id);392 393 /* Update power mode */394 ret = max77620_regulator_get_power_mode(pmic, id);395 if (ret < 0)396 return ret;397 398 pmic->current_power_mode[id] = ret;399 pmic->enable_power_mode[id] = MAX77620_POWER_MODE_NORMAL;400 401 if (rpdata->active_fps_src == MAX77620_FPS_SRC_DEF) {402 ret = max77620_regulator_get_fps_src(pmic, id);403 if (ret < 0)404 return ret;405 rpdata->active_fps_src = ret;406 }407 408 /* If rails are externally control of FPS then enable it always. */409 if (rpdata->active_fps_src == MAX77620_FPS_SRC_NONE) {410 ret = max77620_regulator_set_power_mode(pmic,411 pmic->enable_power_mode[id], id);412 if (ret < 0)413 return ret;414 } else {415 if (pmic->current_power_mode[id] !=416 pmic->enable_power_mode[id]) {417 ret = max77620_regulator_set_power_mode(pmic,418 pmic->enable_power_mode[id], id);419 if (ret < 0)420 return ret;421 }422 }423 424 ret = max77620_regulator_set_fps_src(pmic, rpdata->active_fps_src, id);425 if (ret < 0)426 return ret;427 428 ret = max77620_regulator_set_fps_slots(pmic, id, false);429 if (ret < 0)430 return ret;431 432 if (rpdata->ramp_rate_setting) {433 ret = max77620_set_slew_rate(pmic, id,434 rpdata->ramp_rate_setting);435 if (ret < 0)436 return ret;437 }438 439 return 0;440}441 442static int max77620_regulator_enable(struct regulator_dev *rdev)443{444 struct max77620_regulator *pmic = rdev_get_drvdata(rdev);445 int id = rdev_get_id(rdev);446 447 if (pmic->active_fps_src[id] != MAX77620_FPS_SRC_NONE)448 return 0;449 450 return max77620_regulator_set_power_mode(pmic,451 pmic->enable_power_mode[id], id);452}453 454static int max77620_regulator_disable(struct regulator_dev *rdev)455{456 struct max77620_regulator *pmic = rdev_get_drvdata(rdev);457 int id = rdev_get_id(rdev);458 459 if (pmic->active_fps_src[id] != MAX77620_FPS_SRC_NONE)460 return 0;461 462 return max77620_regulator_set_power_mode(pmic,463 MAX77620_POWER_MODE_DISABLE, id);464}465 466static int max77620_regulator_is_enabled(struct regulator_dev *rdev)467{468 struct max77620_regulator *pmic = rdev_get_drvdata(rdev);469 int id = rdev_get_id(rdev);470 int ret;471 472 if (pmic->active_fps_src[id] != MAX77620_FPS_SRC_NONE)473 return 1;474 475 ret = max77620_regulator_get_power_mode(pmic, id);476 if (ret < 0)477 return ret;478 479 if (ret != MAX77620_POWER_MODE_DISABLE)480 return 1;481 482 return 0;483}484 485static int max77620_regulator_set_mode(struct regulator_dev *rdev,486 unsigned int mode)487{488 struct max77620_regulator *pmic = rdev_get_drvdata(rdev);489 int id = rdev_get_id(rdev);490 struct max77620_regulator_info *rinfo = pmic->rinfo[id];491 struct max77620_regulator_pdata *rpdata = &pmic->reg_pdata[id];492 bool fpwm = false;493 int power_mode;494 int ret;495 u8 val;496 497 switch (mode) {498 case REGULATOR_MODE_FAST:499 fpwm = true;500 power_mode = MAX77620_POWER_MODE_NORMAL;501 break;502 503 case REGULATOR_MODE_NORMAL:504 power_mode = MAX77620_POWER_MODE_NORMAL;505 break;506 507 case REGULATOR_MODE_IDLE:508 power_mode = MAX77620_POWER_MODE_LPM;509 break;510 511 default:512 dev_err(pmic->dev, "Regulator %d mode %d is invalid\n",513 id, mode);514 return -EINVAL;515 }516 517 if (rinfo->type != MAX77620_REGULATOR_TYPE_SD)518 goto skip_fpwm;519 520 val = (fpwm) ? MAX77620_SD_FPWM_MASK : 0;521 ret = regmap_update_bits(pmic->rmap, rinfo->cfg_addr,522 MAX77620_SD_FPWM_MASK, val);523 if (ret < 0) {524 dev_err(pmic->dev, "Reg 0x%02x update failed: %d\n",525 rinfo->cfg_addr, ret);526 return ret;527 }528 rpdata->current_mode = mode;529 530skip_fpwm:531 ret = max77620_regulator_set_power_mode(pmic, power_mode, id);532 if (ret < 0)533 return ret;534 535 pmic->enable_power_mode[id] = power_mode;536 537 return 0;538}539 540static unsigned int max77620_regulator_get_mode(struct regulator_dev *rdev)541{542 struct max77620_regulator *pmic = rdev_get_drvdata(rdev);543 int id = rdev_get_id(rdev);544 struct max77620_regulator_info *rinfo = pmic->rinfo[id];545 int fpwm = 0;546 int ret;547 int pm_mode, reg_mode;548 unsigned int val;549 550 ret = max77620_regulator_get_power_mode(pmic, id);551 if (ret < 0)552 return 0;553 554 pm_mode = ret;555 556 if (rinfo->type == MAX77620_REGULATOR_TYPE_SD) {557 ret = regmap_read(pmic->rmap, rinfo->cfg_addr, &val);558 if (ret < 0) {559 dev_err(pmic->dev, "Reg 0x%02x read failed: %d\n",560 rinfo->cfg_addr, ret);561 return ret;562 }563 fpwm = !!(val & MAX77620_SD_FPWM_MASK);564 }565 566 switch (pm_mode) {567 case MAX77620_POWER_MODE_NORMAL:568 case MAX77620_POWER_MODE_DISABLE:569 if (fpwm)570 reg_mode = REGULATOR_MODE_FAST;571 else572 reg_mode = REGULATOR_MODE_NORMAL;573 break;574 case MAX77620_POWER_MODE_LPM:575 case MAX77620_POWER_MODE_GLPM:576 reg_mode = REGULATOR_MODE_IDLE;577 break;578 default:579 return 0;580 }581 582 return reg_mode;583}584 585static int max77620_regulator_set_ramp_delay(struct regulator_dev *rdev,586 int ramp_delay)587{588 struct max77620_regulator *pmic = rdev_get_drvdata(rdev);589 int id = rdev_get_id(rdev);590 struct max77620_regulator_pdata *rpdata = &pmic->reg_pdata[id];591 592 /* Device specific ramp rate setting tells that platform has593 * different ramp rate from advertised value. In this case,594 * do not configure anything and just return success.595 */596 if (rpdata->ramp_rate_setting)597 return 0;598 599 return max77620_set_slew_rate(pmic, id, ramp_delay);600}601 602static int max77620_of_parse_cb(struct device_node *np,603 const struct regulator_desc *desc,604 struct regulator_config *config)605{606 struct max77620_regulator *pmic = config->driver_data;607 struct max77620_regulator_pdata *rpdata = &pmic->reg_pdata[desc->id];608 u32 pval;609 int ret;610 611 ret = of_property_read_u32(np, "maxim,active-fps-source", &pval);612 rpdata->active_fps_src = (!ret) ? pval : MAX77620_FPS_SRC_DEF;613 614 ret = of_property_read_u32(np, "maxim,active-fps-power-up-slot", &pval);615 rpdata->active_fps_pu_slot = (!ret) ? pval : -1;616 617 ret = of_property_read_u32(618 np, "maxim,active-fps-power-down-slot", &pval);619 rpdata->active_fps_pd_slot = (!ret) ? pval : -1;620 621 ret = of_property_read_u32(np, "maxim,suspend-fps-source", &pval);622 rpdata->suspend_fps_src = (!ret) ? pval : -1;623 624 ret = of_property_read_u32(625 np, "maxim,suspend-fps-power-up-slot", &pval);626 rpdata->suspend_fps_pu_slot = (!ret) ? pval : -1;627 628 ret = of_property_read_u32(629 np, "maxim,suspend-fps-power-down-slot", &pval);630 rpdata->suspend_fps_pd_slot = (!ret) ? pval : -1;631 632 ret = of_property_read_u32(np, "maxim,power-ok-control", &pval);633 if (!ret)634 rpdata->power_ok = pval;635 else636 rpdata->power_ok = -1;637 638 ret = of_property_read_u32(np, "maxim,ramp-rate-setting", &pval);639 rpdata->ramp_rate_setting = (!ret) ? pval : 0;640 641 return max77620_init_pmic(pmic, desc->id);642}643 644static const struct regulator_ops max77620_regulator_ops = {645 .is_enabled = max77620_regulator_is_enabled,646 .enable = max77620_regulator_enable,647 .disable = max77620_regulator_disable,648 .list_voltage = regulator_list_voltage_linear,649 .map_voltage = regulator_map_voltage_linear,650 .get_voltage_sel = regulator_get_voltage_sel_regmap,651 .set_voltage_sel = regulator_set_voltage_sel_regmap,652 .set_mode = max77620_regulator_set_mode,653 .get_mode = max77620_regulator_get_mode,654 .set_ramp_delay = max77620_regulator_set_ramp_delay,655 .set_voltage_time_sel = regulator_set_voltage_time_sel,656 .set_active_discharge = regulator_set_active_discharge_regmap,657};658 659#define MAX77620_SD_CNF2_ROVS_EN_NONE 0660#define RAIL_SD(_id, _name, _sname, _volt_mask, _min_uV, _max_uV, \661 _step_uV, _rs_add, _rs_mask) \662 [MAX77620_REGULATOR_ID_##_id] = { \663 .type = MAX77620_REGULATOR_TYPE_SD, \664 .volt_addr = MAX77620_REG_##_id, \665 .cfg_addr = MAX77620_REG_##_id##_CFG, \666 .fps_addr = MAX77620_REG_FPS_##_id, \667 .remote_sense_addr = _rs_add, \668 .remote_sense_mask = MAX77620_SD_CNF2_ROVS_EN_##_rs_mask, \669 .power_mode_mask = MAX77620_SD_POWER_MODE_MASK, \670 .power_mode_shift = MAX77620_SD_POWER_MODE_SHIFT, \671 .desc = { \672 .name = max77620_rails(_name), \673 .of_match = of_match_ptr(#_name), \674 .regulators_node = of_match_ptr("regulators"), \675 .of_parse_cb = max77620_of_parse_cb, \676 .supply_name = _sname, \677 .id = MAX77620_REGULATOR_ID_##_id, \678 .ops = &max77620_regulator_ops, \679 .n_voltages = ((_max_uV - _min_uV) / _step_uV) + 1, \680 .min_uV = _min_uV, \681 .uV_step = _step_uV, \682 .enable_time = 500, \683 .vsel_mask = MAX77620_##_volt_mask##_VOLT_MASK, \684 .vsel_reg = MAX77620_REG_##_id, \685 .active_discharge_off = 0, \686 .active_discharge_on = MAX77620_SD_CFG1_ADE_ENABLE, \687 .active_discharge_mask = MAX77620_SD_CFG1_ADE_MASK, \688 .active_discharge_reg = MAX77620_REG_##_id##_CFG, \689 .type = REGULATOR_VOLTAGE, \690 .owner = THIS_MODULE, \691 }, \692 }693 694#define RAIL_LDO(_id, _name, _sname, _type, _min_uV, _max_uV, _step_uV) \695 [MAX77620_REGULATOR_ID_##_id] = { \696 .type = MAX77620_REGULATOR_TYPE_LDO_##_type, \697 .volt_addr = MAX77620_REG_##_id##_CFG, \698 .cfg_addr = MAX77620_REG_##_id##_CFG2, \699 .fps_addr = MAX77620_REG_FPS_##_id, \700 .remote_sense_addr = 0xFF, \701 .power_mode_mask = MAX77620_LDO_POWER_MODE_MASK, \702 .power_mode_shift = MAX77620_LDO_POWER_MODE_SHIFT, \703 .desc = { \704 .name = max77620_rails(_name), \705 .of_match = of_match_ptr(#_name), \706 .regulators_node = of_match_ptr("regulators"), \707 .of_parse_cb = max77620_of_parse_cb, \708 .supply_name = _sname, \709 .id = MAX77620_REGULATOR_ID_##_id, \710 .ops = &max77620_regulator_ops, \711 .n_voltages = ((_max_uV - _min_uV) / _step_uV) + 1, \712 .min_uV = _min_uV, \713 .uV_step = _step_uV, \714 .enable_time = 500, \715 .vsel_mask = MAX77620_LDO_VOLT_MASK, \716 .vsel_reg = MAX77620_REG_##_id##_CFG, \717 .active_discharge_off = 0, \718 .active_discharge_on = MAX77620_LDO_CFG2_ADE_ENABLE, \719 .active_discharge_mask = MAX77620_LDO_CFG2_ADE_MASK, \720 .active_discharge_reg = MAX77620_REG_##_id##_CFG2, \721 .type = REGULATOR_VOLTAGE, \722 .owner = THIS_MODULE, \723 }, \724 }725 726static struct max77620_regulator_info max77620_regs_info[MAX77620_NUM_REGS] = {727 RAIL_SD(SD0, sd0, "in-sd0", SD0, 600000, 1400000, 12500, 0x22, SD0),728 RAIL_SD(SD1, sd1, "in-sd1", SD1, 600000, 1550000, 12500, 0x22, SD1),729 RAIL_SD(SD2, sd2, "in-sd2", SDX, 600000, 3787500, 12500, 0xFF, NONE),730 RAIL_SD(SD3, sd3, "in-sd3", SDX, 600000, 3787500, 12500, 0xFF, NONE),731 732 RAIL_LDO(LDO0, ldo0, "in-ldo0-1", N, 800000, 2375000, 25000),733 RAIL_LDO(LDO1, ldo1, "in-ldo0-1", N, 800000, 2375000, 25000),734 RAIL_LDO(LDO2, ldo2, "in-ldo2", P, 800000, 3950000, 50000),735 RAIL_LDO(LDO3, ldo3, "in-ldo3-5", P, 800000, 3950000, 50000),736 RAIL_LDO(LDO4, ldo4, "in-ldo4-6", P, 800000, 1587500, 12500),737 RAIL_LDO(LDO5, ldo5, "in-ldo3-5", P, 800000, 3950000, 50000),738 RAIL_LDO(LDO6, ldo6, "in-ldo4-6", P, 800000, 3950000, 50000),739 RAIL_LDO(LDO7, ldo7, "in-ldo7-8", N, 800000, 3950000, 50000),740 RAIL_LDO(LDO8, ldo8, "in-ldo7-8", N, 800000, 3950000, 50000),741};742 743static struct max77620_regulator_info max20024_regs_info[MAX77620_NUM_REGS] = {744 RAIL_SD(SD0, sd0, "in-sd0", SD0, 800000, 1587500, 12500, 0x22, SD0),745 RAIL_SD(SD1, sd1, "in-sd1", SD1, 600000, 3387500, 12500, 0x22, SD1),746 RAIL_SD(SD2, sd2, "in-sd2", SDX, 600000, 3787500, 12500, 0xFF, NONE),747 RAIL_SD(SD3, sd3, "in-sd3", SDX, 600000, 3787500, 12500, 0xFF, NONE),748 RAIL_SD(SD4, sd4, "in-sd4", SDX, 600000, 3787500, 12500, 0xFF, NONE),749 750 RAIL_LDO(LDO0, ldo0, "in-ldo0-1", N, 800000, 2375000, 25000),751 RAIL_LDO(LDO1, ldo1, "in-ldo0-1", N, 800000, 2375000, 25000),752 RAIL_LDO(LDO2, ldo2, "in-ldo2", P, 800000, 3950000, 50000),753 RAIL_LDO(LDO3, ldo3, "in-ldo3-5", P, 800000, 3950000, 50000),754 RAIL_LDO(LDO4, ldo4, "in-ldo4-6", P, 800000, 1587500, 12500),755 RAIL_LDO(LDO5, ldo5, "in-ldo3-5", P, 800000, 3950000, 50000),756 RAIL_LDO(LDO6, ldo6, "in-ldo4-6", P, 800000, 3950000, 50000),757 RAIL_LDO(LDO7, ldo7, "in-ldo7-8", N, 800000, 3950000, 50000),758 RAIL_LDO(LDO8, ldo8, "in-ldo7-8", N, 800000, 3950000, 50000),759};760 761static struct max77620_regulator_info max77663_regs_info[MAX77620_NUM_REGS] = {762 RAIL_SD(SD0, sd0, "in-sd0", SD0, 600000, 3387500, 12500, 0xFF, NONE),763 RAIL_SD(SD1, sd1, "in-sd1", SD1, 800000, 1587500, 12500, 0xFF, NONE),764 RAIL_SD(SD2, sd2, "in-sd2", SDX, 600000, 3787500, 12500, 0xFF, NONE),765 RAIL_SD(SD3, sd3, "in-sd3", SDX, 600000, 3787500, 12500, 0xFF, NONE),766 RAIL_SD(SD4, sd4, "in-sd4", SDX, 600000, 3787500, 12500, 0xFF, NONE),767 768 RAIL_LDO(LDO0, ldo0, "in-ldo0-1", N, 800000, 2375000, 25000),769 RAIL_LDO(LDO1, ldo1, "in-ldo0-1", N, 800000, 2375000, 25000),770 RAIL_LDO(LDO2, ldo2, "in-ldo2", P, 800000, 3950000, 50000),771 RAIL_LDO(LDO3, ldo3, "in-ldo3-5", P, 800000, 3950000, 50000),772 RAIL_LDO(LDO4, ldo4, "in-ldo4-6", P, 800000, 1587500, 12500),773 RAIL_LDO(LDO5, ldo5, "in-ldo3-5", P, 800000, 3950000, 50000),774 RAIL_LDO(LDO6, ldo6, "in-ldo4-6", P, 800000, 3950000, 50000),775 RAIL_LDO(LDO7, ldo7, "in-ldo7-8", N, 800000, 3950000, 50000),776 RAIL_LDO(LDO8, ldo8, "in-ldo7-8", N, 800000, 3950000, 50000),777};778 779static int max77620_regulator_probe(struct platform_device *pdev)780{781 struct max77620_chip *max77620_chip = dev_get_drvdata(pdev->dev.parent);782 struct max77620_regulator_info *rinfo;783 struct device *dev = &pdev->dev;784 struct regulator_config config = { };785 struct max77620_regulator *pmic;786 int ret = 0;787 int id;788 789 pmic = devm_kzalloc(dev, sizeof(*pmic), GFP_KERNEL);790 if (!pmic)791 return -ENOMEM;792 793 platform_set_drvdata(pdev, pmic);794 pmic->dev = dev;795 pmic->rmap = max77620_chip->rmap;796 if (!dev->of_node)797 dev->of_node = pdev->dev.parent->of_node;798 799 switch (max77620_chip->chip_id) {800 case MAX77620:801 rinfo = max77620_regs_info;802 break;803 case MAX20024:804 rinfo = max20024_regs_info;805 break;806 case MAX77663:807 rinfo = max77663_regs_info;808 break;809 default:810 return -EINVAL;811 }812 813 config.regmap = pmic->rmap;814 config.dev = dev;815 config.driver_data = pmic;816 817 /*818 * Set of_node_reuse flag to prevent driver core from attempting to819 * claim any pinmux resources already claimed by the parent device.820 * Otherwise PMIC driver will fail to re-probe.821 */822 device_set_of_node_from_dev(&pdev->dev, pdev->dev.parent);823 824 for (id = 0; id < MAX77620_NUM_REGS; id++) {825 struct regulator_dev *rdev;826 struct regulator_desc *rdesc;827 828 if ((max77620_chip->chip_id == MAX77620) &&829 (id == MAX77620_REGULATOR_ID_SD4))830 continue;831 832 rdesc = &rinfo[id].desc;833 pmic->rinfo[id] = &rinfo[id];834 pmic->enable_power_mode[id] = MAX77620_POWER_MODE_NORMAL;835 pmic->reg_pdata[id].active_fps_src = -1;836 pmic->reg_pdata[id].active_fps_pd_slot = -1;837 pmic->reg_pdata[id].active_fps_pu_slot = -1;838 pmic->reg_pdata[id].suspend_fps_src = -1;839 pmic->reg_pdata[id].suspend_fps_pd_slot = -1;840 pmic->reg_pdata[id].suspend_fps_pu_slot = -1;841 pmic->reg_pdata[id].power_ok = -1;842 pmic->reg_pdata[id].ramp_rate_setting = -1;843 844 ret = max77620_read_slew_rate(pmic, id);845 if (ret < 0)846 return ret;847 848 rdev = devm_regulator_register(dev, rdesc, &config);849 if (IS_ERR(rdev))850 return dev_err_probe(dev, PTR_ERR(rdev),851 "Regulator registration %s failed\n",852 rdesc->name);853 }854 855 return 0;856}857 858#ifdef CONFIG_PM_SLEEP859static int max77620_regulator_suspend(struct device *dev)860{861 struct max77620_regulator *pmic = dev_get_drvdata(dev);862 struct max77620_regulator_pdata *reg_pdata;863 int id;864 865 for (id = 0; id < MAX77620_NUM_REGS; id++) {866 reg_pdata = &pmic->reg_pdata[id];867 868 max77620_regulator_set_fps_slots(pmic, id, true);869 if (reg_pdata->suspend_fps_src < 0)870 continue;871 872 max77620_regulator_set_fps_src(pmic, reg_pdata->suspend_fps_src,873 id);874 }875 876 return 0;877}878 879static int max77620_regulator_resume(struct device *dev)880{881 struct max77620_regulator *pmic = dev_get_drvdata(dev);882 struct max77620_regulator_pdata *reg_pdata;883 int id;884 885 for (id = 0; id < MAX77620_NUM_REGS; id++) {886 reg_pdata = &pmic->reg_pdata[id];887 888 max77620_config_power_ok(pmic, id);889 890 max77620_regulator_set_fps_slots(pmic, id, false);891 if (reg_pdata->active_fps_src < 0)892 continue;893 max77620_regulator_set_fps_src(pmic, reg_pdata->active_fps_src,894 id);895 }896 897 return 0;898}899#endif900 901static const struct dev_pm_ops max77620_regulator_pm_ops = {902 SET_SYSTEM_SLEEP_PM_OPS(max77620_regulator_suspend,903 max77620_regulator_resume)904};905 906static const struct platform_device_id max77620_regulator_devtype[] = {907 { .name = "max77620-pmic", },908 { .name = "max20024-pmic", },909 { .name = "max77663-pmic", },910 {},911};912MODULE_DEVICE_TABLE(platform, max77620_regulator_devtype);913 914static struct platform_driver max77620_regulator_driver = {915 .probe = max77620_regulator_probe,916 .id_table = max77620_regulator_devtype,917 .driver = {918 .name = "max77620-pmic",919 .probe_type = PROBE_PREFER_ASYNCHRONOUS,920 .pm = &max77620_regulator_pm_ops,921 },922};923 924module_platform_driver(max77620_regulator_driver);925 926MODULE_DESCRIPTION("MAX77620/MAX20024 regulator driver");927MODULE_AUTHOR("Mallikarjun Kasoju <mkasoju@nvidia.com>");928MODULE_AUTHOR("Laxman Dewangan <ldewangan@nvidia.com>");929MODULE_LICENSE("GPL v2");930