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1// SPDX-License-Identifier: GPL-2.0+2//3// Copyright (c) 2012-2014 Samsung Electronics Co., Ltd4//              http://www.samsung.com5 6#include <linux/bug.h>7#include <linux/cleanup.h>8#include <linux/err.h>9#include <linux/gpio/consumer.h>10#include <linux/slab.h>11#include <linux/module.h>12#include <linux/of.h>13#include <linux/regmap.h>14#include <linux/platform_device.h>15#include <linux/regulator/driver.h>16#include <linux/regulator/machine.h>17#include <linux/regulator/of_regulator.h>18#include <linux/mfd/samsung/core.h>19#include <linux/mfd/samsung/s2mps11.h>20#include <linux/mfd/samsung/s2mps13.h>21#include <linux/mfd/samsung/s2mps14.h>22#include <linux/mfd/samsung/s2mps15.h>23#include <linux/mfd/samsung/s2mpu02.h>24 25/* The highest number of possible regulators for supported devices. */26#define S2MPS_REGULATOR_MAX		S2MPS13_REGULATOR_MAX27struct s2mps11_info {28	int ramp_delay2;29	int ramp_delay34;30	int ramp_delay5;31	int ramp_delay16;32	int ramp_delay7810;33	int ramp_delay9;34 35	enum sec_device_type dev_type;36 37	/*38	 * One bit for each S2MPS11/S2MPS13/S2MPS14/S2MPU02 regulator whether39	 * the suspend mode was enabled.40	 */41	DECLARE_BITMAP(suspend_state, S2MPS_REGULATOR_MAX);42 43	/*44	 * Array (size: number of regulators) with GPIO-s for external45	 * sleep control.46	 */47	struct gpio_desc **ext_control_gpiod;48};49 50static int get_ramp_delay(int ramp_delay)51{52	unsigned char cnt = 0;53 54	ramp_delay /= 6250;55 56	while (true) {57		ramp_delay = ramp_delay >> 1;58		if (ramp_delay == 0)59			break;60		cnt++;61	}62 63	if (cnt > 3)64		cnt = 3;65 66	return cnt;67}68 69static int s2mps11_regulator_set_voltage_time_sel(struct regulator_dev *rdev,70				   unsigned int old_selector,71				   unsigned int new_selector)72{73	struct s2mps11_info *s2mps11 = rdev_get_drvdata(rdev);74	int rdev_id = rdev_get_id(rdev);75	unsigned int ramp_delay = 0;76	int old_volt, new_volt;77 78	switch (rdev_id) {79	case S2MPS11_BUCK2:80		ramp_delay = s2mps11->ramp_delay2;81		break;82	case S2MPS11_BUCK3:83	case S2MPS11_BUCK4:84		ramp_delay = s2mps11->ramp_delay34;85		break;86	case S2MPS11_BUCK5:87		ramp_delay = s2mps11->ramp_delay5;88		break;89	case S2MPS11_BUCK6:90	case S2MPS11_BUCK1:91		ramp_delay = s2mps11->ramp_delay16;92		break;93	case S2MPS11_BUCK7:94	case S2MPS11_BUCK8:95	case S2MPS11_BUCK10:96		ramp_delay = s2mps11->ramp_delay7810;97		break;98	case S2MPS11_BUCK9:99		ramp_delay = s2mps11->ramp_delay9;100	}101 102	if (ramp_delay == 0)103		ramp_delay = rdev->desc->ramp_delay;104 105	old_volt = rdev->desc->min_uV + (rdev->desc->uV_step * old_selector);106	new_volt = rdev->desc->min_uV + (rdev->desc->uV_step * new_selector);107 108	return DIV_ROUND_UP(abs(new_volt - old_volt), ramp_delay);109}110 111static int s2mps11_set_ramp_delay(struct regulator_dev *rdev, int ramp_delay)112{113	struct s2mps11_info *s2mps11 = rdev_get_drvdata(rdev);114	unsigned int ramp_val, ramp_shift, ramp_reg = S2MPS11_REG_RAMP_BUCK;115	unsigned int ramp_enable = 1, enable_shift = 0;116	int rdev_id = rdev_get_id(rdev);117	int ret;118 119	switch (rdev_id) {120	case S2MPS11_BUCK1:121		if (ramp_delay > s2mps11->ramp_delay16)122			s2mps11->ramp_delay16 = ramp_delay;123		else124			ramp_delay = s2mps11->ramp_delay16;125 126		ramp_shift = S2MPS11_BUCK16_RAMP_SHIFT;127		break;128	case S2MPS11_BUCK2:129		enable_shift = S2MPS11_BUCK2_RAMP_EN_SHIFT;130		if (!ramp_delay) {131			ramp_enable = 0;132			break;133		}134 135		s2mps11->ramp_delay2 = ramp_delay;136		ramp_shift = S2MPS11_BUCK2_RAMP_SHIFT;137		ramp_reg = S2MPS11_REG_RAMP;138		break;139	case S2MPS11_BUCK3:140		enable_shift = S2MPS11_BUCK3_RAMP_EN_SHIFT;141		if (!ramp_delay) {142			ramp_enable = 0;143			break;144		}145 146		if (ramp_delay > s2mps11->ramp_delay34)147			s2mps11->ramp_delay34 = ramp_delay;148		else149			ramp_delay = s2mps11->ramp_delay34;150 151		ramp_shift = S2MPS11_BUCK34_RAMP_SHIFT;152		ramp_reg = S2MPS11_REG_RAMP;153		break;154	case S2MPS11_BUCK4:155		enable_shift = S2MPS11_BUCK4_RAMP_EN_SHIFT;156		if (!ramp_delay) {157			ramp_enable = 0;158			break;159		}160 161		if (ramp_delay > s2mps11->ramp_delay34)162			s2mps11->ramp_delay34 = ramp_delay;163		else164			ramp_delay = s2mps11->ramp_delay34;165 166		ramp_shift = S2MPS11_BUCK34_RAMP_SHIFT;167		ramp_reg = S2MPS11_REG_RAMP;168		break;169	case S2MPS11_BUCK5:170		s2mps11->ramp_delay5 = ramp_delay;171		ramp_shift = S2MPS11_BUCK5_RAMP_SHIFT;172		break;173	case S2MPS11_BUCK6:174		enable_shift = S2MPS11_BUCK6_RAMP_EN_SHIFT;175		if (!ramp_delay) {176			ramp_enable = 0;177			break;178		}179 180		if (ramp_delay > s2mps11->ramp_delay16)181			s2mps11->ramp_delay16 = ramp_delay;182		else183			ramp_delay = s2mps11->ramp_delay16;184 185		ramp_shift = S2MPS11_BUCK16_RAMP_SHIFT;186		break;187	case S2MPS11_BUCK7:188	case S2MPS11_BUCK8:189	case S2MPS11_BUCK10:190		if (ramp_delay > s2mps11->ramp_delay7810)191			s2mps11->ramp_delay7810 = ramp_delay;192		else193			ramp_delay = s2mps11->ramp_delay7810;194 195		ramp_shift = S2MPS11_BUCK7810_RAMP_SHIFT;196		break;197	case S2MPS11_BUCK9:198		s2mps11->ramp_delay9 = ramp_delay;199		ramp_shift = S2MPS11_BUCK9_RAMP_SHIFT;200		break;201	default:202		return 0;203	}204 205	if (!ramp_enable)206		goto ramp_disable;207 208	/* Ramp delay can be enabled/disabled only for buck[2346] */209	if ((rdev_id >= S2MPS11_BUCK2 && rdev_id <= S2MPS11_BUCK4) ||210	    rdev_id == S2MPS11_BUCK6)  {211		ret = regmap_update_bits(rdev->regmap, S2MPS11_REG_RAMP,212					 1 << enable_shift, 1 << enable_shift);213		if (ret) {214			dev_err(&rdev->dev, "failed to enable ramp rate\n");215			return ret;216		}217	}218 219	ramp_val = get_ramp_delay(ramp_delay);220 221	return regmap_update_bits(rdev->regmap, ramp_reg, 0x3 << ramp_shift,222				  ramp_val << ramp_shift);223 224ramp_disable:225	return regmap_update_bits(rdev->regmap, S2MPS11_REG_RAMP,226				  1 << enable_shift, 0);227}228 229static int s2mps11_regulator_enable(struct regulator_dev *rdev)230{231	struct s2mps11_info *s2mps11 = rdev_get_drvdata(rdev);232	int rdev_id = rdev_get_id(rdev);233	unsigned int val;234 235	switch (s2mps11->dev_type) {236	case S2MPS11X:237		if (test_bit(rdev_id, s2mps11->suspend_state))238			val = S2MPS14_ENABLE_SUSPEND;239		else240			val = rdev->desc->enable_mask;241		break;242	case S2MPS13X:243	case S2MPS14X:244		if (test_bit(rdev_id, s2mps11->suspend_state))245			val = S2MPS14_ENABLE_SUSPEND;246		else if (s2mps11->ext_control_gpiod[rdev_id])247			val = S2MPS14_ENABLE_EXT_CONTROL;248		else249			val = rdev->desc->enable_mask;250		break;251	case S2MPU02:252		if (test_bit(rdev_id, s2mps11->suspend_state))253			val = S2MPU02_ENABLE_SUSPEND;254		else255			val = rdev->desc->enable_mask;256		break;257	default:258		return -EINVAL;259	}260 261	return regmap_update_bits(rdev->regmap, rdev->desc->enable_reg,262			rdev->desc->enable_mask, val);263}264 265static int s2mps11_regulator_set_suspend_disable(struct regulator_dev *rdev)266{267	int ret;268	unsigned int val, state;269	struct s2mps11_info *s2mps11 = rdev_get_drvdata(rdev);270	int rdev_id = rdev_get_id(rdev);271 272	/* Below LDO should be always on or does not support suspend mode. */273	switch (s2mps11->dev_type) {274	case S2MPS11X:275		switch (rdev_id) {276		case S2MPS11_LDO2:277		case S2MPS11_LDO36:278		case S2MPS11_LDO37:279		case S2MPS11_LDO38:280			return 0;281		default:282			state = S2MPS14_ENABLE_SUSPEND;283			break;284		}285		break;286	case S2MPS13X:287	case S2MPS14X:288		switch (rdev_id) {289		case S2MPS14_LDO3:290			return 0;291		default:292			state = S2MPS14_ENABLE_SUSPEND;293			break;294		}295		break;296	case S2MPU02:297		switch (rdev_id) {298		case S2MPU02_LDO13:299		case S2MPU02_LDO14:300		case S2MPU02_LDO15:301		case S2MPU02_LDO17:302		case S2MPU02_BUCK7:303			state = S2MPU02_DISABLE_SUSPEND;304			break;305		default:306			state = S2MPU02_ENABLE_SUSPEND;307			break;308		}309		break;310	default:311		return -EINVAL;312	}313 314	ret = regmap_read(rdev->regmap, rdev->desc->enable_reg, &val);315	if (ret < 0)316		return ret;317 318	set_bit(rdev_id, s2mps11->suspend_state);319	/*320	 * Don't enable suspend mode if regulator is already disabled because321	 * this would effectively for a short time turn on the regulator after322	 * resuming.323	 * However we still want to toggle the suspend_state bit for regulator324	 * in case if it got enabled before suspending the system.325	 */326	if (!(val & rdev->desc->enable_mask))327		return 0;328 329	return regmap_update_bits(rdev->regmap, rdev->desc->enable_reg,330				  rdev->desc->enable_mask, state);331}332 333static const struct regulator_ops s2mps11_ldo_ops = {334	.list_voltage		= regulator_list_voltage_linear,335	.map_voltage		= regulator_map_voltage_linear,336	.is_enabled		= regulator_is_enabled_regmap,337	.enable			= s2mps11_regulator_enable,338	.disable		= regulator_disable_regmap,339	.get_voltage_sel	= regulator_get_voltage_sel_regmap,340	.set_voltage_sel	= regulator_set_voltage_sel_regmap,341	.set_voltage_time_sel	= regulator_set_voltage_time_sel,342	.set_suspend_disable	= s2mps11_regulator_set_suspend_disable,343};344 345static const struct regulator_ops s2mps11_buck_ops = {346	.list_voltage		= regulator_list_voltage_linear,347	.map_voltage		= regulator_map_voltage_linear,348	.is_enabled		= regulator_is_enabled_regmap,349	.enable			= s2mps11_regulator_enable,350	.disable		= regulator_disable_regmap,351	.get_voltage_sel	= regulator_get_voltage_sel_regmap,352	.set_voltage_sel	= regulator_set_voltage_sel_regmap,353	.set_voltage_time_sel	= s2mps11_regulator_set_voltage_time_sel,354	.set_ramp_delay		= s2mps11_set_ramp_delay,355	.set_suspend_disable	= s2mps11_regulator_set_suspend_disable,356};357 358#define regulator_desc_s2mps11_ldo(num, step) {		\359	.name		= "LDO"#num,			\360	.id		= S2MPS11_LDO##num,		\361	.ops		= &s2mps11_ldo_ops,		\362	.type		= REGULATOR_VOLTAGE,		\363	.owner		= THIS_MODULE,			\364	.ramp_delay	= RAMP_DELAY_12_MVUS,		\365	.min_uV		= MIN_800_MV,			\366	.uV_step	= step,				\367	.n_voltages	= S2MPS11_LDO_N_VOLTAGES,	\368	.vsel_reg	= S2MPS11_REG_L1CTRL + num - 1,	\369	.vsel_mask	= S2MPS11_LDO_VSEL_MASK,	\370	.enable_reg	= S2MPS11_REG_L1CTRL + num - 1,	\371	.enable_mask	= S2MPS11_ENABLE_MASK		\372}373 374#define regulator_desc_s2mps11_buck1_4(num) {			\375	.name		= "BUCK"#num,				\376	.id		= S2MPS11_BUCK##num,			\377	.ops		= &s2mps11_buck_ops,			\378	.type		= REGULATOR_VOLTAGE,			\379	.owner		= THIS_MODULE,				\380	.min_uV		= MIN_650_MV,				\381	.uV_step	= STEP_6_25_MV,				\382	.linear_min_sel	= 8,					\383	.n_voltages	= S2MPS11_BUCK12346_N_VOLTAGES,		\384	.ramp_delay	= S2MPS11_RAMP_DELAY,			\385	.vsel_reg	= S2MPS11_REG_B1CTRL2 + (num - 1) * 2,	\386	.vsel_mask	= S2MPS11_BUCK_VSEL_MASK,		\387	.enable_reg	= S2MPS11_REG_B1CTRL1 + (num - 1) * 2,	\388	.enable_mask	= S2MPS11_ENABLE_MASK			\389}390 391#define regulator_desc_s2mps11_buck5 {				\392	.name		= "BUCK5",				\393	.id		= S2MPS11_BUCK5,			\394	.ops		= &s2mps11_buck_ops,			\395	.type		= REGULATOR_VOLTAGE,			\396	.owner		= THIS_MODULE,				\397	.min_uV		= MIN_650_MV,				\398	.uV_step	= STEP_6_25_MV,				\399	.linear_min_sel	= 8,					\400	.n_voltages	= S2MPS11_BUCK5_N_VOLTAGES,		\401	.ramp_delay	= S2MPS11_RAMP_DELAY,			\402	.vsel_reg	= S2MPS11_REG_B5CTRL2,			\403	.vsel_mask	= S2MPS11_BUCK_VSEL_MASK,		\404	.enable_reg	= S2MPS11_REG_B5CTRL1,			\405	.enable_mask	= S2MPS11_ENABLE_MASK			\406}407 408#define regulator_desc_s2mps11_buck67810(num, min, step, min_sel, voltages) {	\409	.name		= "BUCK"#num,				\410	.id		= S2MPS11_BUCK##num,			\411	.ops		= &s2mps11_buck_ops,			\412	.type		= REGULATOR_VOLTAGE,			\413	.owner		= THIS_MODULE,				\414	.min_uV		= min,					\415	.uV_step	= step,					\416	.linear_min_sel	= min_sel,				\417	.n_voltages	= voltages,				\418	.ramp_delay	= S2MPS11_RAMP_DELAY,			\419	.vsel_reg	= S2MPS11_REG_B6CTRL2 + (num - 6) * 2,	\420	.vsel_mask	= S2MPS11_BUCK_VSEL_MASK,		\421	.enable_reg	= S2MPS11_REG_B6CTRL1 + (num - 6) * 2,	\422	.enable_mask	= S2MPS11_ENABLE_MASK			\423}424 425#define regulator_desc_s2mps11_buck9 {				\426	.name		= "BUCK9",				\427	.id		= S2MPS11_BUCK9,			\428	.ops		= &s2mps11_buck_ops,			\429	.type		= REGULATOR_VOLTAGE,			\430	.owner		= THIS_MODULE,				\431	.min_uV		= MIN_3000_MV,				\432	.uV_step	= STEP_25_MV,				\433	.n_voltages	= S2MPS11_BUCK9_N_VOLTAGES,		\434	.ramp_delay	= S2MPS11_RAMP_DELAY,			\435	.vsel_reg	= S2MPS11_REG_B9CTRL2,			\436	.vsel_mask	= S2MPS11_BUCK9_VSEL_MASK,		\437	.enable_reg	= S2MPS11_REG_B9CTRL1,			\438	.enable_mask	= S2MPS11_ENABLE_MASK			\439}440 441static const struct regulator_desc s2mps11_regulators[] = {442	regulator_desc_s2mps11_ldo(1, STEP_25_MV),443	regulator_desc_s2mps11_ldo(2, STEP_50_MV),444	regulator_desc_s2mps11_ldo(3, STEP_50_MV),445	regulator_desc_s2mps11_ldo(4, STEP_50_MV),446	regulator_desc_s2mps11_ldo(5, STEP_50_MV),447	regulator_desc_s2mps11_ldo(6, STEP_25_MV),448	regulator_desc_s2mps11_ldo(7, STEP_50_MV),449	regulator_desc_s2mps11_ldo(8, STEP_50_MV),450	regulator_desc_s2mps11_ldo(9, STEP_50_MV),451	regulator_desc_s2mps11_ldo(10, STEP_50_MV),452	regulator_desc_s2mps11_ldo(11, STEP_25_MV),453	regulator_desc_s2mps11_ldo(12, STEP_50_MV),454	regulator_desc_s2mps11_ldo(13, STEP_50_MV),455	regulator_desc_s2mps11_ldo(14, STEP_50_MV),456	regulator_desc_s2mps11_ldo(15, STEP_50_MV),457	regulator_desc_s2mps11_ldo(16, STEP_50_MV),458	regulator_desc_s2mps11_ldo(17, STEP_50_MV),459	regulator_desc_s2mps11_ldo(18, STEP_50_MV),460	regulator_desc_s2mps11_ldo(19, STEP_50_MV),461	regulator_desc_s2mps11_ldo(20, STEP_50_MV),462	regulator_desc_s2mps11_ldo(21, STEP_50_MV),463	regulator_desc_s2mps11_ldo(22, STEP_25_MV),464	regulator_desc_s2mps11_ldo(23, STEP_25_MV),465	regulator_desc_s2mps11_ldo(24, STEP_50_MV),466	regulator_desc_s2mps11_ldo(25, STEP_50_MV),467	regulator_desc_s2mps11_ldo(26, STEP_50_MV),468	regulator_desc_s2mps11_ldo(27, STEP_25_MV),469	regulator_desc_s2mps11_ldo(28, STEP_50_MV),470	regulator_desc_s2mps11_ldo(29, STEP_50_MV),471	regulator_desc_s2mps11_ldo(30, STEP_50_MV),472	regulator_desc_s2mps11_ldo(31, STEP_50_MV),473	regulator_desc_s2mps11_ldo(32, STEP_50_MV),474	regulator_desc_s2mps11_ldo(33, STEP_50_MV),475	regulator_desc_s2mps11_ldo(34, STEP_50_MV),476	regulator_desc_s2mps11_ldo(35, STEP_25_MV),477	regulator_desc_s2mps11_ldo(36, STEP_50_MV),478	regulator_desc_s2mps11_ldo(37, STEP_50_MV),479	regulator_desc_s2mps11_ldo(38, STEP_50_MV),480	regulator_desc_s2mps11_buck1_4(1),481	regulator_desc_s2mps11_buck1_4(2),482	regulator_desc_s2mps11_buck1_4(3),483	regulator_desc_s2mps11_buck1_4(4),484	regulator_desc_s2mps11_buck5,485	regulator_desc_s2mps11_buck67810(6, MIN_650_MV, STEP_6_25_MV, 8,486					 S2MPS11_BUCK12346_N_VOLTAGES),487	regulator_desc_s2mps11_buck67810(7, MIN_750_MV, STEP_12_5_MV, 0,488					 S2MPS11_BUCK7810_N_VOLTAGES),489	regulator_desc_s2mps11_buck67810(8, MIN_750_MV, STEP_12_5_MV, 0,490					 S2MPS11_BUCK7810_N_VOLTAGES),491	regulator_desc_s2mps11_buck9,492	regulator_desc_s2mps11_buck67810(10, MIN_750_MV, STEP_12_5_MV, 0,493					 S2MPS11_BUCK7810_N_VOLTAGES),494};495 496static const struct regulator_ops s2mps14_reg_ops;497 498#define regulator_desc_s2mps13_ldo(num, min, step, min_sel) {	\499	.name		= "LDO"#num,				\500	.id		= S2MPS13_LDO##num,			\501	.ops		= &s2mps14_reg_ops,			\502	.type		= REGULATOR_VOLTAGE,			\503	.owner		= THIS_MODULE,				\504	.min_uV		= min,					\505	.uV_step	= step,					\506	.linear_min_sel	= min_sel,				\507	.n_voltages	= S2MPS14_LDO_N_VOLTAGES,		\508	.vsel_reg	= S2MPS13_REG_L1CTRL + num - 1,		\509	.vsel_mask	= S2MPS14_LDO_VSEL_MASK,		\510	.enable_reg	= S2MPS13_REG_L1CTRL + num - 1,		\511	.enable_mask	= S2MPS14_ENABLE_MASK			\512}513 514#define regulator_desc_s2mps13_buck(num, min, step, min_sel) {	\515	.name		= "BUCK"#num,				\516	.id		= S2MPS13_BUCK##num,			\517	.ops		= &s2mps14_reg_ops,			\518	.type		= REGULATOR_VOLTAGE,			\519	.owner		= THIS_MODULE,				\520	.min_uV		= min,					\521	.uV_step	= step,					\522	.linear_min_sel	= min_sel,				\523	.n_voltages	= S2MPS14_BUCK_N_VOLTAGES,		\524	.ramp_delay	= S2MPS13_BUCK_RAMP_DELAY,		\525	.vsel_reg	= S2MPS13_REG_B1OUT + (num - 1) * 2,	\526	.vsel_mask	= S2MPS14_BUCK_VSEL_MASK,		\527	.enable_reg	= S2MPS13_REG_B1CTRL + (num - 1) * 2,	\528	.enable_mask	= S2MPS14_ENABLE_MASK			\529}530 531#define regulator_desc_s2mps13_buck7(num, min, step, min_sel) {	\532	.name		= "BUCK"#num,				\533	.id		= S2MPS13_BUCK##num,			\534	.ops		= &s2mps14_reg_ops,			\535	.type		= REGULATOR_VOLTAGE,			\536	.owner		= THIS_MODULE,				\537	.min_uV		= min,					\538	.uV_step	= step,					\539	.linear_min_sel	= min_sel,				\540	.n_voltages	= S2MPS14_BUCK_N_VOLTAGES,		\541	.ramp_delay	= S2MPS13_BUCK_RAMP_DELAY,		\542	.vsel_reg	= S2MPS13_REG_B1OUT + (num) * 2 - 1,	\543	.vsel_mask	= S2MPS14_BUCK_VSEL_MASK,		\544	.enable_reg	= S2MPS13_REG_B1CTRL + (num - 1) * 2,	\545	.enable_mask	= S2MPS14_ENABLE_MASK			\546}547 548#define regulator_desc_s2mps13_buck8_10(num, min, step, min_sel) {	\549	.name		= "BUCK"#num,				\550	.id		= S2MPS13_BUCK##num,			\551	.ops		= &s2mps14_reg_ops,			\552	.type		= REGULATOR_VOLTAGE,			\553	.owner		= THIS_MODULE,				\554	.min_uV		= min,					\555	.uV_step	= step,					\556	.linear_min_sel	= min_sel,				\557	.n_voltages	= S2MPS14_BUCK_N_VOLTAGES,		\558	.ramp_delay	= S2MPS13_BUCK_RAMP_DELAY,		\559	.vsel_reg	= S2MPS13_REG_B1OUT + (num) * 2 - 1,	\560	.vsel_mask	= S2MPS14_BUCK_VSEL_MASK,		\561	.enable_reg	= S2MPS13_REG_B1CTRL + (num) * 2 - 1,	\562	.enable_mask	= S2MPS14_ENABLE_MASK			\563}564 565static const struct regulator_desc s2mps13_regulators[] = {566	regulator_desc_s2mps13_ldo(1,  MIN_800_MV,  STEP_12_5_MV, 0x00),567	regulator_desc_s2mps13_ldo(2,  MIN_1400_MV, STEP_50_MV,   0x0C),568	regulator_desc_s2mps13_ldo(3,  MIN_1000_MV, STEP_25_MV,   0x08),569	regulator_desc_s2mps13_ldo(4,  MIN_800_MV,  STEP_12_5_MV, 0x00),570	regulator_desc_s2mps13_ldo(5,  MIN_800_MV,  STEP_12_5_MV, 0x00),571	regulator_desc_s2mps13_ldo(6,  MIN_800_MV,  STEP_12_5_MV, 0x00),572	regulator_desc_s2mps13_ldo(7,  MIN_1000_MV, STEP_25_MV,   0x08),573	regulator_desc_s2mps13_ldo(8,  MIN_1000_MV, STEP_25_MV,   0x08),574	regulator_desc_s2mps13_ldo(9,  MIN_1000_MV, STEP_25_MV,   0x08),575	regulator_desc_s2mps13_ldo(10, MIN_1400_MV, STEP_50_MV,   0x0C),576	regulator_desc_s2mps13_ldo(11, MIN_800_MV,  STEP_25_MV,   0x10),577	regulator_desc_s2mps13_ldo(12, MIN_800_MV,  STEP_25_MV,   0x10),578	regulator_desc_s2mps13_ldo(13, MIN_800_MV,  STEP_25_MV,   0x10),579	regulator_desc_s2mps13_ldo(14, MIN_800_MV,  STEP_12_5_MV, 0x00),580	regulator_desc_s2mps13_ldo(15, MIN_800_MV,  STEP_12_5_MV, 0x00),581	regulator_desc_s2mps13_ldo(16, MIN_1400_MV, STEP_50_MV,   0x0C),582	regulator_desc_s2mps13_ldo(17, MIN_1400_MV, STEP_50_MV,   0x0C),583	regulator_desc_s2mps13_ldo(18, MIN_1000_MV, STEP_25_MV,   0x08),584	regulator_desc_s2mps13_ldo(19, MIN_1000_MV, STEP_25_MV,   0x08),585	regulator_desc_s2mps13_ldo(20, MIN_1400_MV, STEP_50_MV,   0x0C),586	regulator_desc_s2mps13_ldo(21, MIN_1000_MV, STEP_25_MV,   0x08),587	regulator_desc_s2mps13_ldo(22, MIN_1000_MV, STEP_25_MV,   0x08),588	regulator_desc_s2mps13_ldo(23, MIN_800_MV,  STEP_12_5_MV, 0x00),589	regulator_desc_s2mps13_ldo(24, MIN_800_MV,  STEP_12_5_MV, 0x00),590	regulator_desc_s2mps13_ldo(25, MIN_1400_MV, STEP_50_MV,   0x0C),591	regulator_desc_s2mps13_ldo(26, MIN_1400_MV, STEP_50_MV,   0x0C),592	regulator_desc_s2mps13_ldo(27, MIN_1400_MV, STEP_50_MV,   0x0C),593	regulator_desc_s2mps13_ldo(28, MIN_1000_MV, STEP_25_MV,   0x08),594	regulator_desc_s2mps13_ldo(29, MIN_1400_MV, STEP_50_MV,   0x0C),595	regulator_desc_s2mps13_ldo(30, MIN_1400_MV, STEP_50_MV,   0x0C),596	regulator_desc_s2mps13_ldo(31, MIN_1000_MV, STEP_25_MV,   0x08),597	regulator_desc_s2mps13_ldo(32, MIN_1000_MV, STEP_25_MV,   0x08),598	regulator_desc_s2mps13_ldo(33, MIN_1400_MV, STEP_50_MV,   0x0C),599	regulator_desc_s2mps13_ldo(34, MIN_1000_MV, STEP_25_MV,   0x08),600	regulator_desc_s2mps13_ldo(35, MIN_1400_MV, STEP_50_MV,   0x0C),601	regulator_desc_s2mps13_ldo(36, MIN_800_MV,  STEP_12_5_MV, 0x00),602	regulator_desc_s2mps13_ldo(37, MIN_1000_MV, STEP_25_MV,   0x08),603	regulator_desc_s2mps13_ldo(38, MIN_1400_MV, STEP_50_MV,   0x0C),604	regulator_desc_s2mps13_ldo(39, MIN_1000_MV, STEP_25_MV,   0x08),605	regulator_desc_s2mps13_ldo(40, MIN_1400_MV, STEP_50_MV,   0x0C),606	regulator_desc_s2mps13_buck(1,  MIN_500_MV,  STEP_6_25_MV, 0x10),607	regulator_desc_s2mps13_buck(2,  MIN_500_MV,  STEP_6_25_MV, 0x10),608	regulator_desc_s2mps13_buck(3,  MIN_500_MV,  STEP_6_25_MV, 0x10),609	regulator_desc_s2mps13_buck(4,  MIN_500_MV,  STEP_6_25_MV, 0x10),610	regulator_desc_s2mps13_buck(5,  MIN_500_MV,  STEP_6_25_MV, 0x10),611	regulator_desc_s2mps13_buck(6,  MIN_500_MV,  STEP_6_25_MV, 0x10),612	regulator_desc_s2mps13_buck7(7,  MIN_500_MV,  STEP_6_25_MV, 0x10),613	regulator_desc_s2mps13_buck8_10(8,  MIN_1000_MV, STEP_12_5_MV, 0x20),614	regulator_desc_s2mps13_buck8_10(9,  MIN_1000_MV, STEP_12_5_MV, 0x20),615	regulator_desc_s2mps13_buck8_10(10, MIN_500_MV,  STEP_6_25_MV, 0x10),616};617 618static const struct regulator_ops s2mps14_reg_ops = {619	.list_voltage		= regulator_list_voltage_linear,620	.map_voltage		= regulator_map_voltage_linear,621	.is_enabled		= regulator_is_enabled_regmap,622	.enable			= s2mps11_regulator_enable,623	.disable		= regulator_disable_regmap,624	.get_voltage_sel	= regulator_get_voltage_sel_regmap,625	.set_voltage_sel	= regulator_set_voltage_sel_regmap,626	.set_voltage_time_sel	= regulator_set_voltage_time_sel,627	.set_suspend_disable	= s2mps11_regulator_set_suspend_disable,628};629 630#define regulator_desc_s2mps14_ldo(num, min, step) {	\631	.name		= "LDO"#num,			\632	.id		= S2MPS14_LDO##num,		\633	.ops		= &s2mps14_reg_ops,		\634	.type		= REGULATOR_VOLTAGE,		\635	.owner		= THIS_MODULE,			\636	.min_uV		= min,				\637	.uV_step	= step,				\638	.n_voltages	= S2MPS14_LDO_N_VOLTAGES,	\639	.vsel_reg	= S2MPS14_REG_L1CTRL + num - 1,	\640	.vsel_mask	= S2MPS14_LDO_VSEL_MASK,	\641	.enable_reg	= S2MPS14_REG_L1CTRL + num - 1,	\642	.enable_mask	= S2MPS14_ENABLE_MASK		\643}644 645#define regulator_desc_s2mps14_buck(num, min, step, min_sel) {	\646	.name		= "BUCK"#num,				\647	.id		= S2MPS14_BUCK##num,			\648	.ops		= &s2mps14_reg_ops,			\649	.type		= REGULATOR_VOLTAGE,			\650	.owner		= THIS_MODULE,				\651	.min_uV		= min,					\652	.uV_step	= step,					\653	.n_voltages	= S2MPS14_BUCK_N_VOLTAGES,		\654	.linear_min_sel = min_sel,				\655	.ramp_delay	= S2MPS14_BUCK_RAMP_DELAY,		\656	.vsel_reg	= S2MPS14_REG_B1CTRL2 + (num - 1) * 2,	\657	.vsel_mask	= S2MPS14_BUCK_VSEL_MASK,		\658	.enable_reg	= S2MPS14_REG_B1CTRL1 + (num - 1) * 2,	\659	.enable_mask	= S2MPS14_ENABLE_MASK			\660}661 662static const struct regulator_desc s2mps14_regulators[] = {663	regulator_desc_s2mps14_ldo(1, MIN_800_MV, STEP_12_5_MV),664	regulator_desc_s2mps14_ldo(2, MIN_800_MV, STEP_12_5_MV),665	regulator_desc_s2mps14_ldo(3, MIN_800_MV, STEP_25_MV),666	regulator_desc_s2mps14_ldo(4, MIN_800_MV, STEP_25_MV),667	regulator_desc_s2mps14_ldo(5, MIN_800_MV, STEP_12_5_MV),668	regulator_desc_s2mps14_ldo(6, MIN_800_MV, STEP_12_5_MV),669	regulator_desc_s2mps14_ldo(7, MIN_800_MV, STEP_25_MV),670	regulator_desc_s2mps14_ldo(8, MIN_1800_MV, STEP_25_MV),671	regulator_desc_s2mps14_ldo(9, MIN_800_MV, STEP_12_5_MV),672	regulator_desc_s2mps14_ldo(10, MIN_800_MV, STEP_12_5_MV),673	regulator_desc_s2mps14_ldo(11, MIN_800_MV, STEP_25_MV),674	regulator_desc_s2mps14_ldo(12, MIN_1800_MV, STEP_25_MV),675	regulator_desc_s2mps14_ldo(13, MIN_1800_MV, STEP_25_MV),676	regulator_desc_s2mps14_ldo(14, MIN_1800_MV, STEP_25_MV),677	regulator_desc_s2mps14_ldo(15, MIN_1800_MV, STEP_25_MV),678	regulator_desc_s2mps14_ldo(16, MIN_1800_MV, STEP_25_MV),679	regulator_desc_s2mps14_ldo(17, MIN_1800_MV, STEP_25_MV),680	regulator_desc_s2mps14_ldo(18, MIN_1800_MV, STEP_25_MV),681	regulator_desc_s2mps14_ldo(19, MIN_800_MV, STEP_25_MV),682	regulator_desc_s2mps14_ldo(20, MIN_800_MV, STEP_25_MV),683	regulator_desc_s2mps14_ldo(21, MIN_800_MV, STEP_25_MV),684	regulator_desc_s2mps14_ldo(22, MIN_800_MV, STEP_12_5_MV),685	regulator_desc_s2mps14_ldo(23, MIN_800_MV, STEP_25_MV),686	regulator_desc_s2mps14_ldo(24, MIN_1800_MV, STEP_25_MV),687	regulator_desc_s2mps14_ldo(25, MIN_1800_MV, STEP_25_MV),688	regulator_desc_s2mps14_buck(1, MIN_600_MV, STEP_6_25_MV,689				    S2MPS14_BUCK1235_START_SEL),690	regulator_desc_s2mps14_buck(2, MIN_600_MV, STEP_6_25_MV,691				    S2MPS14_BUCK1235_START_SEL),692	regulator_desc_s2mps14_buck(3, MIN_600_MV, STEP_6_25_MV,693				    S2MPS14_BUCK1235_START_SEL),694	regulator_desc_s2mps14_buck(4, MIN_1400_MV, STEP_12_5_MV,695				    S2MPS14_BUCK4_START_SEL),696	regulator_desc_s2mps14_buck(5, MIN_600_MV, STEP_6_25_MV,697				    S2MPS14_BUCK1235_START_SEL),698};699 700static const struct regulator_ops s2mps15_reg_ldo_ops = {701	.list_voltage		= regulator_list_voltage_linear_range,702	.map_voltage		= regulator_map_voltage_linear_range,703	.is_enabled		= regulator_is_enabled_regmap,704	.enable			= regulator_enable_regmap,705	.disable		= regulator_disable_regmap,706	.get_voltage_sel	= regulator_get_voltage_sel_regmap,707	.set_voltage_sel	= regulator_set_voltage_sel_regmap,708};709 710static const struct regulator_ops s2mps15_reg_buck_ops = {711	.list_voltage		= regulator_list_voltage_linear_range,712	.map_voltage		= regulator_map_voltage_linear_range,713	.is_enabled		= regulator_is_enabled_regmap,714	.enable			= regulator_enable_regmap,715	.disable		= regulator_disable_regmap,716	.get_voltage_sel	= regulator_get_voltage_sel_regmap,717	.set_voltage_sel	= regulator_set_voltage_sel_regmap,718	.set_voltage_time_sel	= regulator_set_voltage_time_sel,719};720 721#define regulator_desc_s2mps15_ldo(num, range) {	\722	.name		= "LDO"#num,			\723	.id		= S2MPS15_LDO##num,		\724	.ops		= &s2mps15_reg_ldo_ops,		\725	.type		= REGULATOR_VOLTAGE,		\726	.owner		= THIS_MODULE,			\727	.linear_ranges	= range,			\728	.n_linear_ranges = ARRAY_SIZE(range),		\729	.n_voltages	= S2MPS15_LDO_N_VOLTAGES,	\730	.vsel_reg	= S2MPS15_REG_L1CTRL + num - 1,	\731	.vsel_mask	= S2MPS15_LDO_VSEL_MASK,	\732	.enable_reg	= S2MPS15_REG_L1CTRL + num - 1,	\733	.enable_mask	= S2MPS15_ENABLE_MASK		\734}735 736#define regulator_desc_s2mps15_buck(num, range) {			\737	.name		= "BUCK"#num,					\738	.id		= S2MPS15_BUCK##num,				\739	.ops		= &s2mps15_reg_buck_ops,			\740	.type		= REGULATOR_VOLTAGE,				\741	.owner		= THIS_MODULE,					\742	.linear_ranges	= range,					\743	.n_linear_ranges = ARRAY_SIZE(range),				\744	.ramp_delay	= 12500,					\745	.n_voltages	= S2MPS15_BUCK_N_VOLTAGES,			\746	.vsel_reg	= S2MPS15_REG_B1CTRL2 + ((num - 1) * 2),	\747	.vsel_mask	= S2MPS15_BUCK_VSEL_MASK,			\748	.enable_reg	= S2MPS15_REG_B1CTRL1 + ((num - 1) * 2),	\749	.enable_mask	= S2MPS15_ENABLE_MASK				\750}751 752/* voltage range for s2mps15 LDO 3, 5, 15, 16, 18, 20, 23 and 27 */753static const struct linear_range s2mps15_ldo_voltage_ranges1[] = {754	REGULATOR_LINEAR_RANGE(1000000, 0xc, 0x38, 25000),755};756 757/* voltage range for s2mps15 LDO 2, 6, 14, 17, 19, 21, 24 and 25 */758static const struct linear_range s2mps15_ldo_voltage_ranges2[] = {759	REGULATOR_LINEAR_RANGE(1800000, 0x0, 0x3f, 25000),760};761 762/* voltage range for s2mps15 LDO 4, 11, 12, 13, 22 and 26 */763static const struct linear_range s2mps15_ldo_voltage_ranges3[] = {764	REGULATOR_LINEAR_RANGE(700000, 0x0, 0x34, 12500),765};766 767/* voltage range for s2mps15 LDO 7, 8, 9 and 10 */768static const struct linear_range s2mps15_ldo_voltage_ranges4[] = {769	REGULATOR_LINEAR_RANGE(700000, 0x10, 0x20, 25000),770};771 772/* voltage range for s2mps15 LDO 1 */773static const struct linear_range s2mps15_ldo_voltage_ranges5[] = {774	REGULATOR_LINEAR_RANGE(500000, 0x0, 0x20, 12500),775};776 777/* voltage range for s2mps15 BUCK 1, 2, 3, 4, 5, 6 and 7 */778static const struct linear_range s2mps15_buck_voltage_ranges1[] = {779	REGULATOR_LINEAR_RANGE(500000, 0x20, 0xc0, 6250),780};781 782/* voltage range for s2mps15 BUCK 8, 9 and 10 */783static const struct linear_range s2mps15_buck_voltage_ranges2[] = {784	REGULATOR_LINEAR_RANGE(1000000, 0x20, 0x78, 12500),785};786 787static const struct regulator_desc s2mps15_regulators[] = {788	regulator_desc_s2mps15_ldo(1, s2mps15_ldo_voltage_ranges5),789	regulator_desc_s2mps15_ldo(2, s2mps15_ldo_voltage_ranges2),790	regulator_desc_s2mps15_ldo(3, s2mps15_ldo_voltage_ranges1),791	regulator_desc_s2mps15_ldo(4, s2mps15_ldo_voltage_ranges3),792	regulator_desc_s2mps15_ldo(5, s2mps15_ldo_voltage_ranges1),793	regulator_desc_s2mps15_ldo(6, s2mps15_ldo_voltage_ranges2),794	regulator_desc_s2mps15_ldo(7, s2mps15_ldo_voltage_ranges4),795	regulator_desc_s2mps15_ldo(8, s2mps15_ldo_voltage_ranges4),796	regulator_desc_s2mps15_ldo(9, s2mps15_ldo_voltage_ranges4),797	regulator_desc_s2mps15_ldo(10, s2mps15_ldo_voltage_ranges4),798	regulator_desc_s2mps15_ldo(11, s2mps15_ldo_voltage_ranges3),799	regulator_desc_s2mps15_ldo(12, s2mps15_ldo_voltage_ranges3),800	regulator_desc_s2mps15_ldo(13, s2mps15_ldo_voltage_ranges3),801	regulator_desc_s2mps15_ldo(14, s2mps15_ldo_voltage_ranges2),802	regulator_desc_s2mps15_ldo(15, s2mps15_ldo_voltage_ranges1),803	regulator_desc_s2mps15_ldo(16, s2mps15_ldo_voltage_ranges1),804	regulator_desc_s2mps15_ldo(17, s2mps15_ldo_voltage_ranges2),805	regulator_desc_s2mps15_ldo(18, s2mps15_ldo_voltage_ranges1),806	regulator_desc_s2mps15_ldo(19, s2mps15_ldo_voltage_ranges2),807	regulator_desc_s2mps15_ldo(20, s2mps15_ldo_voltage_ranges1),808	regulator_desc_s2mps15_ldo(21, s2mps15_ldo_voltage_ranges2),809	regulator_desc_s2mps15_ldo(22, s2mps15_ldo_voltage_ranges3),810	regulator_desc_s2mps15_ldo(23, s2mps15_ldo_voltage_ranges1),811	regulator_desc_s2mps15_ldo(24, s2mps15_ldo_voltage_ranges2),812	regulator_desc_s2mps15_ldo(25, s2mps15_ldo_voltage_ranges2),813	regulator_desc_s2mps15_ldo(26, s2mps15_ldo_voltage_ranges3),814	regulator_desc_s2mps15_ldo(27, s2mps15_ldo_voltage_ranges1),815	regulator_desc_s2mps15_buck(1, s2mps15_buck_voltage_ranges1),816	regulator_desc_s2mps15_buck(2, s2mps15_buck_voltage_ranges1),817	regulator_desc_s2mps15_buck(3, s2mps15_buck_voltage_ranges1),818	regulator_desc_s2mps15_buck(4, s2mps15_buck_voltage_ranges1),819	regulator_desc_s2mps15_buck(5, s2mps15_buck_voltage_ranges1),820	regulator_desc_s2mps15_buck(6, s2mps15_buck_voltage_ranges1),821	regulator_desc_s2mps15_buck(7, s2mps15_buck_voltage_ranges1),822	regulator_desc_s2mps15_buck(8, s2mps15_buck_voltage_ranges2),823	regulator_desc_s2mps15_buck(9, s2mps15_buck_voltage_ranges2),824	regulator_desc_s2mps15_buck(10, s2mps15_buck_voltage_ranges2),825};826 827static int s2mps14_pmic_enable_ext_control(struct s2mps11_info *s2mps11,828		struct regulator_dev *rdev)829{830	return regmap_update_bits(rdev->regmap, rdev->desc->enable_reg,831			rdev->desc->enable_mask, S2MPS14_ENABLE_EXT_CONTROL);832}833 834static void s2mps14_pmic_dt_parse_ext_control_gpio(struct platform_device *pdev,835		struct of_regulator_match *rdata, struct s2mps11_info *s2mps11)836{837	struct gpio_desc **gpio = s2mps11->ext_control_gpiod;838	unsigned int i;839	unsigned int valid_regulators[3] = { S2MPS14_LDO10, S2MPS14_LDO11,840		S2MPS14_LDO12 };841 842	for (i = 0; i < ARRAY_SIZE(valid_regulators); i++) {843		unsigned int reg = valid_regulators[i];844 845		if (!rdata[reg].init_data || !rdata[reg].of_node)846			continue;847 848		gpio[reg] = devm_fwnode_gpiod_get(&pdev->dev,849				of_fwnode_handle(rdata[reg].of_node),850				"samsung,ext-control",851				GPIOD_OUT_HIGH | GPIOD_FLAGS_BIT_NONEXCLUSIVE,852				"s2mps11-regulator");853		if (PTR_ERR(gpio[reg]) == -ENOENT)854			gpio[reg] = NULL;855		else if (IS_ERR(gpio[reg])) {856			dev_err(&pdev->dev, "Failed to get control GPIO for %d/%s\n",857				reg, rdata[reg].name);858			gpio[reg] = NULL;859			continue;860		}861		if (gpio[reg])862			dev_dbg(&pdev->dev, "Using GPIO for ext-control over %d/%s\n",863				reg, rdata[reg].name);864	}865}866 867static int s2mps11_pmic_dt_parse(struct platform_device *pdev,868		struct of_regulator_match *rdata, struct s2mps11_info *s2mps11,869		unsigned int rdev_num)870{871	struct device_node *reg_np;872 873	reg_np = of_get_child_by_name(pdev->dev.parent->of_node, "regulators");874	if (!reg_np) {875		dev_err(&pdev->dev, "could not find regulators sub-node\n");876		return -EINVAL;877	}878 879	of_regulator_match(&pdev->dev, reg_np, rdata, rdev_num);880	if (s2mps11->dev_type == S2MPS14X)881		s2mps14_pmic_dt_parse_ext_control_gpio(pdev, rdata, s2mps11);882 883	of_node_put(reg_np);884 885	return 0;886}887 888static int s2mpu02_set_ramp_delay(struct regulator_dev *rdev, int ramp_delay)889{890	unsigned int ramp_val, ramp_shift, ramp_reg;891	int rdev_id = rdev_get_id(rdev);892 893	switch (rdev_id) {894	case S2MPU02_BUCK1:895		ramp_shift = S2MPU02_BUCK1_RAMP_SHIFT;896		break;897	case S2MPU02_BUCK2:898		ramp_shift = S2MPU02_BUCK2_RAMP_SHIFT;899		break;900	case S2MPU02_BUCK3:901		ramp_shift = S2MPU02_BUCK3_RAMP_SHIFT;902		break;903	case S2MPU02_BUCK4:904		ramp_shift = S2MPU02_BUCK4_RAMP_SHIFT;905		break;906	default:907		return 0;908	}909	ramp_reg = S2MPU02_REG_RAMP1;910	ramp_val = get_ramp_delay(ramp_delay);911 912	return regmap_update_bits(rdev->regmap, ramp_reg,913				  S2MPU02_BUCK1234_RAMP_MASK << ramp_shift,914				  ramp_val << ramp_shift);915}916 917static const struct regulator_ops s2mpu02_ldo_ops = {918	.list_voltage		= regulator_list_voltage_linear,919	.map_voltage		= regulator_map_voltage_linear,920	.is_enabled		= regulator_is_enabled_regmap,921	.enable			= s2mps11_regulator_enable,922	.disable		= regulator_disable_regmap,923	.get_voltage_sel	= regulator_get_voltage_sel_regmap,924	.set_voltage_sel	= regulator_set_voltage_sel_regmap,925	.set_voltage_time_sel	= regulator_set_voltage_time_sel,926	.set_suspend_disable	= s2mps11_regulator_set_suspend_disable,927};928 929static const struct regulator_ops s2mpu02_buck_ops = {930	.list_voltage		= regulator_list_voltage_linear,931	.map_voltage		= regulator_map_voltage_linear,932	.is_enabled		= regulator_is_enabled_regmap,933	.enable			= s2mps11_regulator_enable,934	.disable		= regulator_disable_regmap,935	.get_voltage_sel	= regulator_get_voltage_sel_regmap,936	.set_voltage_sel	= regulator_set_voltage_sel_regmap,937	.set_voltage_time_sel	= regulator_set_voltage_time_sel,938	.set_suspend_disable	= s2mps11_regulator_set_suspend_disable,939	.set_ramp_delay		= s2mpu02_set_ramp_delay,940};941 942#define regulator_desc_s2mpu02_ldo1(num) {		\943	.name		= "LDO"#num,			\944	.id		= S2MPU02_LDO##num,		\945	.ops		= &s2mpu02_ldo_ops,		\946	.type		= REGULATOR_VOLTAGE,		\947	.owner		= THIS_MODULE,			\948	.min_uV		= S2MPU02_LDO_MIN_900MV,	\949	.uV_step	= S2MPU02_LDO_STEP_12_5MV,	\950	.linear_min_sel	= S2MPU02_LDO_GROUP1_START_SEL,	\951	.n_voltages	= S2MPU02_LDO_N_VOLTAGES,	\952	.vsel_reg	= S2MPU02_REG_L1CTRL,		\953	.vsel_mask	= S2MPU02_LDO_VSEL_MASK,	\954	.enable_reg	= S2MPU02_REG_L1CTRL,		\955	.enable_mask	= S2MPU02_ENABLE_MASK		\956}957#define regulator_desc_s2mpu02_ldo2(num) {		\958	.name		= "LDO"#num,			\959	.id		= S2MPU02_LDO##num,		\960	.ops		= &s2mpu02_ldo_ops,		\961	.type		= REGULATOR_VOLTAGE,		\962	.owner		= THIS_MODULE,			\963	.min_uV		= S2MPU02_LDO_MIN_1050MV,	\964	.uV_step	= S2MPU02_LDO_STEP_25MV,	\965	.linear_min_sel	= S2MPU02_LDO_GROUP2_START_SEL,	\966	.n_voltages	= S2MPU02_LDO_N_VOLTAGES,	\967	.vsel_reg	= S2MPU02_REG_L2CTRL1,		\968	.vsel_mask	= S2MPU02_LDO_VSEL_MASK,	\969	.enable_reg	= S2MPU02_REG_L2CTRL1,		\970	.enable_mask	= S2MPU02_ENABLE_MASK		\971}972#define regulator_desc_s2mpu02_ldo3(num) {		\973	.name		= "LDO"#num,			\974	.id		= S2MPU02_LDO##num,		\975	.ops		= &s2mpu02_ldo_ops,		\976	.type		= REGULATOR_VOLTAGE,		\977	.owner		= THIS_MODULE,			\978	.min_uV		= S2MPU02_LDO_MIN_900MV,	\979	.uV_step	= S2MPU02_LDO_STEP_12_5MV,	\980	.linear_min_sel	= S2MPU02_LDO_GROUP1_START_SEL,	\981	.n_voltages	= S2MPU02_LDO_N_VOLTAGES,	\982	.vsel_reg	= S2MPU02_REG_L3CTRL + num - 3,	\983	.vsel_mask	= S2MPU02_LDO_VSEL_MASK,	\984	.enable_reg	= S2MPU02_REG_L3CTRL + num - 3,	\985	.enable_mask	= S2MPU02_ENABLE_MASK		\986}987#define regulator_desc_s2mpu02_ldo4(num) {		\988	.name		= "LDO"#num,			\989	.id		= S2MPU02_LDO##num,		\990	.ops		= &s2mpu02_ldo_ops,		\991	.type		= REGULATOR_VOLTAGE,		\992	.owner		= THIS_MODULE,			\993	.min_uV		= S2MPU02_LDO_MIN_1050MV,	\994	.uV_step	= S2MPU02_LDO_STEP_25MV,	\995	.linear_min_sel	= S2MPU02_LDO_GROUP2_START_SEL,	\996	.n_voltages	= S2MPU02_LDO_N_VOLTAGES,	\997	.vsel_reg	= S2MPU02_REG_L3CTRL + num - 3,	\998	.vsel_mask	= S2MPU02_LDO_VSEL_MASK,	\999	.enable_reg	= S2MPU02_REG_L3CTRL + num - 3,	\1000	.enable_mask	= S2MPU02_ENABLE_MASK		\1001}1002#define regulator_desc_s2mpu02_ldo5(num) {		\1003	.name		= "LDO"#num,			\1004	.id		= S2MPU02_LDO##num,		\1005	.ops		= &s2mpu02_ldo_ops,		\1006	.type		= REGULATOR_VOLTAGE,		\1007	.owner		= THIS_MODULE,			\1008	.min_uV		= S2MPU02_LDO_MIN_1600MV,	\1009	.uV_step	= S2MPU02_LDO_STEP_50MV,	\1010	.linear_min_sel	= S2MPU02_LDO_GROUP3_START_SEL,	\1011	.n_voltages	= S2MPU02_LDO_N_VOLTAGES,	\1012	.vsel_reg	= S2MPU02_REG_L3CTRL + num - 3,	\1013	.vsel_mask	= S2MPU02_LDO_VSEL_MASK,	\1014	.enable_reg	= S2MPU02_REG_L3CTRL + num - 3,	\1015	.enable_mask	= S2MPU02_ENABLE_MASK		\1016}1017 1018#define regulator_desc_s2mpu02_buck1234(num) {			\1019	.name		= "BUCK"#num,				\1020	.id		= S2MPU02_BUCK##num,			\1021	.ops		= &s2mpu02_buck_ops,			\1022	.type		= REGULATOR_VOLTAGE,			\1023	.owner		= THIS_MODULE,				\1024	.min_uV		= S2MPU02_BUCK1234_MIN_600MV,		\1025	.uV_step	= S2MPU02_BUCK1234_STEP_6_25MV,		\1026	.n_voltages	= S2MPU02_BUCK_N_VOLTAGES,		\1027	.linear_min_sel = S2MPU02_BUCK1234_START_SEL,		\1028	.ramp_delay	= S2MPU02_BUCK_RAMP_DELAY,		\1029	.vsel_reg	= S2MPU02_REG_B1CTRL2 + (num - 1) * 2,	\1030	.vsel_mask	= S2MPU02_BUCK_VSEL_MASK,		\1031	.enable_reg	= S2MPU02_REG_B1CTRL1 + (num - 1) * 2,	\1032	.enable_mask	= S2MPU02_ENABLE_MASK			\1033}1034#define regulator_desc_s2mpu02_buck5(num) {			\1035	.name		= "BUCK"#num,				\1036	.id		= S2MPU02_BUCK##num,			\1037	.ops		= &s2mpu02_ldo_ops,			\1038	.type		= REGULATOR_VOLTAGE,			\1039	.owner		= THIS_MODULE,				\1040	.min_uV		= S2MPU02_BUCK5_MIN_1081_25MV,		\1041	.uV_step	= S2MPU02_BUCK5_STEP_6_25MV,		\1042	.n_voltages	= S2MPU02_BUCK_N_VOLTAGES,		\1043	.linear_min_sel = S2MPU02_BUCK5_START_SEL,		\1044	.ramp_delay	= S2MPU02_BUCK_RAMP_DELAY,		\1045	.vsel_reg	= S2MPU02_REG_B5CTRL2,			\1046	.vsel_mask	= S2MPU02_BUCK_VSEL_MASK,		\1047	.enable_reg	= S2MPU02_REG_B5CTRL1,			\1048	.enable_mask	= S2MPU02_ENABLE_MASK			\1049}1050#define regulator_desc_s2mpu02_buck6(num) {			\1051	.name		= "BUCK"#num,				\1052	.id		= S2MPU02_BUCK##num,			\1053	.ops		= &s2mpu02_ldo_ops,			\1054	.type		= REGULATOR_VOLTAGE,			\1055	.owner		= THIS_MODULE,				\1056	.min_uV		= S2MPU02_BUCK6_MIN_1700MV,		\1057	.uV_step	= S2MPU02_BUCK6_STEP_2_50MV,		\1058	.n_voltages	= S2MPU02_BUCK_N_VOLTAGES,		\1059	.linear_min_sel = S2MPU02_BUCK6_START_SEL,		\1060	.ramp_delay	= S2MPU02_BUCK_RAMP_DELAY,		\1061	.vsel_reg	= S2MPU02_REG_B6CTRL2,			\1062	.vsel_mask	= S2MPU02_BUCK_VSEL_MASK,		\1063	.enable_reg	= S2MPU02_REG_B6CTRL1,			\1064	.enable_mask	= S2MPU02_ENABLE_MASK			\1065}1066#define regulator_desc_s2mpu02_buck7(num) {			\1067	.name		= "BUCK"#num,				\1068	.id		= S2MPU02_BUCK##num,			\1069	.ops		= &s2mpu02_ldo_ops,			\1070	.type		= REGULATOR_VOLTAGE,			\1071	.owner		= THIS_MODULE,				\1072	.min_uV		= S2MPU02_BUCK7_MIN_900MV,		\1073	.uV_step	= S2MPU02_BUCK7_STEP_6_25MV,		\1074	.n_voltages	= S2MPU02_BUCK_N_VOLTAGES,		\1075	.linear_min_sel = S2MPU02_BUCK7_START_SEL,		\1076	.ramp_delay	= S2MPU02_BUCK_RAMP_DELAY,		\1077	.vsel_reg	= S2MPU02_REG_B7CTRL2,			\1078	.vsel_mask	= S2MPU02_BUCK_VSEL_MASK,		\1079	.enable_reg	= S2MPU02_REG_B7CTRL1,			\1080	.enable_mask	= S2MPU02_ENABLE_MASK			\1081}1082 1083static const struct regulator_desc s2mpu02_regulators[] = {1084	regulator_desc_s2mpu02_ldo1(1),1085	regulator_desc_s2mpu02_ldo2(2),1086	regulator_desc_s2mpu02_ldo4(3),1087	regulator_desc_s2mpu02_ldo5(4),1088	regulator_desc_s2mpu02_ldo4(5),1089	regulator_desc_s2mpu02_ldo3(6),1090	regulator_desc_s2mpu02_ldo3(7),1091	regulator_desc_s2mpu02_ldo4(8),1092	regulator_desc_s2mpu02_ldo5(9),1093	regulator_desc_s2mpu02_ldo3(10),1094	regulator_desc_s2mpu02_ldo4(11),1095	regulator_desc_s2mpu02_ldo5(12),1096	regulator_desc_s2mpu02_ldo5(13),1097	regulator_desc_s2mpu02_ldo5(14),1098	regulator_desc_s2mpu02_ldo5(15),1099	regulator_desc_s2mpu02_ldo5(16),1100	regulator_desc_s2mpu02_ldo4(17),1101	regulator_desc_s2mpu02_ldo5(18),1102	regulator_desc_s2mpu02_ldo3(19),1103	regulator_desc_s2mpu02_ldo4(20),1104	regulator_desc_s2mpu02_ldo5(21),1105	regulator_desc_s2mpu02_ldo5(22),1106	regulator_desc_s2mpu02_ldo5(23),1107	regulator_desc_s2mpu02_ldo4(24),1108	regulator_desc_s2mpu02_ldo5(25),1109	regulator_desc_s2mpu02_ldo4(26),1110	regulator_desc_s2mpu02_ldo5(27),1111	regulator_desc_s2mpu02_ldo5(28),1112	regulator_desc_s2mpu02_buck1234(1),1113	regulator_desc_s2mpu02_buck1234(2),1114	regulator_desc_s2mpu02_buck1234(3),1115	regulator_desc_s2mpu02_buck1234(4),1116	regulator_desc_s2mpu02_buck5(5),1117	regulator_desc_s2mpu02_buck6(6),1118	regulator_desc_s2mpu02_buck7(7),1119};1120 1121static int s2mps11_pmic_probe(struct platform_device *pdev)1122{1123	struct sec_pmic_dev *iodev = dev_get_drvdata(pdev->dev.parent);1124	struct regulator_config config = { };1125	struct s2mps11_info *s2mps11;1126	unsigned int rdev_num = 0;1127	int i, ret = 0;1128	const struct regulator_desc *regulators;1129 1130	s2mps11 = devm_kzalloc(&pdev->dev, sizeof(struct s2mps11_info),1131				GFP_KERNEL);1132	if (!s2mps11)1133		return -ENOMEM;1134 1135	s2mps11->dev_type = platform_get_device_id(pdev)->driver_data;1136	switch (s2mps11->dev_type) {1137	case S2MPS11X:1138		rdev_num = ARRAY_SIZE(s2mps11_regulators);1139		regulators = s2mps11_regulators;1140		BUILD_BUG_ON(S2MPS_REGULATOR_MAX < ARRAY_SIZE(s2mps11_regulators));1141		break;1142	case S2MPS13X:1143		rdev_num = ARRAY_SIZE(s2mps13_regulators);1144		regulators = s2mps13_regulators;1145		BUILD_BUG_ON(S2MPS_REGULATOR_MAX < ARRAY_SIZE(s2mps13_regulators));1146		break;1147	case S2MPS14X:1148		rdev_num = ARRAY_SIZE(s2mps14_regulators);1149		regulators = s2mps14_regulators;1150		BUILD_BUG_ON(S2MPS_REGULATOR_MAX < ARRAY_SIZE(s2mps14_regulators));1151		break;1152	case S2MPS15X:1153		rdev_num = ARRAY_SIZE(s2mps15_regulators);1154		regulators = s2mps15_regulators;1155		BUILD_BUG_ON(S2MPS_REGULATOR_MAX < ARRAY_SIZE(s2mps15_regulators));1156		break;1157	case S2MPU02:1158		rdev_num = ARRAY_SIZE(s2mpu02_regulators);1159		regulators = s2mpu02_regulators;1160		BUILD_BUG_ON(S2MPS_REGULATOR_MAX < ARRAY_SIZE(s2mpu02_regulators));1161		break;1162	default:1163		dev_err(&pdev->dev, "Invalid device type: %u\n",1164				    s2mps11->dev_type);1165		return -EINVAL;1166	}1167 1168	s2mps11->ext_control_gpiod = devm_kcalloc(&pdev->dev, rdev_num,1169			       sizeof(*s2mps11->ext_control_gpiod), GFP_KERNEL);1170	if (!s2mps11->ext_control_gpiod)1171		return -ENOMEM;1172 1173	struct of_regulator_match *rdata __free(kfree) =1174		kcalloc(rdev_num, sizeof(*rdata), GFP_KERNEL);1175	if (!rdata)1176		return -ENOMEM;1177 1178	for (i = 0; i < rdev_num; i++)1179		rdata[i].name = regulators[i].name;1180 1181	ret = s2mps11_pmic_dt_parse(pdev, rdata, s2mps11, rdev_num);1182	if (ret)1183		return ret;1184 1185	platform_set_drvdata(pdev, s2mps11);1186 1187	config.dev = &pdev->dev;1188	config.regmap = iodev->regmap_pmic;1189	config.driver_data = s2mps11;1190	for (i = 0; i < rdev_num; i++) {1191		struct regulator_dev *regulator;1192 1193		config.init_data = rdata[i].init_data;1194		config.of_node = rdata[i].of_node;1195		config.ena_gpiod = s2mps11->ext_control_gpiod[i];1196		/*1197		 * Hand the GPIO descriptor management over to the regulator1198		 * core, remove it from devres management.1199		 */1200		if (config.ena_gpiod)1201			devm_gpiod_unhinge(&pdev->dev, config.ena_gpiod);1202		regulator = devm_regulator_register(&pdev->dev,1203						&regulators[i], &config);1204		if (IS_ERR(regulator)) {1205			dev_err(&pdev->dev, "regulator init failed for %d\n",1206				i);1207			return PTR_ERR(regulator);1208		}1209 1210		if (config.ena_gpiod) {1211			ret = s2mps14_pmic_enable_ext_control(s2mps11,1212					regulator);1213			if (ret < 0) {1214				dev_err(&pdev->dev,1215						"failed to enable GPIO control over %s: %d\n",1216						regulator->desc->name, ret);1217				return ret;1218			}1219		}1220	}1221 1222	return 0;1223}1224 1225static const struct platform_device_id s2mps11_pmic_id[] = {1226	{ "s2mps11-regulator", S2MPS11X},1227	{ "s2mps13-regulator", S2MPS13X},1228	{ "s2mps14-regulator", S2MPS14X},1229	{ "s2mps15-regulator", S2MPS15X},1230	{ "s2mpu02-regulator", S2MPU02},1231	{ },1232};1233MODULE_DEVICE_TABLE(platform, s2mps11_pmic_id);1234 1235static struct platform_driver s2mps11_pmic_driver = {1236	.driver = {1237		.name = "s2mps11-pmic",1238		.probe_type = PROBE_PREFER_ASYNCHRONOUS,1239	},1240	.probe = s2mps11_pmic_probe,1241	.id_table = s2mps11_pmic_id,1242};1243 1244module_platform_driver(s2mps11_pmic_driver);1245 1246/* Module information */1247MODULE_AUTHOR("Sangbeom Kim <sbkim73@samsung.com>");1248MODULE_DESCRIPTION("Samsung S2MPS11/S2MPS14/S2MPS15/S2MPU02 Regulator Driver");1249MODULE_LICENSE("GPL");1250