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1// SPDX-License-Identifier: GPL-2.0-only2/*3 * tps51632-regulator.c -- TI TPS516324 *5 * Regulator driver for TPS51632 3-2-1 Phase D-Cap Step Down Driverless6 * Controller with serial VID control and DVFS.7 *8 * Copyright (c) 2012, NVIDIA Corporation.9 *10 * Author: Laxman Dewangan <ldewangan@nvidia.com>11 */12 13#include <linux/err.h>14#include <linux/i2c.h>15#include <linux/init.h>16#include <linux/kernel.h>17#include <linux/module.h>18#include <linux/of.h>19#include <linux/platform_device.h>20#include <linux/regmap.h>21#include <linux/regulator/driver.h>22#include <linux/regulator/machine.h>23#include <linux/regulator/of_regulator.h>24#include <linux/regulator/tps51632-regulator.h>25#include <linux/slab.h>26 27/* Register definitions */28#define TPS51632_VOLTAGE_SELECT_REG 0x029#define TPS51632_VOLTAGE_BASE_REG 0x130#define TPS51632_OFFSET_REG 0x231#define TPS51632_IMON_REG 0x332#define TPS51632_VMAX_REG 0x433#define TPS51632_DVFS_CONTROL_REG 0x534#define TPS51632_POWER_STATE_REG 0x635#define TPS51632_SLEW_REGS 0x736#define TPS51632_FAULT_REG 0x1437 38#define TPS51632_MAX_REG 0x1539 40#define TPS51632_VOUT_MASK 0x7F41#define TPS51632_VOUT_OFFSET_MASK 0x1F42#define TPS51632_VMAX_MASK 0x7F43#define TPS51632_VMAX_LOCK 0x8044 45/* TPS51632_DVFS_CONTROL_REG */46#define TPS51632_DVFS_PWMEN 0x147#define TPS51632_DVFS_STEP_20 0x248#define TPS51632_DVFS_VMAX_PG 0x449#define TPS51632_DVFS_PWMRST 0x850#define TPS51632_DVFS_OCA_EN 0x1051#define TPS51632_DVFS_FCCM 0x2052 53/* TPS51632_POWER_STATE_REG */54#define TPS51632_POWER_STATE_MASK 0x0355#define TPS51632_POWER_STATE_MULTI_PHASE_CCM 0x056#define TPS51632_POWER_STATE_SINGLE_PHASE_CCM 0x157#define TPS51632_POWER_STATE_SINGLE_PHASE_DCM 0x258 59#define TPS51632_MIN_VOLTAGE 50000060#define TPS51632_MAX_VOLTAGE 152000061#define TPS51632_VOLTAGE_STEP_10mV 1000062#define TPS51632_VOLTAGE_STEP_20mV 2000063#define TPS51632_MAX_VSEL 0x7F64#define TPS51632_MIN_VSEL 0x1965#define TPS51632_DEFAULT_RAMP_DELAY 600066#define TPS51632_VOLT_VSEL(uV) \67 (DIV_ROUND_UP(uV - TPS51632_MIN_VOLTAGE, \68 TPS51632_VOLTAGE_STEP_10mV) + \69 TPS51632_MIN_VSEL)70 71/* TPS51632 chip information */72struct tps51632_chip {73 struct device *dev;74 struct regulator_desc desc;75 struct regulator_dev *rdev;76 struct regmap *regmap;77};78 79static int tps51632_dcdc_set_ramp_delay(struct regulator_dev *rdev,80 int ramp_delay)81{82 struct tps51632_chip *tps = rdev_get_drvdata(rdev);83 int bit;84 int ret;85 86 if (ramp_delay == 0)87 bit = 0;88 else89 bit = DIV_ROUND_UP(ramp_delay, 6000) - 1;90 91 ret = regmap_write(tps->regmap, TPS51632_SLEW_REGS, BIT(bit));92 if (ret < 0)93 dev_err(tps->dev, "SLEW reg write failed, err %d\n", ret);94 return ret;95}96 97static const struct regulator_ops tps51632_dcdc_ops = {98 .get_voltage_sel = regulator_get_voltage_sel_regmap,99 .set_voltage_sel = regulator_set_voltage_sel_regmap,100 .list_voltage = regulator_list_voltage_linear,101 .set_voltage_time_sel = regulator_set_voltage_time_sel,102 .set_ramp_delay = tps51632_dcdc_set_ramp_delay,103};104 105static int tps51632_init_dcdc(struct tps51632_chip *tps,106 struct tps51632_regulator_platform_data *pdata)107{108 int ret;109 uint8_t control = 0;110 int vsel;111 112 if (!pdata->enable_pwm_dvfs)113 goto skip_pwm_config;114 115 control |= TPS51632_DVFS_PWMEN;116 vsel = TPS51632_VOLT_VSEL(pdata->base_voltage_uV);117 ret = regmap_write(tps->regmap, TPS51632_VOLTAGE_BASE_REG, vsel);118 if (ret < 0) {119 dev_err(tps->dev, "BASE reg write failed, err %d\n", ret);120 return ret;121 }122 123 if (pdata->dvfs_step_20mV)124 control |= TPS51632_DVFS_STEP_20;125 126 if (pdata->max_voltage_uV) {127 unsigned int vmax;128 /**129 * TPS51632 hw behavior: VMAX register can be write only130 * once as it get locked after first write. The lock get131 * reset only when device is power-reset.132 * Write register only when lock bit is not enabled.133 */134 ret = regmap_read(tps->regmap, TPS51632_VMAX_REG, &vmax);135 if (ret < 0) {136 dev_err(tps->dev, "VMAX read failed, err %d\n", ret);137 return ret;138 }139 if (!(vmax & TPS51632_VMAX_LOCK)) {140 vsel = TPS51632_VOLT_VSEL(pdata->max_voltage_uV);141 ret = regmap_write(tps->regmap, TPS51632_VMAX_REG,142 vsel);143 if (ret < 0) {144 dev_err(tps->dev,145 "VMAX write failed, err %d\n", ret);146 return ret;147 }148 }149 }150 151skip_pwm_config:152 ret = regmap_write(tps->regmap, TPS51632_DVFS_CONTROL_REG, control);153 if (ret < 0)154 dev_err(tps->dev, "DVFS reg write failed, err %d\n", ret);155 return ret;156}157 158static bool is_volatile_reg(struct device *dev, unsigned int reg)159{160 switch (reg) {161 case TPS51632_OFFSET_REG:162 case TPS51632_FAULT_REG:163 case TPS51632_IMON_REG:164 return true;165 default:166 return false;167 }168}169 170static bool is_read_reg(struct device *dev, unsigned int reg)171{172 switch (reg) {173 case 0x08 ... 0x0F:174 return false;175 default:176 return true;177 }178}179 180static bool is_write_reg(struct device *dev, unsigned int reg)181{182 switch (reg) {183 case TPS51632_VOLTAGE_SELECT_REG:184 case TPS51632_VOLTAGE_BASE_REG:185 case TPS51632_VMAX_REG:186 case TPS51632_DVFS_CONTROL_REG:187 case TPS51632_POWER_STATE_REG:188 case TPS51632_SLEW_REGS:189 return true;190 default:191 return false;192 }193}194 195static const struct regmap_config tps51632_regmap_config = {196 .reg_bits = 8,197 .val_bits = 8,198 .writeable_reg = is_write_reg,199 .readable_reg = is_read_reg,200 .volatile_reg = is_volatile_reg,201 .max_register = TPS51632_MAX_REG - 1,202 .cache_type = REGCACHE_MAPLE,203};204 205#if defined(CONFIG_OF)206static const struct of_device_id tps51632_of_match[] = {207 { .compatible = "ti,tps51632",},208 {},209};210MODULE_DEVICE_TABLE(of, tps51632_of_match);211 212static struct tps51632_regulator_platform_data *213 of_get_tps51632_platform_data(struct device *dev,214 const struct regulator_desc *desc)215{216 struct tps51632_regulator_platform_data *pdata;217 struct device_node *np = dev->of_node;218 219 pdata = devm_kzalloc(dev, sizeof(*pdata), GFP_KERNEL);220 if (!pdata)221 return NULL;222 223 pdata->reg_init_data = of_get_regulator_init_data(dev, dev->of_node,224 desc);225 if (!pdata->reg_init_data) {226 dev_err(dev, "Not able to get OF regulator init data\n");227 return NULL;228 }229 230 pdata->enable_pwm_dvfs =231 of_property_read_bool(np, "ti,enable-pwm-dvfs");232 pdata->dvfs_step_20mV = of_property_read_bool(np, "ti,dvfs-step-20mV");233 234 pdata->base_voltage_uV = pdata->reg_init_data->constraints.min_uV ? :235 TPS51632_MIN_VOLTAGE;236 pdata->max_voltage_uV = pdata->reg_init_data->constraints.max_uV ? :237 TPS51632_MAX_VOLTAGE;238 return pdata;239}240#else241static struct tps51632_regulator_platform_data *242 of_get_tps51632_platform_data(struct device *dev,243 const struct regulator_desc *desc)244{245 return NULL;246}247#endif248 249static int tps51632_probe(struct i2c_client *client)250{251 struct tps51632_regulator_platform_data *pdata;252 struct regulator_dev *rdev;253 struct tps51632_chip *tps;254 int ret;255 struct regulator_config config = { };256 257 tps = devm_kzalloc(&client->dev, sizeof(*tps), GFP_KERNEL);258 if (!tps)259 return -ENOMEM;260 261 tps->dev = &client->dev;262 tps->desc.name = client->name;263 tps->desc.id = 0;264 tps->desc.ramp_delay = TPS51632_DEFAULT_RAMP_DELAY;265 tps->desc.min_uV = TPS51632_MIN_VOLTAGE;266 tps->desc.uV_step = TPS51632_VOLTAGE_STEP_10mV;267 tps->desc.linear_min_sel = TPS51632_MIN_VSEL;268 tps->desc.n_voltages = TPS51632_MAX_VSEL + 1;269 tps->desc.ops = &tps51632_dcdc_ops;270 tps->desc.type = REGULATOR_VOLTAGE;271 tps->desc.owner = THIS_MODULE;272 273 pdata = dev_get_platdata(&client->dev);274 if (!pdata && client->dev.of_node)275 pdata = of_get_tps51632_platform_data(&client->dev, &tps->desc);276 if (!pdata) {277 dev_err(&client->dev, "No Platform data\n");278 return -EINVAL;279 }280 281 if (pdata->enable_pwm_dvfs) {282 if ((pdata->base_voltage_uV < TPS51632_MIN_VOLTAGE) ||283 (pdata->base_voltage_uV > TPS51632_MAX_VOLTAGE)) {284 dev_err(&client->dev, "Invalid base_voltage_uV setting\n");285 return -EINVAL;286 }287 288 if ((pdata->max_voltage_uV) &&289 ((pdata->max_voltage_uV < TPS51632_MIN_VOLTAGE) ||290 (pdata->max_voltage_uV > TPS51632_MAX_VOLTAGE))) {291 dev_err(&client->dev, "Invalid max_voltage_uV setting\n");292 return -EINVAL;293 }294 }295 296 if (pdata->enable_pwm_dvfs)297 tps->desc.vsel_reg = TPS51632_VOLTAGE_BASE_REG;298 else299 tps->desc.vsel_reg = TPS51632_VOLTAGE_SELECT_REG;300 tps->desc.vsel_mask = TPS51632_VOUT_MASK;301 302 tps->regmap = devm_regmap_init_i2c(client, &tps51632_regmap_config);303 if (IS_ERR(tps->regmap)) {304 ret = PTR_ERR(tps->regmap);305 dev_err(&client->dev, "regmap init failed, err %d\n", ret);306 return ret;307 }308 i2c_set_clientdata(client, tps);309 310 ret = tps51632_init_dcdc(tps, pdata);311 if (ret < 0) {312 dev_err(tps->dev, "Init failed, err = %d\n", ret);313 return ret;314 }315 316 /* Register the regulators */317 config.dev = &client->dev;318 config.init_data = pdata->reg_init_data;319 config.driver_data = tps;320 config.regmap = tps->regmap;321 config.of_node = client->dev.of_node;322 323 rdev = devm_regulator_register(&client->dev, &tps->desc, &config);324 if (IS_ERR(rdev)) {325 dev_err(tps->dev, "regulator register failed\n");326 return PTR_ERR(rdev);327 }328 329 tps->rdev = rdev;330 return 0;331}332 333static const struct i2c_device_id tps51632_id[] = {334 {.name = "tps51632",},335 {},336};337 338MODULE_DEVICE_TABLE(i2c, tps51632_id);339 340static struct i2c_driver tps51632_i2c_driver = {341 .driver = {342 .name = "tps51632",343 .probe_type = PROBE_PREFER_ASYNCHRONOUS,344 .of_match_table = of_match_ptr(tps51632_of_match),345 },346 .probe = tps51632_probe,347 .id_table = tps51632_id,348};349 350static int __init tps51632_init(void)351{352 return i2c_add_driver(&tps51632_i2c_driver);353}354subsys_initcall(tps51632_init);355 356static void __exit tps51632_cleanup(void)357{358 i2c_del_driver(&tps51632_i2c_driver);359}360module_exit(tps51632_cleanup);361 362MODULE_AUTHOR("Laxman Dewangan <ldewangan@nvidia.com>");363MODULE_DESCRIPTION("TPS51632 voltage regulator driver");364MODULE_LICENSE("GPL v2");365