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1// SPDX-License-Identifier: GPL-2.0-only2/*3 * ST's Remote Processor Control Driver4 *5 * Copyright (C) 2015 STMicroelectronics - All Rights Reserved6 *7 * Author: Ludovic Barre <ludovic.barre@st.com>8 */9 10#include <linux/clk.h>11#include <linux/dma-mapping.h>12#include <linux/err.h>13#include <linux/interrupt.h>14#include <linux/kernel.h>15#include <linux/mailbox_client.h>16#include <linux/mfd/syscon.h>17#include <linux/module.h>18#include <linux/of.h>19#include <linux/of_reserved_mem.h>20#include <linux/platform_device.h>21#include <linux/property.h>22#include <linux/regmap.h>23#include <linux/remoteproc.h>24#include <linux/reset.h>25 26#include "remoteproc_internal.h"27 28#define ST_RPROC_VQ0 029#define ST_RPROC_VQ1 130#define ST_RPROC_MAX_VRING 231 32#define MBOX_RX 033#define MBOX_TX 134#define MBOX_MAX 235 36struct st_rproc_config {37 bool sw_reset;38 bool pwr_reset;39 unsigned long bootaddr_mask;40};41 42struct st_rproc {43 struct st_rproc_config *config;44 struct reset_control *sw_reset;45 struct reset_control *pwr_reset;46 struct clk *clk;47 u32 clk_rate;48 struct regmap *boot_base;49 u32 boot_offset;50 struct mbox_chan *mbox_chan[ST_RPROC_MAX_VRING * MBOX_MAX];51 struct mbox_client mbox_client_vq0;52 struct mbox_client mbox_client_vq1;53};54 55static void st_rproc_mbox_callback(struct device *dev, u32 msg)56{57 struct rproc *rproc = dev_get_drvdata(dev);58 59 if (rproc_vq_interrupt(rproc, msg) == IRQ_NONE)60 dev_dbg(dev, "no message was found in vqid %d\n", msg);61}62 63static64void st_rproc_mbox_callback_vq0(struct mbox_client *mbox_client, void *data)65{66 st_rproc_mbox_callback(mbox_client->dev, 0);67}68 69static70void st_rproc_mbox_callback_vq1(struct mbox_client *mbox_client, void *data)71{72 st_rproc_mbox_callback(mbox_client->dev, 1);73}74 75static void st_rproc_kick(struct rproc *rproc, int vqid)76{77 struct st_rproc *ddata = rproc->priv;78 struct device *dev = rproc->dev.parent;79 int ret;80 81 /* send the index of the triggered virtqueue in the mailbox payload */82 if (WARN_ON(vqid >= ST_RPROC_MAX_VRING))83 return;84 85 ret = mbox_send_message(ddata->mbox_chan[vqid * MBOX_MAX + MBOX_TX],86 (void *)&vqid);87 if (ret < 0)88 dev_err(dev, "failed to send message via mbox: %d\n", ret);89}90 91static int st_rproc_mem_alloc(struct rproc *rproc,92 struct rproc_mem_entry *mem)93{94 struct device *dev = rproc->dev.parent;95 void *va;96 97 va = ioremap_wc(mem->dma, mem->len);98 if (!va) {99 dev_err(dev, "Unable to map memory region: %pa+%zx\n",100 &mem->dma, mem->len);101 return -ENOMEM;102 }103 104 /* Update memory entry va */105 mem->va = va;106 107 return 0;108}109 110static int st_rproc_mem_release(struct rproc *rproc,111 struct rproc_mem_entry *mem)112{113 iounmap(mem->va);114 115 return 0;116}117 118static int st_rproc_parse_fw(struct rproc *rproc, const struct firmware *fw)119{120 struct device *dev = rproc->dev.parent;121 struct device_node *np = dev->of_node;122 struct rproc_mem_entry *mem;123 struct reserved_mem *rmem;124 struct of_phandle_iterator it;125 int index = 0;126 127 of_phandle_iterator_init(&it, np, "memory-region", NULL, 0);128 while (of_phandle_iterator_next(&it) == 0) {129 rmem = of_reserved_mem_lookup(it.node);130 if (!rmem) {131 of_node_put(it.node);132 dev_err(dev, "unable to acquire memory-region\n");133 return -EINVAL;134 }135 136 /* No need to map vdev buffer */137 if (strcmp(it.node->name, "vdev0buffer")) {138 /* Register memory region */139 mem = rproc_mem_entry_init(dev, NULL,140 (dma_addr_t)rmem->base,141 rmem->size, rmem->base,142 st_rproc_mem_alloc,143 st_rproc_mem_release,144 it.node->name);145 } else {146 /* Register reserved memory for vdev buffer allocation */147 mem = rproc_of_resm_mem_entry_init(dev, index,148 rmem->size,149 rmem->base,150 it.node->name);151 }152 153 if (!mem) {154 of_node_put(it.node);155 return -ENOMEM;156 }157 158 rproc_add_carveout(rproc, mem);159 index++;160 }161 162 return rproc_elf_load_rsc_table(rproc, fw);163}164 165static int st_rproc_start(struct rproc *rproc)166{167 struct st_rproc *ddata = rproc->priv;168 int err;169 170 regmap_update_bits(ddata->boot_base, ddata->boot_offset,171 ddata->config->bootaddr_mask, rproc->bootaddr);172 173 err = clk_enable(ddata->clk);174 if (err) {175 dev_err(&rproc->dev, "Failed to enable clock\n");176 return err;177 }178 179 if (ddata->config->sw_reset) {180 err = reset_control_deassert(ddata->sw_reset);181 if (err) {182 dev_err(&rproc->dev, "Failed to deassert S/W Reset\n");183 goto sw_reset_fail;184 }185 }186 187 if (ddata->config->pwr_reset) {188 err = reset_control_deassert(ddata->pwr_reset);189 if (err) {190 dev_err(&rproc->dev, "Failed to deassert Power Reset\n");191 goto pwr_reset_fail;192 }193 }194 195 dev_info(&rproc->dev, "Started from 0x%llx\n", rproc->bootaddr);196 197 return 0;198 199 200pwr_reset_fail:201 if (ddata->config->pwr_reset)202 reset_control_assert(ddata->sw_reset);203sw_reset_fail:204 clk_disable(ddata->clk);205 206 return err;207}208 209static int st_rproc_stop(struct rproc *rproc)210{211 struct st_rproc *ddata = rproc->priv;212 int sw_err = 0, pwr_err = 0;213 214 if (ddata->config->sw_reset) {215 sw_err = reset_control_assert(ddata->sw_reset);216 if (sw_err)217 dev_err(&rproc->dev, "Failed to assert S/W Reset\n");218 }219 220 if (ddata->config->pwr_reset) {221 pwr_err = reset_control_assert(ddata->pwr_reset);222 if (pwr_err)223 dev_err(&rproc->dev, "Failed to assert Power Reset\n");224 }225 226 clk_disable(ddata->clk);227 228 return sw_err ?: pwr_err;229}230 231static const struct rproc_ops st_rproc_ops = {232 .kick = st_rproc_kick,233 .start = st_rproc_start,234 .stop = st_rproc_stop,235 .parse_fw = st_rproc_parse_fw,236 .load = rproc_elf_load_segments,237 .find_loaded_rsc_table = rproc_elf_find_loaded_rsc_table,238 .sanity_check = rproc_elf_sanity_check,239 .get_boot_addr = rproc_elf_get_boot_addr,240};241 242/*243 * Fetch state of the processor: 0 is off, 1 is on.244 */245static int st_rproc_state(struct platform_device *pdev)246{247 struct rproc *rproc = platform_get_drvdata(pdev);248 struct st_rproc *ddata = rproc->priv;249 int reset_sw = 0, reset_pwr = 0;250 251 if (ddata->config->sw_reset)252 reset_sw = reset_control_status(ddata->sw_reset);253 254 if (ddata->config->pwr_reset)255 reset_pwr = reset_control_status(ddata->pwr_reset);256 257 if (reset_sw < 0 || reset_pwr < 0)258 return -EINVAL;259 260 return !reset_sw && !reset_pwr;261}262 263static const struct st_rproc_config st40_rproc_cfg = {264 .sw_reset = true,265 .pwr_reset = true,266 .bootaddr_mask = GENMASK(28, 1),267};268 269static const struct st_rproc_config st231_rproc_cfg = {270 .sw_reset = true,271 .pwr_reset = false,272 .bootaddr_mask = GENMASK(31, 6),273};274 275static const struct of_device_id st_rproc_match[] = {276 { .compatible = "st,st40-rproc", .data = &st40_rproc_cfg },277 { .compatible = "st,st231-rproc", .data = &st231_rproc_cfg },278 {},279};280MODULE_DEVICE_TABLE(of, st_rproc_match);281 282static int st_rproc_parse_dt(struct platform_device *pdev)283{284 struct device *dev = &pdev->dev;285 struct rproc *rproc = platform_get_drvdata(pdev);286 struct st_rproc *ddata = rproc->priv;287 struct device_node *np = dev->of_node;288 int err;289 290 if (ddata->config->sw_reset) {291 ddata->sw_reset = devm_reset_control_get_exclusive(dev,292 "sw_reset");293 if (IS_ERR(ddata->sw_reset)) {294 dev_err(dev, "Failed to get S/W Reset\n");295 return PTR_ERR(ddata->sw_reset);296 }297 }298 299 if (ddata->config->pwr_reset) {300 ddata->pwr_reset = devm_reset_control_get_exclusive(dev,301 "pwr_reset");302 if (IS_ERR(ddata->pwr_reset)) {303 dev_err(dev, "Failed to get Power Reset\n");304 return PTR_ERR(ddata->pwr_reset);305 }306 }307 308 ddata->clk = devm_clk_get(dev, NULL);309 if (IS_ERR(ddata->clk)) {310 dev_err(dev, "Failed to get clock\n");311 return PTR_ERR(ddata->clk);312 }313 314 err = of_property_read_u32(np, "clock-frequency", &ddata->clk_rate);315 if (err) {316 dev_err(dev, "failed to get clock frequency\n");317 return err;318 }319 320 ddata->boot_base = syscon_regmap_lookup_by_phandle(np, "st,syscfg");321 if (IS_ERR(ddata->boot_base)) {322 dev_err(dev, "Boot base not found\n");323 return PTR_ERR(ddata->boot_base);324 }325 326 err = of_property_read_u32_index(np, "st,syscfg", 1,327 &ddata->boot_offset);328 if (err) {329 dev_err(dev, "Boot offset not found\n");330 return -EINVAL;331 }332 333 err = clk_prepare(ddata->clk);334 if (err)335 dev_err(dev, "failed to get clock\n");336 337 return err;338}339 340static int st_rproc_probe(struct platform_device *pdev)341{342 struct device *dev = &pdev->dev;343 struct st_rproc *ddata;344 struct device_node *np = dev->of_node;345 struct rproc *rproc;346 struct mbox_chan *chan;347 int enabled;348 int ret, i;349 350 rproc = devm_rproc_alloc(dev, np->name, &st_rproc_ops, NULL, sizeof(*ddata));351 if (!rproc)352 return -ENOMEM;353 354 rproc->has_iommu = false;355 ddata = rproc->priv;356 ddata->config = (struct st_rproc_config *)device_get_match_data(dev);357 if (!ddata->config)358 return -ENODEV;359 360 platform_set_drvdata(pdev, rproc);361 362 ret = st_rproc_parse_dt(pdev);363 if (ret)364 return ret;365 366 enabled = st_rproc_state(pdev);367 if (enabled < 0) {368 ret = enabled;369 goto free_clk;370 }371 372 if (enabled) {373 atomic_inc(&rproc->power);374 rproc->state = RPROC_RUNNING;375 } else {376 clk_set_rate(ddata->clk, ddata->clk_rate);377 }378 379 if (of_property_present(np, "mbox-names")) {380 ddata->mbox_client_vq0.dev = dev;381 ddata->mbox_client_vq0.tx_done = NULL;382 ddata->mbox_client_vq0.tx_block = false;383 ddata->mbox_client_vq0.knows_txdone = false;384 ddata->mbox_client_vq0.rx_callback = st_rproc_mbox_callback_vq0;385 386 ddata->mbox_client_vq1.dev = dev;387 ddata->mbox_client_vq1.tx_done = NULL;388 ddata->mbox_client_vq1.tx_block = false;389 ddata->mbox_client_vq1.knows_txdone = false;390 ddata->mbox_client_vq1.rx_callback = st_rproc_mbox_callback_vq1;391 392 /*393 * To control a co-processor without IPC mechanism.394 * This driver can be used without mbox and rpmsg.395 */396 chan = mbox_request_channel_byname(&ddata->mbox_client_vq0, "vq0_rx");397 if (IS_ERR(chan)) {398 dev_err(&rproc->dev, "failed to request mbox chan 0\n");399 ret = PTR_ERR(chan);400 goto free_clk;401 }402 ddata->mbox_chan[ST_RPROC_VQ0 * MBOX_MAX + MBOX_RX] = chan;403 404 chan = mbox_request_channel_byname(&ddata->mbox_client_vq0, "vq0_tx");405 if (IS_ERR(chan)) {406 dev_err(&rproc->dev, "failed to request mbox chan 0\n");407 ret = PTR_ERR(chan);408 goto free_mbox;409 }410 ddata->mbox_chan[ST_RPROC_VQ0 * MBOX_MAX + MBOX_TX] = chan;411 412 chan = mbox_request_channel_byname(&ddata->mbox_client_vq1, "vq1_rx");413 if (IS_ERR(chan)) {414 dev_err(&rproc->dev, "failed to request mbox chan 1\n");415 ret = PTR_ERR(chan);416 goto free_mbox;417 }418 ddata->mbox_chan[ST_RPROC_VQ1 * MBOX_MAX + MBOX_RX] = chan;419 420 chan = mbox_request_channel_byname(&ddata->mbox_client_vq1, "vq1_tx");421 if (IS_ERR(chan)) {422 dev_err(&rproc->dev, "failed to request mbox chan 1\n");423 ret = PTR_ERR(chan);424 goto free_mbox;425 }426 ddata->mbox_chan[ST_RPROC_VQ1 * MBOX_MAX + MBOX_TX] = chan;427 }428 429 ret = rproc_add(rproc);430 if (ret)431 goto free_mbox;432 433 return 0;434 435free_mbox:436 for (i = 0; i < ST_RPROC_MAX_VRING * MBOX_MAX; i++)437 mbox_free_channel(ddata->mbox_chan[i]);438free_clk:439 clk_unprepare(ddata->clk);440 441 return ret;442}443 444static void st_rproc_remove(struct platform_device *pdev)445{446 struct rproc *rproc = platform_get_drvdata(pdev);447 struct st_rproc *ddata = rproc->priv;448 int i;449 450 rproc_del(rproc);451 452 clk_disable_unprepare(ddata->clk);453 454 for (i = 0; i < ST_RPROC_MAX_VRING * MBOX_MAX; i++)455 mbox_free_channel(ddata->mbox_chan[i]);456}457 458static struct platform_driver st_rproc_driver = {459 .probe = st_rproc_probe,460 .remove_new = st_rproc_remove,461 .driver = {462 .name = "st-rproc",463 .of_match_table = of_match_ptr(st_rproc_match),464 },465};466module_platform_driver(st_rproc_driver);467 468MODULE_DESCRIPTION("ST Remote Processor Control Driver");469MODULE_AUTHOR("Ludovic Barre <ludovic.barre@st.com>");470MODULE_LICENSE("GPL v2");471