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1// SPDX-License-Identifier: GPL-2.02/*3 * ZynqMP R5 Remote Processor driver4 *5 */6 7#include <dt-bindings/power/xlnx-zynqmp-power.h>8#include <linux/dma-mapping.h>9#include <linux/firmware/xlnx-zynqmp.h>10#include <linux/kernel.h>11#include <linux/mailbox_client.h>12#include <linux/mailbox/zynqmp-ipi-message.h>13#include <linux/module.h>14#include <linux/of_address.h>15#include <linux/of_platform.h>16#include <linux/of_reserved_mem.h>17#include <linux/platform_device.h>18#include <linux/remoteproc.h>19 20#include "remoteproc_internal.h"21 22/* IPI buffer MAX length */23#define IPI_BUF_LEN_MAX 32U24 25/* RX mailbox client buffer max length */26#define MBOX_CLIENT_BUF_MAX (IPI_BUF_LEN_MAX + \27 sizeof(struct zynqmp_ipi_message))28 29#define RSC_TBL_XLNX_MAGIC ((uint32_t)'x' << 24 | (uint32_t)'a' << 16 | \30 (uint32_t)'m' << 8 | (uint32_t)'p')31 32/*33 * settings for RPU cluster mode which34 * reflects possible values of xlnx,cluster-mode dt-property35 */36enum zynqmp_r5_cluster_mode {37 SPLIT_MODE = 0, /* When cores run as separate processor */38 LOCKSTEP_MODE = 1, /* cores execute same code in lockstep,clk-for-clk */39 SINGLE_CPU_MODE = 2, /* core0 is held in reset and only core1 runs */40};41 42/**43 * struct mem_bank_data - Memory Bank description44 *45 * @addr: Start address of memory bank46 * @da: device address47 * @size: Size of Memory bank48 * @pm_domain_id: Power-domains id of memory bank for firmware to turn on/off49 * @bank_name: name of the bank for remoteproc framework50 */51struct mem_bank_data {52 phys_addr_t addr;53 u32 da;54 size_t size;55 u32 pm_domain_id;56 char *bank_name;57};58 59/**60 * struct zynqmp_sram_bank - sram bank description61 *62 * @sram_res: sram address region information63 * @da: device address of sram64 */65struct zynqmp_sram_bank {66 struct resource sram_res;67 u32 da;68};69 70/**71 * struct mbox_info72 *73 * @rx_mc_buf: to copy data from mailbox rx channel74 * @tx_mc_buf: to copy data to mailbox tx channel75 * @r5_core: this mailbox's corresponding r5_core pointer76 * @mbox_work: schedule work after receiving data from mailbox77 * @mbox_cl: mailbox client78 * @tx_chan: mailbox tx channel79 * @rx_chan: mailbox rx channel80 */81struct mbox_info {82 unsigned char rx_mc_buf[MBOX_CLIENT_BUF_MAX];83 unsigned char tx_mc_buf[MBOX_CLIENT_BUF_MAX];84 struct zynqmp_r5_core *r5_core;85 struct work_struct mbox_work;86 struct mbox_client mbox_cl;87 struct mbox_chan *tx_chan;88 struct mbox_chan *rx_chan;89};90 91/**92 * struct rsc_tbl_data93 *94 * Platform specific data structure used to sync resource table address.95 * It's important to maintain order and size of each field on remote side.96 *97 * @version: version of data structure98 * @magic_num: 32-bit magic number.99 * @comp_magic_num: complement of above magic number100 * @rsc_tbl_size: resource table size101 * @rsc_tbl: resource table address102 */103struct rsc_tbl_data {104 const int version;105 const u32 magic_num;106 const u32 comp_magic_num;107 const u32 rsc_tbl_size;108 const uintptr_t rsc_tbl;109} __packed;110 111/*112 * Hardcoded TCM bank values. This will stay in driver to maintain backward113 * compatibility with device-tree that does not have TCM information.114 */115static const struct mem_bank_data zynqmp_tcm_banks_split[] = {116 {0xffe00000UL, 0x0, 0x10000UL, PD_R5_0_ATCM, "atcm0"}, /* TCM 64KB each */117 {0xffe20000UL, 0x20000, 0x10000UL, PD_R5_0_BTCM, "btcm0"},118 {0xffe90000UL, 0x0, 0x10000UL, PD_R5_1_ATCM, "atcm1"},119 {0xffeb0000UL, 0x20000, 0x10000UL, PD_R5_1_BTCM, "btcm1"},120};121 122/* In lockstep mode cluster uses each 64KB TCM from second core as well */123static const struct mem_bank_data zynqmp_tcm_banks_lockstep[] = {124 {0xffe00000UL, 0x0, 0x10000UL, PD_R5_0_ATCM, "atcm0"}, /* TCM 64KB each */125 {0xffe20000UL, 0x20000, 0x10000UL, PD_R5_0_BTCM, "btcm0"},126 {0xffe10000UL, 0x10000, 0x10000UL, PD_R5_1_ATCM, "atcm1"},127 {0xffe30000UL, 0x30000, 0x10000UL, PD_R5_1_BTCM, "btcm1"},128};129 130/**131 * struct zynqmp_r5_core132 *133 * @rsc_tbl_va: resource table virtual address134 * @sram: Array of sram memories assigned to this core135 * @num_sram: number of sram for this core136 * @dev: device of RPU instance137 * @np: device node of RPU instance138 * @tcm_bank_count: number TCM banks accessible to this RPU139 * @tcm_banks: array of each TCM bank data140 * @rproc: rproc handle141 * @rsc_tbl_size: resource table size retrieved from remote142 * @pm_domain_id: RPU CPU power domain id143 * @ipi: pointer to mailbox information144 */145struct zynqmp_r5_core {146 void __iomem *rsc_tbl_va;147 struct zynqmp_sram_bank *sram;148 int num_sram;149 struct device *dev;150 struct device_node *np;151 int tcm_bank_count;152 struct mem_bank_data **tcm_banks;153 struct rproc *rproc;154 u32 rsc_tbl_size;155 u32 pm_domain_id;156 struct mbox_info *ipi;157};158 159/**160 * struct zynqmp_r5_cluster161 *162 * @dev: r5f subsystem cluster device node163 * @mode: cluster mode of type zynqmp_r5_cluster_mode164 * @core_count: number of r5 cores used for this cluster mode165 * @r5_cores: Array of pointers pointing to r5 core166 */167struct zynqmp_r5_cluster {168 struct device *dev;169 enum zynqmp_r5_cluster_mode mode;170 int core_count;171 struct zynqmp_r5_core **r5_cores;172};173 174/**175 * event_notified_idr_cb() - callback for vq_interrupt per notifyid176 * @id: rproc->notify id177 * @ptr: pointer to idr private data178 * @data: data passed to idr_for_each callback179 *180 * Pass notification to remoteproc virtio181 *182 * Return: 0. having return is to satisfy the idr_for_each() function183 * pointer input argument requirement.184 **/185static int event_notified_idr_cb(int id, void *ptr, void *data)186{187 struct rproc *rproc = data;188 189 if (rproc_vq_interrupt(rproc, id) == IRQ_NONE)190 dev_dbg(&rproc->dev, "data not found for vqid=%d\n", id);191 192 return 0;193}194 195/**196 * handle_event_notified() - remoteproc notification work function197 * @work: pointer to the work structure198 *199 * It checks each registered remoteproc notify IDs.200 */201static void handle_event_notified(struct work_struct *work)202{203 struct mbox_info *ipi;204 struct rproc *rproc;205 206 ipi = container_of(work, struct mbox_info, mbox_work);207 rproc = ipi->r5_core->rproc;208 209 /*210 * We only use IPI for interrupt. The RPU firmware side may or may211 * not write the notifyid when it trigger IPI.212 * And thus, we scan through all the registered notifyids and213 * find which one is valid to get the message.214 * Even if message from firmware is NULL, we attempt to get vqid215 */216 idr_for_each(&rproc->notifyids, event_notified_idr_cb, rproc);217}218 219/**220 * zynqmp_r5_mb_rx_cb() - receive channel mailbox callback221 * @cl: mailbox client222 * @msg: message pointer223 *224 * Receive data from ipi buffer, ack interrupt and then225 * it will schedule the R5 notification work.226 */227static void zynqmp_r5_mb_rx_cb(struct mbox_client *cl, void *msg)228{229 struct zynqmp_ipi_message *ipi_msg, *buf_msg;230 struct mbox_info *ipi;231 size_t len;232 233 ipi = container_of(cl, struct mbox_info, mbox_cl);234 235 /* copy data from ipi buffer to r5_core */236 ipi_msg = (struct zynqmp_ipi_message *)msg;237 buf_msg = (struct zynqmp_ipi_message *)ipi->rx_mc_buf;238 len = ipi_msg->len;239 if (len > IPI_BUF_LEN_MAX) {240 dev_warn(cl->dev, "msg size exceeded than %d\n",241 IPI_BUF_LEN_MAX);242 len = IPI_BUF_LEN_MAX;243 }244 buf_msg->len = len;245 memcpy(buf_msg->data, ipi_msg->data, len);246 247 /* received and processed interrupt ack */248 if (mbox_send_message(ipi->rx_chan, NULL) < 0)249 dev_err(cl->dev, "ack failed to mbox rx_chan\n");250 251 schedule_work(&ipi->mbox_work);252}253 254/**255 * zynqmp_r5_setup_mbox() - Setup mailboxes related properties256 * this is used for each individual R5 core257 *258 * @cdev: child node device259 *260 * Function to setup mailboxes related properties261 * return : NULL if failed else pointer to mbox_info262 */263static struct mbox_info *zynqmp_r5_setup_mbox(struct device *cdev)264{265 struct mbox_client *mbox_cl;266 struct mbox_info *ipi;267 268 ipi = kzalloc(sizeof(*ipi), GFP_KERNEL);269 if (!ipi)270 return NULL;271 272 mbox_cl = &ipi->mbox_cl;273 mbox_cl->rx_callback = zynqmp_r5_mb_rx_cb;274 mbox_cl->tx_block = false;275 mbox_cl->knows_txdone = false;276 mbox_cl->tx_done = NULL;277 mbox_cl->dev = cdev;278 279 /* Request TX and RX channels */280 ipi->tx_chan = mbox_request_channel_byname(mbox_cl, "tx");281 if (IS_ERR(ipi->tx_chan)) {282 ipi->tx_chan = NULL;283 kfree(ipi);284 dev_warn(cdev, "mbox tx channel request failed\n");285 return NULL;286 }287 288 ipi->rx_chan = mbox_request_channel_byname(mbox_cl, "rx");289 if (IS_ERR(ipi->rx_chan)) {290 mbox_free_channel(ipi->tx_chan);291 ipi->rx_chan = NULL;292 ipi->tx_chan = NULL;293 kfree(ipi);294 dev_warn(cdev, "mbox rx channel request failed\n");295 return NULL;296 }297 298 INIT_WORK(&ipi->mbox_work, handle_event_notified);299 300 return ipi;301}302 303static void zynqmp_r5_free_mbox(struct mbox_info *ipi)304{305 if (!ipi)306 return;307 308 if (ipi->tx_chan) {309 mbox_free_channel(ipi->tx_chan);310 ipi->tx_chan = NULL;311 }312 313 if (ipi->rx_chan) {314 mbox_free_channel(ipi->rx_chan);315 ipi->rx_chan = NULL;316 }317 318 kfree(ipi);319}320 321/*322 * zynqmp_r5_core_kick() - kick a firmware if mbox is provided323 * @rproc: r5 core's corresponding rproc structure324 * @vqid: virtqueue ID325 */326static void zynqmp_r5_rproc_kick(struct rproc *rproc, int vqid)327{328 struct zynqmp_r5_core *r5_core = rproc->priv;329 struct device *dev = r5_core->dev;330 struct zynqmp_ipi_message *mb_msg;331 struct mbox_info *ipi;332 int ret;333 334 ipi = r5_core->ipi;335 if (!ipi)336 return;337 338 mb_msg = (struct zynqmp_ipi_message *)ipi->tx_mc_buf;339 memcpy(mb_msg->data, &vqid, sizeof(vqid));340 mb_msg->len = sizeof(vqid);341 ret = mbox_send_message(ipi->tx_chan, mb_msg);342 if (ret < 0)343 dev_warn(dev, "failed to send message\n");344}345 346/*347 * zynqmp_r5_rproc_start()348 * @rproc: single R5 core's corresponding rproc instance349 *350 * Start R5 Core from designated boot address.351 *352 * return 0 on success, otherwise non-zero value on failure353 */354static int zynqmp_r5_rproc_start(struct rproc *rproc)355{356 struct zynqmp_r5_core *r5_core = rproc->priv;357 enum rpu_boot_mem bootmem;358 int ret;359 360 /*361 * The exception vector pointers (EVP) refer to the base-address of362 * exception vectors (for reset, IRQ, FIQ, etc). The reset-vector363 * starts at the base-address and subsequent vectors are on 4-byte364 * boundaries.365 *366 * Exception vectors can start either from 0x0000_0000 (LOVEC) or367 * from 0xFFFF_0000 (HIVEC) which is mapped in the OCM (On-Chip Memory)368 *369 * Usually firmware will put Exception vectors at LOVEC.370 *371 * It is not recommend that you change the exception vector.372 * Changing the EVP to HIVEC will result in increased interrupt latency373 * and jitter. Also, if the OCM is secured and the Cortex-R5F processor374 * is non-secured, then the Cortex-R5F processor cannot access the375 * HIVEC exception vectors in the OCM.376 */377 bootmem = (rproc->bootaddr >= 0xFFFC0000) ?378 PM_RPU_BOOTMEM_HIVEC : PM_RPU_BOOTMEM_LOVEC;379 380 dev_dbg(r5_core->dev, "RPU boot addr 0x%llx from %s.", rproc->bootaddr,381 bootmem == PM_RPU_BOOTMEM_HIVEC ? "OCM" : "TCM");382 383 ret = zynqmp_pm_request_wake(r5_core->pm_domain_id, 1,384 bootmem, ZYNQMP_PM_REQUEST_ACK_NO);385 if (ret)386 dev_err(r5_core->dev,387 "failed to start RPU = 0x%x\n", r5_core->pm_domain_id);388 return ret;389}390 391/*392 * zynqmp_r5_rproc_stop()393 * @rproc: single R5 core's corresponding rproc instance394 *395 * Power down R5 Core.396 *397 * return 0 on success, otherwise non-zero value on failure398 */399static int zynqmp_r5_rproc_stop(struct rproc *rproc)400{401 struct zynqmp_r5_core *r5_core = rproc->priv;402 int ret;403 404 ret = zynqmp_pm_force_pwrdwn(r5_core->pm_domain_id,405 ZYNQMP_PM_REQUEST_ACK_BLOCKING);406 if (ret)407 dev_err(r5_core->dev, "failed to stop remoteproc RPU %d\n", ret);408 409 return ret;410}411 412/*413 * zynqmp_r5_mem_region_map()414 * @rproc: single R5 core's corresponding rproc instance415 * @mem: mem descriptor to map reserved memory-regions416 *417 * Callback to map va for memory-region's carveout.418 *419 * return 0 on success, otherwise non-zero value on failure420 */421static int zynqmp_r5_mem_region_map(struct rproc *rproc,422 struct rproc_mem_entry *mem)423{424 void __iomem *va;425 426 va = ioremap_wc(mem->dma, mem->len);427 if (IS_ERR_OR_NULL(va))428 return -ENOMEM;429 430 mem->va = (void *)va;431 432 return 0;433}434 435/*436 * zynqmp_r5_rproc_mem_unmap437 * @rproc: single R5 core's corresponding rproc instance438 * @mem: mem entry to unmap439 *440 * Unmap memory-region carveout441 *442 * return: always returns 0443 */444static int zynqmp_r5_mem_region_unmap(struct rproc *rproc,445 struct rproc_mem_entry *mem)446{447 iounmap((void __iomem *)mem->va);448 return 0;449}450 451/*452 * add_mem_regions_carveout()453 * @rproc: single R5 core's corresponding rproc instance454 *455 * Construct rproc mem carveouts from memory-region property nodes456 *457 * return 0 on success, otherwise non-zero value on failure458 */459static int add_mem_regions_carveout(struct rproc *rproc)460{461 struct rproc_mem_entry *rproc_mem;462 struct zynqmp_r5_core *r5_core;463 struct of_phandle_iterator it;464 struct reserved_mem *rmem;465 int i = 0;466 467 r5_core = rproc->priv;468 469 /* Register associated reserved memory regions */470 of_phandle_iterator_init(&it, r5_core->np, "memory-region", NULL, 0);471 472 while (of_phandle_iterator_next(&it) == 0) {473 rmem = of_reserved_mem_lookup(it.node);474 if (!rmem) {475 of_node_put(it.node);476 dev_err(&rproc->dev, "unable to acquire memory-region\n");477 return -EINVAL;478 }479 480 if (!strcmp(it.node->name, "vdev0buffer")) {481 /* Init reserved memory for vdev buffer */482 rproc_mem = rproc_of_resm_mem_entry_init(&rproc->dev, i,483 rmem->size,484 rmem->base,485 it.node->name);486 } else {487 /* Register associated reserved memory regions */488 rproc_mem = rproc_mem_entry_init(&rproc->dev, NULL,489 (dma_addr_t)rmem->base,490 rmem->size, rmem->base,491 zynqmp_r5_mem_region_map,492 zynqmp_r5_mem_region_unmap,493 it.node->name);494 }495 496 if (!rproc_mem) {497 of_node_put(it.node);498 return -ENOMEM;499 }500 501 rproc_add_carveout(rproc, rproc_mem);502 rproc_coredump_add_segment(rproc, rmem->base, rmem->size);503 504 dev_dbg(&rproc->dev, "reserved mem carveout %s addr=%llx, size=0x%llx",505 it.node->name, rmem->base, rmem->size);506 i++;507 }508 509 return 0;510}511 512static int add_sram_carveouts(struct rproc *rproc)513{514 struct zynqmp_r5_core *r5_core = rproc->priv;515 struct rproc_mem_entry *rproc_mem;516 struct zynqmp_sram_bank *sram;517 dma_addr_t dma_addr;518 size_t len;519 int da, i;520 521 for (i = 0; i < r5_core->num_sram; i++) {522 sram = &r5_core->sram[i];523 524 dma_addr = (dma_addr_t)sram->sram_res.start;525 526 len = resource_size(&sram->sram_res);527 da = sram->da;528 529 rproc_mem = rproc_mem_entry_init(&rproc->dev, NULL,530 dma_addr,531 len, da,532 zynqmp_r5_mem_region_map,533 zynqmp_r5_mem_region_unmap,534 sram->sram_res.name);535 if (!rproc_mem) {536 dev_err(&rproc->dev, "failed to add sram %s da=0x%x, size=0x%lx",537 sram->sram_res.name, da, len);538 return -ENOMEM;539 }540 541 rproc_add_carveout(rproc, rproc_mem);542 rproc_coredump_add_segment(rproc, da, len);543 544 dev_dbg(&rproc->dev, "sram carveout %s addr=%llx, da=0x%x, size=0x%lx",545 sram->sram_res.name, dma_addr, da, len);546 }547 548 return 0;549}550 551/*552 * tcm_mem_unmap()553 * @rproc: single R5 core's corresponding rproc instance554 * @mem: tcm mem entry to unmap555 *556 * Unmap TCM banks when powering down R5 core.557 *558 * return always 0559 */560static int tcm_mem_unmap(struct rproc *rproc, struct rproc_mem_entry *mem)561{562 iounmap((void __iomem *)mem->va);563 564 return 0;565}566 567/*568 * tcm_mem_map()569 * @rproc: single R5 core's corresponding rproc instance570 * @mem: tcm memory entry descriptor571 *572 * Given TCM bank entry, this func setup virtual address for TCM bank573 * remoteproc carveout. It also takes care of va to da address translation574 *575 * return 0 on success, otherwise non-zero value on failure576 */577static int tcm_mem_map(struct rproc *rproc,578 struct rproc_mem_entry *mem)579{580 void __iomem *va;581 582 va = ioremap_wc(mem->dma, mem->len);583 if (IS_ERR_OR_NULL(va))584 return -ENOMEM;585 586 /* Update memory entry va */587 mem->va = (void *)va;588 589 /* clear TCMs */590 memset_io(va, 0, mem->len);591 592 return 0;593}594 595/*596 * add_tcm_banks()597 * @rproc: single R5 core's corresponding rproc instance598 *599 * allocate and add remoteproc carveout for TCM memory600 *601 * return 0 on success, otherwise non-zero value on failure602 */603static int add_tcm_banks(struct rproc *rproc)604{605 struct rproc_mem_entry *rproc_mem;606 struct zynqmp_r5_core *r5_core;607 int i, num_banks, ret;608 phys_addr_t bank_addr;609 struct device *dev;610 u32 pm_domain_id;611 size_t bank_size;612 char *bank_name;613 u32 da;614 615 r5_core = rproc->priv;616 dev = r5_core->dev;617 num_banks = r5_core->tcm_bank_count;618 619 /*620 * Power-on Each 64KB TCM,621 * register its address space, map and unmap functions622 * and add carveouts accordingly623 */624 for (i = 0; i < num_banks; i++) {625 bank_addr = r5_core->tcm_banks[i]->addr;626 da = r5_core->tcm_banks[i]->da;627 bank_name = r5_core->tcm_banks[i]->bank_name;628 bank_size = r5_core->tcm_banks[i]->size;629 pm_domain_id = r5_core->tcm_banks[i]->pm_domain_id;630 631 ret = zynqmp_pm_request_node(pm_domain_id,632 ZYNQMP_PM_CAPABILITY_ACCESS, 0,633 ZYNQMP_PM_REQUEST_ACK_BLOCKING);634 if (ret < 0) {635 dev_err(dev, "failed to turn on TCM 0x%x", pm_domain_id);636 goto release_tcm;637 }638 639 dev_dbg(dev, "TCM carveout %s addr=%llx, da=0x%x, size=0x%lx",640 bank_name, bank_addr, da, bank_size);641 642 /*643 * In DETACHED state firmware is already running so no need to644 * request add TCM registers. However, request TCM PD node to let645 * platform management firmware know that TCM is in use.646 */647 if (rproc->state == RPROC_DETACHED)648 continue;649 650 rproc_mem = rproc_mem_entry_init(dev, NULL, bank_addr,651 bank_size, da,652 tcm_mem_map, tcm_mem_unmap,653 bank_name);654 if (!rproc_mem) {655 ret = -ENOMEM;656 zynqmp_pm_release_node(pm_domain_id);657 goto release_tcm;658 }659 660 rproc_add_carveout(rproc, rproc_mem);661 rproc_coredump_add_segment(rproc, da, bank_size);662 }663 664 return 0;665 666release_tcm:667 /* If failed, Turn off all TCM banks turned on before */668 for (i--; i >= 0; i--) {669 pm_domain_id = r5_core->tcm_banks[i]->pm_domain_id;670 zynqmp_pm_release_node(pm_domain_id);671 }672 return ret;673}674 675/*676 * zynqmp_r5_parse_fw()677 * @rproc: single R5 core's corresponding rproc instance678 * @fw: ptr to firmware to be loaded onto r5 core679 *680 * get resource table if available681 *682 * return 0 on success, otherwise non-zero value on failure683 */684static int zynqmp_r5_parse_fw(struct rproc *rproc, const struct firmware *fw)685{686 int ret;687 688 ret = rproc_elf_load_rsc_table(rproc, fw);689 if (ret == -EINVAL) {690 /*691 * resource table only required for IPC.692 * if not present, this is not necessarily an error;693 * for example, loading r5 hello world application694 * so simply inform user and keep going.695 */696 dev_info(&rproc->dev, "no resource table found.\n");697 ret = 0;698 }699 return ret;700}701 702/**703 * zynqmp_r5_rproc_prepare()704 * adds carveouts for TCM bank and reserved memory regions705 *706 * @rproc: Device node of each rproc707 *708 * Return: 0 for success else < 0 error code709 */710static int zynqmp_r5_rproc_prepare(struct rproc *rproc)711{712 int ret;713 714 ret = add_tcm_banks(rproc);715 if (ret) {716 dev_err(&rproc->dev, "failed to get TCM banks, err %d\n", ret);717 return ret;718 }719 720 ret = add_mem_regions_carveout(rproc);721 if (ret) {722 dev_err(&rproc->dev, "failed to get reserve mem regions %d\n", ret);723 return ret;724 }725 726 ret = add_sram_carveouts(rproc);727 if (ret) {728 dev_err(&rproc->dev, "failed to get sram carveout %d\n", ret);729 return ret;730 }731 732 return 0;733}734 735/**736 * zynqmp_r5_rproc_unprepare()737 * Turns off TCM banks using power-domain id738 *739 * @rproc: Device node of each rproc740 *741 * Return: always 0742 */743static int zynqmp_r5_rproc_unprepare(struct rproc *rproc)744{745 struct zynqmp_r5_core *r5_core;746 u32 pm_domain_id;747 int i;748 749 r5_core = rproc->priv;750 751 for (i = 0; i < r5_core->tcm_bank_count; i++) {752 pm_domain_id = r5_core->tcm_banks[i]->pm_domain_id;753 if (zynqmp_pm_release_node(pm_domain_id))754 dev_warn(r5_core->dev,755 "can't turn off TCM bank 0x%x", pm_domain_id);756 }757 758 return 0;759}760 761static struct resource_table *zynqmp_r5_get_loaded_rsc_table(struct rproc *rproc,762 size_t *size)763{764 struct zynqmp_r5_core *r5_core;765 766 r5_core = rproc->priv;767 768 *size = r5_core->rsc_tbl_size;769 770 return (struct resource_table *)r5_core->rsc_tbl_va;771}772 773static int zynqmp_r5_get_rsc_table_va(struct zynqmp_r5_core *r5_core)774{775 struct resource_table *rsc_tbl_addr;776 struct device *dev = r5_core->dev;777 struct rsc_tbl_data *rsc_data_va;778 struct resource res_mem;779 struct device_node *np;780 int ret;781 782 /*783 * It is expected from remote processor firmware to provide resource784 * table address via struct rsc_tbl_data data structure.785 * Start address of first entry under "memory-region" property list786 * contains that data structure which holds resource table address, size787 * and some magic number to validate correct resource table entry.788 */789 np = of_parse_phandle(r5_core->np, "memory-region", 0);790 if (!np) {791 dev_err(dev, "failed to get memory region dev node\n");792 return -EINVAL;793 }794 795 ret = of_address_to_resource(np, 0, &res_mem);796 of_node_put(np);797 if (ret) {798 dev_err(dev, "failed to get memory-region resource addr\n");799 return -EINVAL;800 }801 802 rsc_data_va = (struct rsc_tbl_data *)ioremap_wc(res_mem.start,803 sizeof(struct rsc_tbl_data));804 if (!rsc_data_va) {805 dev_err(dev, "failed to map resource table data address\n");806 return -EIO;807 }808 809 /*810 * If RSC_TBL_XLNX_MAGIC number and its complement isn't found then811 * do not consider resource table address valid and don't attach812 */813 if (rsc_data_va->magic_num != RSC_TBL_XLNX_MAGIC ||814 rsc_data_va->comp_magic_num != ~RSC_TBL_XLNX_MAGIC) {815 dev_dbg(dev, "invalid magic number, won't attach\n");816 return -EINVAL;817 }818 819 r5_core->rsc_tbl_va = ioremap_wc(rsc_data_va->rsc_tbl,820 rsc_data_va->rsc_tbl_size);821 if (!r5_core->rsc_tbl_va) {822 dev_err(dev, "failed to get resource table va\n");823 return -EINVAL;824 }825 826 rsc_tbl_addr = (struct resource_table *)r5_core->rsc_tbl_va;827 828 /*829 * As of now resource table version 1 is expected. Don't fail to attach830 * but warn users about it.831 */832 if (rsc_tbl_addr->ver != 1)833 dev_warn(dev, "unexpected resource table version %d\n",834 rsc_tbl_addr->ver);835 836 r5_core->rsc_tbl_size = rsc_data_va->rsc_tbl_size;837 838 iounmap((void __iomem *)rsc_data_va);839 840 return 0;841}842 843static int zynqmp_r5_attach(struct rproc *rproc)844{845 dev_dbg(&rproc->dev, "rproc %d attached\n", rproc->index);846 847 return 0;848}849 850static int zynqmp_r5_detach(struct rproc *rproc)851{852 /*853 * Generate last notification to remote after clearing virtio flag.854 * Remote can avoid polling on virtio reset flag if kick is generated855 * during detach by host and check virtio reset flag on kick interrupt.856 */857 zynqmp_r5_rproc_kick(rproc, 0);858 859 return 0;860}861 862static const struct rproc_ops zynqmp_r5_rproc_ops = {863 .prepare = zynqmp_r5_rproc_prepare,864 .unprepare = zynqmp_r5_rproc_unprepare,865 .start = zynqmp_r5_rproc_start,866 .stop = zynqmp_r5_rproc_stop,867 .load = rproc_elf_load_segments,868 .parse_fw = zynqmp_r5_parse_fw,869 .find_loaded_rsc_table = rproc_elf_find_loaded_rsc_table,870 .sanity_check = rproc_elf_sanity_check,871 .get_boot_addr = rproc_elf_get_boot_addr,872 .kick = zynqmp_r5_rproc_kick,873 .get_loaded_rsc_table = zynqmp_r5_get_loaded_rsc_table,874 .attach = zynqmp_r5_attach,875 .detach = zynqmp_r5_detach,876};877 878/**879 * zynqmp_r5_add_rproc_core()880 * Allocate and add struct rproc object for each r5f core881 * This is called for each individual r5f core882 *883 * @cdev: Device node of each r5 core884 *885 * Return: zynqmp_r5_core object for success else error code pointer886 */887static struct zynqmp_r5_core *zynqmp_r5_add_rproc_core(struct device *cdev)888{889 struct zynqmp_r5_core *r5_core;890 struct rproc *r5_rproc;891 int ret;892 893 /* Set up DMA mask */894 ret = dma_set_coherent_mask(cdev, DMA_BIT_MASK(32));895 if (ret)896 return ERR_PTR(ret);897 898 /* Allocate remoteproc instance */899 r5_rproc = rproc_alloc(cdev, dev_name(cdev),900 &zynqmp_r5_rproc_ops,901 NULL, sizeof(struct zynqmp_r5_core));902 if (!r5_rproc) {903 dev_err(cdev, "failed to allocate memory for rproc instance\n");904 return ERR_PTR(-ENOMEM);905 }906 907 rproc_coredump_set_elf_info(r5_rproc, ELFCLASS32, EM_ARM);908 909 r5_rproc->auto_boot = false;910 r5_core = r5_rproc->priv;911 r5_core->dev = cdev;912 r5_core->np = dev_of_node(cdev);913 if (!r5_core->np) {914 dev_err(cdev, "can't get device node for r5 core\n");915 ret = -EINVAL;916 goto free_rproc;917 }918 919 /* Add R5 remoteproc core */920 ret = rproc_add(r5_rproc);921 if (ret) {922 dev_err(cdev, "failed to add r5 remoteproc\n");923 goto free_rproc;924 }925 926 /*927 * If firmware is already available in the memory then move rproc state928 * to DETACHED. Firmware can be preloaded via debugger or by any other929 * agent (processors) in the system.930 * If firmware isn't available in the memory and resource table isn't931 * found, then rproc state remains OFFLINE.932 */933 if (!zynqmp_r5_get_rsc_table_va(r5_core))934 r5_rproc->state = RPROC_DETACHED;935 936 r5_core->rproc = r5_rproc;937 return r5_core;938 939free_rproc:940 rproc_free(r5_rproc);941 return ERR_PTR(ret);942}943 944static int zynqmp_r5_get_sram_banks(struct zynqmp_r5_core *r5_core)945{946 struct device_node *np = r5_core->np;947 struct device *dev = r5_core->dev;948 struct zynqmp_sram_bank *sram;949 struct device_node *sram_np;950 int num_sram, i, ret;951 u64 abs_addr, size;952 953 /* "sram" is optional property. Do not fail, if unavailable. */954 if (!of_property_present(r5_core->np, "sram"))955 return 0;956 957 num_sram = of_property_count_elems_of_size(np, "sram", sizeof(phandle));958 if (num_sram <= 0) {959 dev_err(dev, "Invalid sram property, ret = %d\n",960 num_sram);961 return -EINVAL;962 }963 964 sram = devm_kcalloc(dev, num_sram,965 sizeof(struct zynqmp_sram_bank), GFP_KERNEL);966 if (!sram)967 return -ENOMEM;968 969 for (i = 0; i < num_sram; i++) {970 sram_np = of_parse_phandle(np, "sram", i);971 if (!sram_np) {972 dev_err(dev, "failed to get sram %d phandle\n", i);973 return -EINVAL;974 }975 976 if (!of_device_is_available(sram_np)) {977 dev_err(dev, "sram device not available\n");978 ret = -EINVAL;979 goto fail_sram_get;980 }981 982 ret = of_address_to_resource(sram_np, 0, &sram[i].sram_res);983 if (ret) {984 dev_err(dev, "addr to res failed\n");985 goto fail_sram_get;986 }987 988 /* Get SRAM device address */989 ret = of_property_read_reg(sram_np, i, &abs_addr, &size);990 if (ret) {991 dev_err(dev, "failed to get reg property\n");992 goto fail_sram_get;993 }994 995 sram[i].da = (u32)abs_addr;996 997 of_node_put(sram_np);998 999 dev_dbg(dev, "sram %d: name=%s, addr=0x%llx, da=0x%x, size=0x%llx\n",1000 i, sram[i].sram_res.name, sram[i].sram_res.start,1001 sram[i].da, resource_size(&sram[i].sram_res));1002 }1003 1004 r5_core->sram = sram;1005 r5_core->num_sram = num_sram;1006 1007 return 0;1008 1009fail_sram_get:1010 of_node_put(sram_np);1011 1012 return ret;1013}1014 1015static int zynqmp_r5_get_tcm_node_from_dt(struct zynqmp_r5_cluster *cluster)1016{1017 int i, j, tcm_bank_count, ret, tcm_pd_idx, pd_count;1018 struct of_phandle_args out_args;1019 struct zynqmp_r5_core *r5_core;1020 struct platform_device *cpdev;1021 struct mem_bank_data *tcm;1022 struct device_node *np;1023 struct resource *res;1024 u64 abs_addr, size;1025 struct device *dev;1026 1027 for (i = 0; i < cluster->core_count; i++) {1028 r5_core = cluster->r5_cores[i];1029 dev = r5_core->dev;1030 np = r5_core->np;1031 1032 pd_count = of_count_phandle_with_args(np, "power-domains",1033 "#power-domain-cells");1034 1035 if (pd_count <= 0) {1036 dev_err(dev, "invalid power-domains property, %d\n", pd_count);1037 return -EINVAL;1038 }1039 1040 /* First entry in power-domains list is for r5 core, rest for TCM. */1041 tcm_bank_count = pd_count - 1;1042 1043 if (tcm_bank_count <= 0) {1044 dev_err(dev, "invalid TCM count %d\n", tcm_bank_count);1045 return -EINVAL;1046 }1047 1048 r5_core->tcm_banks = devm_kcalloc(dev, tcm_bank_count,1049 sizeof(struct mem_bank_data *),1050 GFP_KERNEL);1051 if (!r5_core->tcm_banks)1052 return -ENOMEM;1053 1054 r5_core->tcm_bank_count = tcm_bank_count;1055 for (j = 0, tcm_pd_idx = 1; j < tcm_bank_count; j++, tcm_pd_idx++) {1056 tcm = devm_kzalloc(dev, sizeof(struct mem_bank_data),1057 GFP_KERNEL);1058 if (!tcm)1059 return -ENOMEM;1060 1061 r5_core->tcm_banks[j] = tcm;1062 1063 /* Get power-domains id of TCM. */1064 ret = of_parse_phandle_with_args(np, "power-domains",1065 "#power-domain-cells",1066 tcm_pd_idx, &out_args);1067 if (ret) {1068 dev_err(r5_core->dev,1069 "failed to get tcm %d pm domain, ret %d\n",1070 tcm_pd_idx, ret);1071 return ret;1072 }1073 tcm->pm_domain_id = out_args.args[0];1074 of_node_put(out_args.np);1075 1076 /* Get TCM address without translation. */1077 ret = of_property_read_reg(np, j, &abs_addr, &size);1078 if (ret) {1079 dev_err(dev, "failed to get reg property\n");1080 return ret;1081 }1082 1083 /*1084 * Remote processor can address only 32 bits1085 * so convert 64-bits into 32-bits. This will discard1086 * any unwanted upper 32-bits.1087 */1088 tcm->da = (u32)abs_addr;1089 tcm->size = (u32)size;1090 1091 cpdev = to_platform_device(dev);1092 res = platform_get_resource(cpdev, IORESOURCE_MEM, j);1093 if (!res) {1094 dev_err(dev, "failed to get tcm resource\n");1095 return -EINVAL;1096 }1097 1098 tcm->addr = (u32)res->start;1099 tcm->bank_name = (char *)res->name;1100 res = devm_request_mem_region(dev, tcm->addr, tcm->size,1101 tcm->bank_name);1102 if (!res) {1103 dev_err(dev, "failed to request tcm resource\n");1104 return -EINVAL;1105 }1106 }1107 }1108 1109 return 0;1110}1111 1112/**1113 * zynqmp_r5_get_tcm_node()1114 * Ideally this function should parse tcm node and store information1115 * in r5_core instance. For now, Hardcoded TCM information is used.1116 * This approach is used as TCM bindings for system-dt is being developed1117 *1118 * @cluster: pointer to zynqmp_r5_cluster type object1119 *1120 * Return: 0 for success and < 0 error code for failure.1121 */1122static int zynqmp_r5_get_tcm_node(struct zynqmp_r5_cluster *cluster)1123{1124 const struct mem_bank_data *zynqmp_tcm_banks;1125 struct device *dev = cluster->dev;1126 struct zynqmp_r5_core *r5_core;1127 int tcm_bank_count, tcm_node;1128 int i, j;1129 1130 if (cluster->mode == SPLIT_MODE) {1131 zynqmp_tcm_banks = zynqmp_tcm_banks_split;1132 tcm_bank_count = ARRAY_SIZE(zynqmp_tcm_banks_split);1133 } else {1134 zynqmp_tcm_banks = zynqmp_tcm_banks_lockstep;1135 tcm_bank_count = ARRAY_SIZE(zynqmp_tcm_banks_lockstep);1136 }1137 1138 /* count per core tcm banks */1139 tcm_bank_count = tcm_bank_count / cluster->core_count;1140 1141 /*1142 * r5 core 0 will use all of TCM banks in lockstep mode.1143 * In split mode, r5 core0 will use 128k and r5 core1 will use another1144 * 128k. Assign TCM banks to each core accordingly1145 */1146 tcm_node = 0;1147 for (i = 0; i < cluster->core_count; i++) {1148 r5_core = cluster->r5_cores[i];1149 r5_core->tcm_banks = devm_kcalloc(dev, tcm_bank_count,1150 sizeof(struct mem_bank_data *),1151 GFP_KERNEL);1152 if (!r5_core->tcm_banks)1153 return -ENOMEM;1154 1155 for (j = 0; j < tcm_bank_count; j++) {1156 /*1157 * Use pre-defined TCM reg values.1158 * Eventually this should be replaced by values1159 * parsed from dts.1160 */1161 r5_core->tcm_banks[j] =1162 (struct mem_bank_data *)&zynqmp_tcm_banks[tcm_node];1163 tcm_node++;1164 }1165 1166 r5_core->tcm_bank_count = tcm_bank_count;1167 }1168 1169 return 0;1170}1171 1172/*1173 * zynqmp_r5_core_init()1174 * Create and initialize zynqmp_r5_core type object1175 *1176 * @cluster: pointer to zynqmp_r5_cluster type object1177 * @fw_reg_val: value expected by firmware to configure RPU cluster mode1178 * @tcm_mode: value expected by fw to configure TCM mode (lockstep or split)1179 *1180 * Return: 0 for success and error code for failure.1181 */1182static int zynqmp_r5_core_init(struct zynqmp_r5_cluster *cluster,1183 enum rpu_oper_mode fw_reg_val,1184 enum rpu_tcm_comb tcm_mode)1185{1186 struct device *dev = cluster->dev;1187 struct zynqmp_r5_core *r5_core;1188 int ret = -EINVAL, i;1189 1190 r5_core = cluster->r5_cores[0];1191 1192 /* Maintain backward compatibility for zynqmp by using hardcode TCM address. */1193 if (of_property_present(r5_core->np, "reg"))1194 ret = zynqmp_r5_get_tcm_node_from_dt(cluster);1195 else if (device_is_compatible(dev, "xlnx,zynqmp-r5fss"))1196 ret = zynqmp_r5_get_tcm_node(cluster);1197 1198 if (ret) {1199 dev_err(dev, "can't get tcm, err %d\n", ret);1200 return ret;1201 }1202 1203 for (i = 0; i < cluster->core_count; i++) {1204 r5_core = cluster->r5_cores[i];1205 1206 /* Initialize r5 cores with power-domains parsed from dts */1207 ret = of_property_read_u32_index(r5_core->np, "power-domains",1208 1, &r5_core->pm_domain_id);1209 if (ret) {1210 dev_err(dev, "failed to get power-domains property\n");1211 return ret;1212 }1213 1214 ret = zynqmp_pm_set_rpu_mode(r5_core->pm_domain_id, fw_reg_val);1215 if (ret < 0) {1216 dev_err(r5_core->dev, "failed to set RPU mode\n");1217 return ret;1218 }1219 1220 if (of_property_present(dev_of_node(dev), "xlnx,tcm-mode") ||1221 device_is_compatible(dev, "xlnx,zynqmp-r5fss")) {1222 ret = zynqmp_pm_set_tcm_config(r5_core->pm_domain_id,1223 tcm_mode);1224 if (ret < 0) {1225 dev_err(r5_core->dev, "failed to configure TCM\n");1226 return ret;1227 }1228 }1229 1230 ret = zynqmp_r5_get_sram_banks(r5_core);1231 if (ret)1232 return ret;1233 }1234 1235 return 0;1236}1237 1238/*1239 * zynqmp_r5_cluster_init()1240 * Create and initialize zynqmp_r5_cluster type object1241 *1242 * @cluster: pointer to zynqmp_r5_cluster type object1243 *1244 * Return: 0 for success and error code for failure.1245 */1246static int zynqmp_r5_cluster_init(struct zynqmp_r5_cluster *cluster)1247{1248 enum zynqmp_r5_cluster_mode cluster_mode = LOCKSTEP_MODE;1249 struct device *dev = cluster->dev;1250 struct device_node *dev_node = dev_of_node(dev);1251 struct platform_device *child_pdev;1252 struct zynqmp_r5_core **r5_cores;1253 enum rpu_oper_mode fw_reg_val;1254 struct device **child_devs;1255 struct device_node *child;1256 enum rpu_tcm_comb tcm_mode;1257 int core_count, ret, i;1258 struct mbox_info *ipi;1259 1260 ret = of_property_read_u32(dev_node, "xlnx,cluster-mode", &cluster_mode);1261 1262 /*1263 * on success returns 0, if not defined then returns -EINVAL,1264 * In that case, default is LOCKSTEP mode. Other than that1265 * returns relative error code < 0.1266 */1267 if (ret != -EINVAL && ret != 0) {1268 dev_err(dev, "Invalid xlnx,cluster-mode property\n");1269 return ret;1270 }1271 1272 /*1273 * For now driver only supports split mode and lockstep mode.1274 * fail driver probe if either of that is not set in dts.1275 */1276 if (cluster_mode == LOCKSTEP_MODE) {1277 fw_reg_val = PM_RPU_MODE_LOCKSTEP;1278 } else if (cluster_mode == SPLIT_MODE) {1279 fw_reg_val = PM_RPU_MODE_SPLIT;1280 } else {1281 dev_err(dev, "driver does not support cluster mode %d\n", cluster_mode);1282 return -EINVAL;1283 }1284 1285 if (of_property_present(dev_node, "xlnx,tcm-mode")) {1286 ret = of_property_read_u32(dev_node, "xlnx,tcm-mode", (u32 *)&tcm_mode);1287 if (ret)1288 return ret;1289 } else if (device_is_compatible(dev, "xlnx,zynqmp-r5fss")) {1290 if (cluster_mode == LOCKSTEP_MODE)1291 tcm_mode = PM_RPU_TCM_COMB;1292 else1293 tcm_mode = PM_RPU_TCM_SPLIT;1294 } else {1295 tcm_mode = PM_RPU_TCM_COMB;1296 }1297 1298 /*1299 * Number of cores is decided by number of child nodes of1300 * r5f subsystem node in dts. If Split mode is used in dts1301 * 2 child nodes are expected.1302 * In lockstep mode if two child nodes are available,1303 * only use first child node and consider it as core01304 * and ignore core1 dt node.1305 */1306 core_count = of_get_available_child_count(dev_node);1307 if (core_count == 0) {1308 dev_err(dev, "Invalid number of r5 cores %d", core_count);1309 return -EINVAL;1310 } else if (cluster_mode == SPLIT_MODE && core_count != 2) {1311 dev_err(dev, "Invalid number of r5 cores for split mode\n");1312 return -EINVAL;1313 } else if (cluster_mode == LOCKSTEP_MODE && core_count == 2) {1314 dev_warn(dev, "Only r5 core0 will be used\n");1315 core_count = 1;1316 }1317 1318 child_devs = kcalloc(core_count, sizeof(struct device *), GFP_KERNEL);1319 if (!child_devs)1320 return -ENOMEM;1321 1322 r5_cores = kcalloc(core_count,1323 sizeof(struct zynqmp_r5_core *), GFP_KERNEL);1324 if (!r5_cores) {1325 kfree(child_devs);1326 return -ENOMEM;1327 }1328 1329 i = 0;1330 for_each_available_child_of_node(dev_node, child) {1331 child_pdev = of_find_device_by_node(child);1332 if (!child_pdev) {1333 of_node_put(child);1334 ret = -ENODEV;1335 goto release_r5_cores;1336 }1337 1338 child_devs[i] = &child_pdev->dev;1339 1340 /* create and add remoteproc instance of type struct rproc */1341 r5_cores[i] = zynqmp_r5_add_rproc_core(&child_pdev->dev);1342 if (IS_ERR(r5_cores[i])) {1343 of_node_put(child);1344 ret = PTR_ERR(r5_cores[i]);1345 r5_cores[i] = NULL;1346 goto release_r5_cores;1347 }1348 1349 /*1350 * If mailbox nodes are disabled using "status" property then1351 * setting up mailbox channels will fail.1352 */1353 ipi = zynqmp_r5_setup_mbox(&child_pdev->dev);1354 if (ipi) {1355 r5_cores[i]->ipi = ipi;1356 ipi->r5_core = r5_cores[i];1357 }1358 1359 /*1360 * If two child nodes are available in dts in lockstep mode,1361 * then ignore second child node.1362 */1363 if (cluster_mode == LOCKSTEP_MODE) {1364 of_node_put(child);1365 break;1366 }1367 1368 i++;1369 }1370 1371 cluster->mode = cluster_mode;1372 cluster->core_count = core_count;1373 cluster->r5_cores = r5_cores;1374 1375 ret = zynqmp_r5_core_init(cluster, fw_reg_val, tcm_mode);1376 if (ret < 0) {1377 dev_err(dev, "failed to init r5 core err %d\n", ret);1378 cluster->core_count = 0;1379 cluster->r5_cores = NULL;1380 1381 /*1382 * at this point rproc resources for each core are allocated.1383 * adjust index to free resources in reverse order1384 */1385 i = core_count - 1;1386 goto release_r5_cores;1387 }1388 1389 kfree(child_devs);1390 return 0;1391 1392release_r5_cores:1393 while (i >= 0) {1394 put_device(child_devs[i]);1395 if (r5_cores[i]) {1396 zynqmp_r5_free_mbox(r5_cores[i]->ipi);1397 of_reserved_mem_device_release(r5_cores[i]->dev);1398 rproc_del(r5_cores[i]->rproc);1399 rproc_free(r5_cores[i]->rproc);1400 }1401 i--;1402 }1403 kfree(r5_cores);1404 kfree(child_devs);1405 return ret;1406}1407 1408static void zynqmp_r5_cluster_exit(void *data)1409{1410 struct platform_device *pdev = data;1411 struct zynqmp_r5_cluster *cluster;1412 struct zynqmp_r5_core *r5_core;1413 int i;1414 1415 cluster = platform_get_drvdata(pdev);1416 if (!cluster)1417 return;1418 1419 for (i = 0; i < cluster->core_count; i++) {1420 r5_core = cluster->r5_cores[i];1421 zynqmp_r5_free_mbox(r5_core->ipi);1422 iounmap(r5_core->rsc_tbl_va);1423 of_reserved_mem_device_release(r5_core->dev);1424 put_device(r5_core->dev);1425 rproc_del(r5_core->rproc);1426 rproc_free(r5_core->rproc);1427 }1428 1429 kfree(cluster->r5_cores);1430 kfree(cluster);1431 platform_set_drvdata(pdev, NULL);1432}1433 1434/*1435 * zynqmp_r5_remoteproc_probe()1436 * parse device-tree, initialize hardware and allocate required resources1437 * and remoteproc ops1438 *1439 * @pdev: domain platform device for R5 cluster1440 *1441 * Return: 0 for success and < 0 for failure.1442 */1443static int zynqmp_r5_remoteproc_probe(struct platform_device *pdev)1444{1445 struct zynqmp_r5_cluster *cluster;1446 struct device *dev = &pdev->dev;1447 int ret;1448 1449 cluster = kzalloc(sizeof(*cluster), GFP_KERNEL);1450 if (!cluster)1451 return -ENOMEM;1452 1453 cluster->dev = dev;1454 1455 ret = devm_of_platform_populate(dev);1456 if (ret) {1457 dev_err_probe(dev, ret, "failed to populate platform dev\n");1458 kfree(cluster);1459 return ret;1460 }1461 1462 /* wire in so each core can be cleaned up at driver remove */1463 platform_set_drvdata(pdev, cluster);1464 1465 ret = zynqmp_r5_cluster_init(cluster);1466 if (ret) {1467 kfree(cluster);1468 platform_set_drvdata(pdev, NULL);1469 dev_err_probe(dev, ret, "Invalid r5f subsystem device tree\n");1470 return ret;1471 }1472 1473 ret = devm_add_action_or_reset(dev, zynqmp_r5_cluster_exit, pdev);1474 if (ret)1475 return ret;1476 1477 return 0;1478}1479 1480/* Match table for OF platform binding */1481static const struct of_device_id zynqmp_r5_remoteproc_match[] = {1482 { .compatible = "xlnx,versal-net-r52fss", },1483 { .compatible = "xlnx,versal-r5fss", },1484 { .compatible = "xlnx,zynqmp-r5fss", },1485 { /* end of list */ },1486};1487MODULE_DEVICE_TABLE(of, zynqmp_r5_remoteproc_match);1488 1489static struct platform_driver zynqmp_r5_remoteproc_driver = {1490 .probe = zynqmp_r5_remoteproc_probe,1491 .driver = {1492 .name = "zynqmp_r5_remoteproc",1493 .of_match_table = zynqmp_r5_remoteproc_match,1494 },1495};1496module_platform_driver(zynqmp_r5_remoteproc_driver);1497 1498MODULE_DESCRIPTION("Xilinx R5F remote processor driver");1499MODULE_AUTHOR("Xilinx Inc.");1500MODULE_LICENSE("GPL");1501