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1// SPDX-License-Identifier: GPL-2.0-only2/*3 * Dallas DS1302 RTC Support4 *5 * Copyright (C) 2002 David McCullough6 * Copyright (C) 2003 - 2007 Paul Mundt7 */8 9#include <linux/bcd.h>10#include <linux/init.h>11#include <linux/io.h>12#include <linux/kernel.h>13#include <linux/module.h>14#include <linux/of.h>15#include <linux/rtc.h>16#include <linux/spi/spi.h>17 18#define RTC_CMD_READ 0x81 /* Read command */19#define RTC_CMD_WRITE 0x80 /* Write command */20 21#define RTC_CMD_WRITE_ENABLE 0x00 /* Write enable */22#define RTC_CMD_WRITE_DISABLE 0x80 /* Write disable */23 24#define RTC_ADDR_RAM0 0x20 /* Address of RAM0 */25#define RTC_ADDR_TCR 0x08 /* Address of trickle charge register */26#define RTC_CLCK_BURST 0x1F /* Address of clock burst */27#define RTC_CLCK_LEN 0x08 /* Size of clock burst */28#define RTC_ADDR_CTRL 0x07 /* Address of control register */29#define RTC_ADDR_YEAR 0x06 /* Address of year register */30#define RTC_ADDR_DAY 0x05 /* Address of day of week register */31#define RTC_ADDR_MON 0x04 /* Address of month register */32#define RTC_ADDR_DATE 0x03 /* Address of day of month register */33#define RTC_ADDR_HOUR 0x02 /* Address of hour register */34#define RTC_ADDR_MIN 0x01 /* Address of minute register */35#define RTC_ADDR_SEC 0x00 /* Address of second register */36 37static int ds1302_rtc_set_time(struct device *dev, struct rtc_time *time)38{39 struct spi_device *spi = dev_get_drvdata(dev);40 u8 buf[1 + RTC_CLCK_LEN];41 u8 *bp;42 int status;43 44 /* Enable writing */45 bp = buf;46 *bp++ = RTC_ADDR_CTRL << 1 | RTC_CMD_WRITE;47 *bp++ = RTC_CMD_WRITE_ENABLE;48 49 status = spi_write_then_read(spi, buf, 2,50 NULL, 0);51 if (status)52 return status;53 54 /* Write registers starting at the first time/date address. */55 bp = buf;56 *bp++ = RTC_CLCK_BURST << 1 | RTC_CMD_WRITE;57 58 *bp++ = bin2bcd(time->tm_sec);59 *bp++ = bin2bcd(time->tm_min);60 *bp++ = bin2bcd(time->tm_hour);61 *bp++ = bin2bcd(time->tm_mday);62 *bp++ = bin2bcd(time->tm_mon + 1);63 *bp++ = time->tm_wday + 1;64 *bp++ = bin2bcd(time->tm_year % 100);65 *bp++ = RTC_CMD_WRITE_DISABLE;66 67 /* use write-then-read since dma from stack is nonportable */68 return spi_write_then_read(spi, buf, sizeof(buf),69 NULL, 0);70}71 72static int ds1302_rtc_get_time(struct device *dev, struct rtc_time *time)73{74 struct spi_device *spi = dev_get_drvdata(dev);75 u8 addr = RTC_CLCK_BURST << 1 | RTC_CMD_READ;76 u8 buf[RTC_CLCK_LEN - 1];77 int status;78 79 /* Use write-then-read to get all the date/time registers80 * since dma from stack is nonportable81 */82 status = spi_write_then_read(spi, &addr, sizeof(addr),83 buf, sizeof(buf));84 if (status < 0)85 return status;86 87 /* Decode the registers */88 time->tm_sec = bcd2bin(buf[RTC_ADDR_SEC]);89 time->tm_min = bcd2bin(buf[RTC_ADDR_MIN]);90 time->tm_hour = bcd2bin(buf[RTC_ADDR_HOUR]);91 time->tm_wday = buf[RTC_ADDR_DAY] - 1;92 time->tm_mday = bcd2bin(buf[RTC_ADDR_DATE]);93 time->tm_mon = bcd2bin(buf[RTC_ADDR_MON]) - 1;94 time->tm_year = bcd2bin(buf[RTC_ADDR_YEAR]) + 100;95 96 return 0;97}98 99static const struct rtc_class_ops ds1302_rtc_ops = {100 .read_time = ds1302_rtc_get_time,101 .set_time = ds1302_rtc_set_time,102};103 104static int ds1302_probe(struct spi_device *spi)105{106 struct rtc_device *rtc;107 u8 addr;108 u8 buf[4];109 u8 *bp;110 int status;111 112 /* Sanity check board setup data. This may be hooked up113 * in 3wire mode, but we don't care. Note that unless114 * there's an inverter in place, this needs SPI_CS_HIGH!115 */116 if (spi->bits_per_word && (spi->bits_per_word != 8)) {117 dev_err(&spi->dev, "bad word length\n");118 return -EINVAL;119 } else if (spi->max_speed_hz > 2000000) {120 dev_err(&spi->dev, "speed is too high\n");121 return -EINVAL;122 } else if (spi->mode & SPI_CPHA) {123 dev_err(&spi->dev, "bad mode\n");124 return -EINVAL;125 }126 127 addr = RTC_ADDR_CTRL << 1 | RTC_CMD_READ;128 status = spi_write_then_read(spi, &addr, sizeof(addr), buf, 1);129 if (status < 0) {130 dev_err(&spi->dev, "control register read error %d\n",131 status);132 return status;133 }134 135 if ((buf[0] & ~RTC_CMD_WRITE_DISABLE) != 0) {136 status = spi_write_then_read(spi, &addr, sizeof(addr), buf, 1);137 if (status < 0) {138 dev_err(&spi->dev, "control register read error %d\n",139 status);140 return status;141 }142 143 if ((buf[0] & ~RTC_CMD_WRITE_DISABLE) != 0) {144 dev_err(&spi->dev, "junk in control register\n");145 return -ENODEV;146 }147 }148 if (buf[0] == 0) {149 bp = buf;150 *bp++ = RTC_ADDR_CTRL << 1 | RTC_CMD_WRITE;151 *bp++ = RTC_CMD_WRITE_DISABLE;152 153 status = spi_write_then_read(spi, buf, 2, NULL, 0);154 if (status < 0) {155 dev_err(&spi->dev, "control register write error %d\n",156 status);157 return status;158 }159 160 addr = RTC_ADDR_CTRL << 1 | RTC_CMD_READ;161 status = spi_write_then_read(spi, &addr, sizeof(addr), buf, 1);162 if (status < 0) {163 dev_err(&spi->dev,164 "error %d reading control register\n",165 status);166 return status;167 }168 169 if (buf[0] != RTC_CMD_WRITE_DISABLE) {170 dev_err(&spi->dev, "failed to detect chip\n");171 return -ENODEV;172 }173 }174 175 spi_set_drvdata(spi, spi);176 177 rtc = devm_rtc_device_register(&spi->dev, "ds1302",178 &ds1302_rtc_ops, THIS_MODULE);179 if (IS_ERR(rtc)) {180 status = PTR_ERR(rtc);181 dev_err(&spi->dev, "error %d registering rtc\n", status);182 return status;183 }184 185 return 0;186}187 188#ifdef CONFIG_OF189static const struct of_device_id ds1302_dt_ids[] = {190 { .compatible = "maxim,ds1302", },191 { /* sentinel */ }192};193MODULE_DEVICE_TABLE(of, ds1302_dt_ids);194#endif195 196static const struct spi_device_id ds1302_spi_ids[] = {197 { .name = "ds1302", },198 { /* sentinel */ }199};200MODULE_DEVICE_TABLE(spi, ds1302_spi_ids);201 202static struct spi_driver ds1302_driver = {203 .driver.name = "rtc-ds1302",204 .driver.of_match_table = of_match_ptr(ds1302_dt_ids),205 .probe = ds1302_probe,206 .id_table = ds1302_spi_ids,207};208 209module_spi_driver(ds1302_driver);210 211MODULE_DESCRIPTION("Dallas DS1302 RTC driver");212MODULE_AUTHOR("Paul Mundt, David McCullough");213MODULE_LICENSE("GPL v2");214