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1// SPDX-License-Identifier: GPL-2.0-only2/*3 * ST M48T59 RTC driver4 *5 * Copyright (c) 2007 Wind River Systems, Inc.6 *7 * Author: Mark Zhan <rongkai.zhan@windriver.com>8 */9 10#include <linux/kernel.h>11#include <linux/module.h>12#include <linux/init.h>13#include <linux/io.h>14#include <linux/device.h>15#include <linux/platform_device.h>16#include <linux/rtc.h>17#include <linux/rtc/m48t59.h>18#include <linux/bcd.h>19#include <linux/slab.h>20 21#ifndef NO_IRQ22#define NO_IRQ (-1)23#endif24 25#define M48T59_READ(reg) (pdata->read_byte(dev, pdata->offset + reg))26#define M48T59_WRITE(val, reg) \27 (pdata->write_byte(dev, pdata->offset + reg, val))28 29#define M48T59_SET_BITS(mask, reg) \30 M48T59_WRITE((M48T59_READ(reg) | (mask)), (reg))31#define M48T59_CLEAR_BITS(mask, reg) \32 M48T59_WRITE((M48T59_READ(reg) & ~(mask)), (reg))33 34struct m48t59_private {35 void __iomem *ioaddr;36 int irq;37 struct rtc_device *rtc;38 spinlock_t lock; /* serialize the NVRAM and RTC access */39};40 41/*42 * This is the generic access method when the chip is memory-mapped43 */44static void45m48t59_mem_writeb(struct device *dev, u32 ofs, u8 val)46{47 struct m48t59_private *m48t59 = dev_get_drvdata(dev);48 49 writeb(val, m48t59->ioaddr+ofs);50}51 52static u853m48t59_mem_readb(struct device *dev, u32 ofs)54{55 struct m48t59_private *m48t59 = dev_get_drvdata(dev);56 57 return readb(m48t59->ioaddr+ofs);58}59 60/*61 * NOTE: M48T59 only uses BCD mode62 */63static int m48t59_rtc_read_time(struct device *dev, struct rtc_time *tm)64{65 struct m48t59_plat_data *pdata = dev_get_platdata(dev);66 struct m48t59_private *m48t59 = dev_get_drvdata(dev);67 unsigned long flags;68 u8 val;69 70 spin_lock_irqsave(&m48t59->lock, flags);71 /* Issue the READ command */72 M48T59_SET_BITS(M48T59_CNTL_READ, M48T59_CNTL);73 74 tm->tm_year = bcd2bin(M48T59_READ(M48T59_YEAR));75 /* tm_mon is 0-11 */76 tm->tm_mon = bcd2bin(M48T59_READ(M48T59_MONTH)) - 1;77 tm->tm_mday = bcd2bin(M48T59_READ(M48T59_MDAY));78 79 val = M48T59_READ(M48T59_WDAY);80 if ((pdata->type == M48T59RTC_TYPE_M48T59) &&81 (val & M48T59_WDAY_CEB) && (val & M48T59_WDAY_CB)) {82 dev_dbg(dev, "Century bit is enabled\n");83 tm->tm_year += 100; /* one century */84 }85#ifdef CONFIG_SPARC86 /* Sun SPARC machines count years since 1968 */87 tm->tm_year += 68;88#endif89 90 tm->tm_wday = bcd2bin(val & 0x07);91 tm->tm_hour = bcd2bin(M48T59_READ(M48T59_HOUR) & 0x3F);92 tm->tm_min = bcd2bin(M48T59_READ(M48T59_MIN) & 0x7F);93 tm->tm_sec = bcd2bin(M48T59_READ(M48T59_SEC) & 0x7F);94 95 /* Clear the READ bit */96 M48T59_CLEAR_BITS(M48T59_CNTL_READ, M48T59_CNTL);97 spin_unlock_irqrestore(&m48t59->lock, flags);98 99 dev_dbg(dev, "RTC read time %ptR\n", tm);100 return 0;101}102 103static int m48t59_rtc_set_time(struct device *dev, struct rtc_time *tm)104{105 struct m48t59_plat_data *pdata = dev_get_platdata(dev);106 struct m48t59_private *m48t59 = dev_get_drvdata(dev);107 unsigned long flags;108 u8 val = 0;109 int year = tm->tm_year;110 111#ifdef CONFIG_SPARC112 /* Sun SPARC machines count years since 1968 */113 year -= 68;114#endif115 116 dev_dbg(dev, "RTC set time %04d-%02d-%02d %02d/%02d/%02d\n",117 year + 1900, tm->tm_mon, tm->tm_mday,118 tm->tm_hour, tm->tm_min, tm->tm_sec);119 120 if (year < 0)121 return -EINVAL;122 123 spin_lock_irqsave(&m48t59->lock, flags);124 /* Issue the WRITE command */125 M48T59_SET_BITS(M48T59_CNTL_WRITE, M48T59_CNTL);126 127 M48T59_WRITE((bin2bcd(tm->tm_sec) & 0x7F), M48T59_SEC);128 M48T59_WRITE((bin2bcd(tm->tm_min) & 0x7F), M48T59_MIN);129 M48T59_WRITE((bin2bcd(tm->tm_hour) & 0x3F), M48T59_HOUR);130 M48T59_WRITE((bin2bcd(tm->tm_mday) & 0x3F), M48T59_MDAY);131 /* tm_mon is 0-11 */132 M48T59_WRITE((bin2bcd(tm->tm_mon + 1) & 0x1F), M48T59_MONTH);133 M48T59_WRITE(bin2bcd(year % 100), M48T59_YEAR);134 135 if (pdata->type == M48T59RTC_TYPE_M48T59 && (year >= 100))136 val = (M48T59_WDAY_CEB | M48T59_WDAY_CB);137 val |= (bin2bcd(tm->tm_wday) & 0x07);138 M48T59_WRITE(val, M48T59_WDAY);139 140 /* Clear the WRITE bit */141 M48T59_CLEAR_BITS(M48T59_CNTL_WRITE, M48T59_CNTL);142 spin_unlock_irqrestore(&m48t59->lock, flags);143 return 0;144}145 146/*147 * Read alarm time and date in RTC148 */149static int m48t59_rtc_readalarm(struct device *dev, struct rtc_wkalrm *alrm)150{151 struct m48t59_plat_data *pdata = dev_get_platdata(dev);152 struct m48t59_private *m48t59 = dev_get_drvdata(dev);153 struct rtc_time *tm = &alrm->time;154 unsigned long flags;155 u8 val;156 157 /* If no irq, we don't support ALARM */158 if (m48t59->irq == NO_IRQ)159 return -EIO;160 161 spin_lock_irqsave(&m48t59->lock, flags);162 /* Issue the READ command */163 M48T59_SET_BITS(M48T59_CNTL_READ, M48T59_CNTL);164 165 tm->tm_year = bcd2bin(M48T59_READ(M48T59_YEAR));166#ifdef CONFIG_SPARC167 /* Sun SPARC machines count years since 1968 */168 tm->tm_year += 68;169#endif170 /* tm_mon is 0-11 */171 tm->tm_mon = bcd2bin(M48T59_READ(M48T59_MONTH)) - 1;172 173 val = M48T59_READ(M48T59_WDAY);174 if ((val & M48T59_WDAY_CEB) && (val & M48T59_WDAY_CB))175 tm->tm_year += 100; /* one century */176 177 tm->tm_mday = bcd2bin(M48T59_READ(M48T59_ALARM_DATE));178 tm->tm_hour = bcd2bin(M48T59_READ(M48T59_ALARM_HOUR));179 tm->tm_min = bcd2bin(M48T59_READ(M48T59_ALARM_MIN));180 tm->tm_sec = bcd2bin(M48T59_READ(M48T59_ALARM_SEC));181 182 /* Clear the READ bit */183 M48T59_CLEAR_BITS(M48T59_CNTL_READ, M48T59_CNTL);184 spin_unlock_irqrestore(&m48t59->lock, flags);185 186 dev_dbg(dev, "RTC read alarm time %ptR\n", tm);187 return rtc_valid_tm(tm);188}189 190/*191 * Set alarm time and date in RTC192 */193static int m48t59_rtc_setalarm(struct device *dev, struct rtc_wkalrm *alrm)194{195 struct m48t59_plat_data *pdata = dev_get_platdata(dev);196 struct m48t59_private *m48t59 = dev_get_drvdata(dev);197 struct rtc_time *tm = &alrm->time;198 u8 mday, hour, min, sec;199 unsigned long flags;200 int year = tm->tm_year;201 202#ifdef CONFIG_SPARC203 /* Sun SPARC machines count years since 1968 */204 year -= 68;205#endif206 207 /* If no irq, we don't support ALARM */208 if (m48t59->irq == NO_IRQ)209 return -EIO;210 211 if (year < 0)212 return -EINVAL;213 214 /*215 * 0xff means "always match"216 */217 mday = tm->tm_mday;218 mday = (mday >= 1 && mday <= 31) ? bin2bcd(mday) : 0xff;219 if (mday == 0xff)220 mday = M48T59_READ(M48T59_MDAY);221 222 hour = tm->tm_hour;223 hour = (hour < 24) ? bin2bcd(hour) : 0x00;224 225 min = tm->tm_min;226 min = (min < 60) ? bin2bcd(min) : 0x00;227 228 sec = tm->tm_sec;229 sec = (sec < 60) ? bin2bcd(sec) : 0x00;230 231 spin_lock_irqsave(&m48t59->lock, flags);232 /* Issue the WRITE command */233 M48T59_SET_BITS(M48T59_CNTL_WRITE, M48T59_CNTL);234 235 M48T59_WRITE(mday, M48T59_ALARM_DATE);236 M48T59_WRITE(hour, M48T59_ALARM_HOUR);237 M48T59_WRITE(min, M48T59_ALARM_MIN);238 M48T59_WRITE(sec, M48T59_ALARM_SEC);239 240 /* Clear the WRITE bit */241 M48T59_CLEAR_BITS(M48T59_CNTL_WRITE, M48T59_CNTL);242 spin_unlock_irqrestore(&m48t59->lock, flags);243 244 dev_dbg(dev, "RTC set alarm time %04d-%02d-%02d %02d/%02d/%02d\n",245 year + 1900, tm->tm_mon, tm->tm_mday,246 tm->tm_hour, tm->tm_min, tm->tm_sec);247 return 0;248}249 250/*251 * Handle commands from user-space252 */253static int m48t59_rtc_alarm_irq_enable(struct device *dev, unsigned int enabled)254{255 struct m48t59_plat_data *pdata = dev_get_platdata(dev);256 struct m48t59_private *m48t59 = dev_get_drvdata(dev);257 unsigned long flags;258 259 spin_lock_irqsave(&m48t59->lock, flags);260 if (enabled)261 M48T59_WRITE(M48T59_INTR_AFE, M48T59_INTR);262 else263 M48T59_WRITE(0x00, M48T59_INTR);264 spin_unlock_irqrestore(&m48t59->lock, flags);265 266 return 0;267}268 269static int m48t59_rtc_proc(struct device *dev, struct seq_file *seq)270{271 struct m48t59_plat_data *pdata = dev_get_platdata(dev);272 struct m48t59_private *m48t59 = dev_get_drvdata(dev);273 unsigned long flags;274 u8 val;275 276 spin_lock_irqsave(&m48t59->lock, flags);277 val = M48T59_READ(M48T59_FLAGS);278 spin_unlock_irqrestore(&m48t59->lock, flags);279 280 seq_printf(seq, "battery\t\t: %s\n",281 (val & M48T59_FLAGS_BF) ? "low" : "normal");282 return 0;283}284 285/*286 * IRQ handler for the RTC287 */288static irqreturn_t m48t59_rtc_interrupt(int irq, void *dev_id)289{290 struct device *dev = (struct device *)dev_id;291 struct m48t59_plat_data *pdata = dev_get_platdata(dev);292 struct m48t59_private *m48t59 = dev_get_drvdata(dev);293 u8 event;294 295 spin_lock(&m48t59->lock);296 event = M48T59_READ(M48T59_FLAGS);297 spin_unlock(&m48t59->lock);298 299 if (event & M48T59_FLAGS_AF) {300 rtc_update_irq(m48t59->rtc, 1, (RTC_AF | RTC_IRQF));301 return IRQ_HANDLED;302 }303 304 return IRQ_NONE;305}306 307static const struct rtc_class_ops m48t59_rtc_ops = {308 .read_time = m48t59_rtc_read_time,309 .set_time = m48t59_rtc_set_time,310 .read_alarm = m48t59_rtc_readalarm,311 .set_alarm = m48t59_rtc_setalarm,312 .proc = m48t59_rtc_proc,313 .alarm_irq_enable = m48t59_rtc_alarm_irq_enable,314};315 316static int m48t59_nvram_read(void *priv, unsigned int offset, void *val,317 size_t size)318{319 struct platform_device *pdev = priv;320 struct device *dev = &pdev->dev;321 struct m48t59_plat_data *pdata = dev_get_platdata(&pdev->dev);322 struct m48t59_private *m48t59 = platform_get_drvdata(pdev);323 ssize_t cnt = 0;324 unsigned long flags;325 u8 *buf = val;326 327 spin_lock_irqsave(&m48t59->lock, flags);328 329 for (; cnt < size; cnt++)330 *buf++ = M48T59_READ(cnt);331 332 spin_unlock_irqrestore(&m48t59->lock, flags);333 334 return 0;335}336 337static int m48t59_nvram_write(void *priv, unsigned int offset, void *val,338 size_t size)339{340 struct platform_device *pdev = priv;341 struct device *dev = &pdev->dev;342 struct m48t59_plat_data *pdata = dev_get_platdata(&pdev->dev);343 struct m48t59_private *m48t59 = platform_get_drvdata(pdev);344 ssize_t cnt = 0;345 unsigned long flags;346 u8 *buf = val;347 348 spin_lock_irqsave(&m48t59->lock, flags);349 350 for (; cnt < size; cnt++)351 M48T59_WRITE(*buf++, cnt);352 353 spin_unlock_irqrestore(&m48t59->lock, flags);354 355 return 0;356}357 358static int m48t59_rtc_probe(struct platform_device *pdev)359{360 struct m48t59_plat_data *pdata = dev_get_platdata(&pdev->dev);361 struct m48t59_private *m48t59 = NULL;362 struct resource *res;363 int ret = -ENOMEM;364 struct nvmem_config nvmem_cfg = {365 .name = "m48t59-",366 .word_size = 1,367 .stride = 1,368 .reg_read = m48t59_nvram_read,369 .reg_write = m48t59_nvram_write,370 .priv = pdev,371 };372 373 /* This chip could be memory-mapped or I/O-mapped */374 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);375 if (!res) {376 res = platform_get_resource(pdev, IORESOURCE_IO, 0);377 if (!res)378 return -EINVAL;379 }380 381 if (res->flags & IORESOURCE_IO) {382 /* If we are I/O-mapped, the platform should provide383 * the operations accessing chip registers.384 */385 if (!pdata || !pdata->write_byte || !pdata->read_byte)386 return -EINVAL;387 } else if (res->flags & IORESOURCE_MEM) {388 /* we are memory-mapped */389 if (!pdata) {390 pdata = devm_kzalloc(&pdev->dev, sizeof(*pdata),391 GFP_KERNEL);392 if (!pdata)393 return -ENOMEM;394 /* Ensure we only kmalloc platform data once */395 pdev->dev.platform_data = pdata;396 }397 if (!pdata->type)398 pdata->type = M48T59RTC_TYPE_M48T59;399 400 /* Try to use the generic memory read/write ops */401 if (!pdata->write_byte)402 pdata->write_byte = m48t59_mem_writeb;403 if (!pdata->read_byte)404 pdata->read_byte = m48t59_mem_readb;405 }406 407 m48t59 = devm_kzalloc(&pdev->dev, sizeof(*m48t59), GFP_KERNEL);408 if (!m48t59)409 return -ENOMEM;410 411 m48t59->ioaddr = pdata->ioaddr;412 413 if (!m48t59->ioaddr) {414 /* ioaddr not mapped externally */415 m48t59->ioaddr = devm_ioremap(&pdev->dev, res->start,416 resource_size(res));417 if (!m48t59->ioaddr)418 return ret;419 }420 421 /* Try to get irq number. We also can work in422 * the mode without IRQ.423 */424 m48t59->irq = platform_get_irq_optional(pdev, 0);425 if (m48t59->irq <= 0)426 m48t59->irq = NO_IRQ;427 428 if (m48t59->irq != NO_IRQ) {429 ret = devm_request_irq(&pdev->dev, m48t59->irq,430 m48t59_rtc_interrupt, IRQF_SHARED,431 "rtc-m48t59", &pdev->dev);432 if (ret)433 return ret;434 }435 436 m48t59->rtc = devm_rtc_allocate_device(&pdev->dev);437 if (IS_ERR(m48t59->rtc))438 return PTR_ERR(m48t59->rtc);439 440 switch (pdata->type) {441 case M48T59RTC_TYPE_M48T59:442 pdata->offset = 0x1ff0;443 break;444 case M48T59RTC_TYPE_M48T02:445 clear_bit(RTC_FEATURE_ALARM, m48t59->rtc->features);446 pdata->offset = 0x7f0;447 break;448 case M48T59RTC_TYPE_M48T08:449 clear_bit(RTC_FEATURE_ALARM, m48t59->rtc->features);450 pdata->offset = 0x1ff0;451 break;452 default:453 dev_err(&pdev->dev, "Unknown RTC type\n");454 return -ENODEV;455 }456 457 spin_lock_init(&m48t59->lock);458 platform_set_drvdata(pdev, m48t59);459 460 m48t59->rtc->ops = &m48t59_rtc_ops;461 m48t59->rtc->range_min = RTC_TIMESTAMP_BEGIN_1900;462 m48t59->rtc->range_max = RTC_TIMESTAMP_END_2099;463 464 nvmem_cfg.size = pdata->offset;465 ret = devm_rtc_nvmem_register(m48t59->rtc, &nvmem_cfg);466 if (ret)467 return ret;468 469 ret = devm_rtc_register_device(m48t59->rtc);470 if (ret)471 return ret;472 473 return 0;474}475 476/* work with hotplug and coldplug */477MODULE_ALIAS("platform:rtc-m48t59");478 479static struct platform_driver m48t59_rtc_driver = {480 .driver = {481 .name = "rtc-m48t59",482 },483 .probe = m48t59_rtc_probe,484};485 486module_platform_driver(m48t59_rtc_driver);487 488MODULE_AUTHOR("Mark Zhan <rongkai.zhan@windriver.com>");489MODULE_DESCRIPTION("M48T59/M48T02/M48T08 RTC driver");490MODULE_LICENSE("GPL");491