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1// SPDX-License-Identifier: GPL-2.0-only2#include <linux/bcd.h>3#include <linux/delay.h>4#include <linux/export.h>5#include <linux/mc146818rtc.h>6 7#ifdef CONFIG_ACPI8#include <linux/acpi.h>9#endif10 11#define UIP_RECHECK_DELAY 100 /* usec */12#define UIP_RECHECK_DELAY_MS (USEC_PER_MSEC / UIP_RECHECK_DELAY)13#define UIP_RECHECK_LOOPS_MS(x) (x / UIP_RECHECK_DELAY_MS)14 15/*16 * Execute a function while the UIP (Update-in-progress) bit of the RTC is17 * unset. The timeout is configurable by the caller in ms.18 *19 * Warning: callback may be executed more then once.20 */21bool mc146818_avoid_UIP(void (*callback)(unsigned char seconds, void *param),22 int timeout,23 void *param)24{25 int i;26 unsigned long flags;27 unsigned char seconds;28 29 for (i = 0; UIP_RECHECK_LOOPS_MS(i) < timeout; i++) {30 spin_lock_irqsave(&rtc_lock, flags);31 32 /*33 * Check whether there is an update in progress during which the34 * readout is unspecified. The maximum update time is ~2ms. Poll35 * for completion.36 *37 * Store the second value before checking UIP so a long lasting38 * NMI which happens to hit after the UIP check cannot make39 * an update cycle invisible.40 */41 seconds = CMOS_READ(RTC_SECONDS);42 43 if (CMOS_READ(RTC_FREQ_SELECT) & RTC_UIP) {44 spin_unlock_irqrestore(&rtc_lock, flags);45 udelay(UIP_RECHECK_DELAY);46 continue;47 }48 49 /* Revalidate the above readout */50 if (seconds != CMOS_READ(RTC_SECONDS)) {51 spin_unlock_irqrestore(&rtc_lock, flags);52 continue;53 }54 55 if (callback)56 callback(seconds, param);57 58 /*59 * Check for the UIP bit again. If it is set now then60 * the above values may contain garbage.61 */62 if (CMOS_READ(RTC_FREQ_SELECT) & RTC_UIP) {63 spin_unlock_irqrestore(&rtc_lock, flags);64 udelay(UIP_RECHECK_DELAY);65 continue;66 }67 68 /*69 * A NMI might have interrupted the above sequence so check70 * whether the seconds value has changed which indicates that71 * the NMI took longer than the UIP bit was set. Unlikely, but72 * possible and there is also virt...73 */74 if (seconds != CMOS_READ(RTC_SECONDS)) {75 spin_unlock_irqrestore(&rtc_lock, flags);76 continue;77 }78 spin_unlock_irqrestore(&rtc_lock, flags);79 80 if (UIP_RECHECK_LOOPS_MS(i) >= 100)81 pr_warn("Reading current time from RTC took around %li ms\n",82 UIP_RECHECK_LOOPS_MS(i));83 84 return true;85 }86 return false;87}88EXPORT_SYMBOL_GPL(mc146818_avoid_UIP);89 90/*91 * If the UIP (Update-in-progress) bit of the RTC is set for more then92 * 10ms, the RTC is apparently broken or not present.93 */94bool mc146818_does_rtc_work(void)95{96 return mc146818_avoid_UIP(NULL, 1000, NULL);97}98EXPORT_SYMBOL_GPL(mc146818_does_rtc_work);99 100struct mc146818_get_time_callback_param {101 struct rtc_time *time;102 unsigned char ctrl;103#ifdef CONFIG_ACPI104 unsigned char century;105#endif106#ifdef CONFIG_MACH_DECSTATION107 unsigned int real_year;108#endif109};110 111static void mc146818_get_time_callback(unsigned char seconds, void *param_in)112{113 struct mc146818_get_time_callback_param *p = param_in;114 115 /*116 * Only the values that we read from the RTC are set. We leave117 * tm_wday, tm_yday and tm_isdst untouched. Even though the118 * RTC has RTC_DAY_OF_WEEK, we ignore it, as it is only updated119 * by the RTC when initially set to a non-zero value.120 */121 p->time->tm_sec = seconds;122 p->time->tm_min = CMOS_READ(RTC_MINUTES);123 p->time->tm_hour = CMOS_READ(RTC_HOURS);124 p->time->tm_mday = CMOS_READ(RTC_DAY_OF_MONTH);125 p->time->tm_mon = CMOS_READ(RTC_MONTH);126 p->time->tm_year = CMOS_READ(RTC_YEAR);127#ifdef CONFIG_MACH_DECSTATION128 p->real_year = CMOS_READ(RTC_DEC_YEAR);129#endif130#ifdef CONFIG_ACPI131 if (acpi_gbl_FADT.header.revision >= FADT2_REVISION_ID &&132 acpi_gbl_FADT.century) {133 p->century = CMOS_READ(acpi_gbl_FADT.century);134 } else {135 p->century = 0;136 }137#endif138 139 p->ctrl = CMOS_READ(RTC_CONTROL);140}141 142/**143 * mc146818_get_time - Get the current time from the RTC144 * @time: pointer to struct rtc_time to store the current time145 * @timeout: timeout value in ms146 *147 * This function reads the current time from the RTC and stores it in the148 * provided struct rtc_time. The timeout parameter specifies the maximum149 * time to wait for the RTC to become ready.150 *151 * Return: 0 on success, -ETIMEDOUT if the RTC did not become ready within152 * the specified timeout, or another error code if an error occurred.153 */154int mc146818_get_time(struct rtc_time *time, int timeout)155{156 struct mc146818_get_time_callback_param p = {157 .time = time158 };159 160 if (!mc146818_avoid_UIP(mc146818_get_time_callback, timeout, &p)) {161 memset(time, 0, sizeof(*time));162 return -ETIMEDOUT;163 }164 165 if (!(p.ctrl & RTC_DM_BINARY) || RTC_ALWAYS_BCD)166 {167 time->tm_sec = bcd2bin(time->tm_sec);168 time->tm_min = bcd2bin(time->tm_min);169 time->tm_hour = bcd2bin(time->tm_hour);170 time->tm_mday = bcd2bin(time->tm_mday);171 time->tm_mon = bcd2bin(time->tm_mon);172 time->tm_year = bcd2bin(time->tm_year);173#ifdef CONFIG_ACPI174 p.century = bcd2bin(p.century);175#endif176 }177 178#ifdef CONFIG_MACH_DECSTATION179 time->tm_year += p.real_year - 72;180#endif181 182#ifdef CONFIG_ACPI183 if (p.century > 19)184 time->tm_year += (p.century - 19) * 100;185#endif186 187 /*188 * Account for differences between how the RTC uses the values189 * and how they are defined in a struct rtc_time;190 */191 if (time->tm_year <= 69)192 time->tm_year += 100;193 194 time->tm_mon--;195 196 return 0;197}198EXPORT_SYMBOL_GPL(mc146818_get_time);199 200/* AMD systems don't allow access to AltCentury with DV1 */201static bool apply_amd_register_a_behavior(void)202{203#ifdef CONFIG_X86204 if (boot_cpu_data.x86_vendor == X86_VENDOR_AMD ||205 boot_cpu_data.x86_vendor == X86_VENDOR_HYGON)206 return true;207#endif208 return false;209}210 211/* Set the current date and time in the real time clock. */212int mc146818_set_time(struct rtc_time *time)213{214 unsigned long flags;215 unsigned char mon, day, hrs, min, sec;216 unsigned char save_control, save_freq_select;217 unsigned int yrs;218#ifdef CONFIG_MACH_DECSTATION219 unsigned int real_yrs, leap_yr;220#endif221 unsigned char century = 0;222 223 yrs = time->tm_year;224 mon = time->tm_mon + 1; /* tm_mon starts at zero */225 day = time->tm_mday;226 hrs = time->tm_hour;227 min = time->tm_min;228 sec = time->tm_sec;229 230 if (yrs > 255) /* They are unsigned */231 return -EINVAL;232 233#ifdef CONFIG_MACH_DECSTATION234 real_yrs = yrs;235 leap_yr = ((!((yrs + 1900) % 4) && ((yrs + 1900) % 100)) ||236 !((yrs + 1900) % 400));237 yrs = 72;238 239 /*240 * We want to keep the year set to 73 until March241 * for non-leap years, so that Feb, 29th is handled242 * correctly.243 */244 if (!leap_yr && mon < 3) {245 real_yrs--;246 yrs = 73;247 }248#endif249 250#ifdef CONFIG_ACPI251 if (acpi_gbl_FADT.header.revision >= FADT2_REVISION_ID &&252 acpi_gbl_FADT.century) {253 century = (yrs + 1900) / 100;254 yrs %= 100;255 }256#endif257 258 /* These limits and adjustments are independent of259 * whether the chip is in binary mode or not.260 */261 if (yrs > 169)262 return -EINVAL;263 264 if (yrs >= 100)265 yrs -= 100;266 267 spin_lock_irqsave(&rtc_lock, flags);268 save_control = CMOS_READ(RTC_CONTROL);269 spin_unlock_irqrestore(&rtc_lock, flags);270 if (!(save_control & RTC_DM_BINARY) || RTC_ALWAYS_BCD) {271 sec = bin2bcd(sec);272 min = bin2bcd(min);273 hrs = bin2bcd(hrs);274 day = bin2bcd(day);275 mon = bin2bcd(mon);276 yrs = bin2bcd(yrs);277 century = bin2bcd(century);278 }279 280 spin_lock_irqsave(&rtc_lock, flags);281 save_control = CMOS_READ(RTC_CONTROL);282 CMOS_WRITE((save_control|RTC_SET), RTC_CONTROL);283 save_freq_select = CMOS_READ(RTC_FREQ_SELECT);284 if (apply_amd_register_a_behavior())285 CMOS_WRITE((save_freq_select & ~RTC_AMD_BANK_SELECT), RTC_FREQ_SELECT);286 else287 CMOS_WRITE((save_freq_select|RTC_DIV_RESET2), RTC_FREQ_SELECT);288 289#ifdef CONFIG_MACH_DECSTATION290 CMOS_WRITE(real_yrs, RTC_DEC_YEAR);291#endif292 CMOS_WRITE(yrs, RTC_YEAR);293 CMOS_WRITE(mon, RTC_MONTH);294 CMOS_WRITE(day, RTC_DAY_OF_MONTH);295 CMOS_WRITE(hrs, RTC_HOURS);296 CMOS_WRITE(min, RTC_MINUTES);297 CMOS_WRITE(sec, RTC_SECONDS);298#ifdef CONFIG_ACPI299 if (acpi_gbl_FADT.header.revision >= FADT2_REVISION_ID &&300 acpi_gbl_FADT.century)301 CMOS_WRITE(century, acpi_gbl_FADT.century);302#endif303 304 CMOS_WRITE(save_control, RTC_CONTROL);305 CMOS_WRITE(save_freq_select, RTC_FREQ_SELECT);306 307 spin_unlock_irqrestore(&rtc_lock, flags);308 309 return 0;310}311EXPORT_SYMBOL_GPL(mc146818_set_time);312