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1/* SPDX-License-Identifier: GPL-2.0 */2/*3 * Copyright IBM Corp. 2001, 20074 * Authors: Fritz Elfert (felfert@millenux.com)5 * Peter Tiedemann (ptiedem@de.ibm.com)6 * MPC additions :7 * Belinda Thompson (belindat@us.ibm.com)8 * Andy Richter (richtera@us.ibm.com)9 */10#ifndef _CTCM_FSMS_H_11#define _CTCM_FSMS_H_12 13#include <linux/module.h>14#include <linux/init.h>15#include <linux/kernel.h>16#include <linux/slab.h>17#include <linux/errno.h>18#include <linux/types.h>19#include <linux/interrupt.h>20#include <linux/timer.h>21#include <linux/bitops.h>22 23#include <linux/signal.h>24#include <linux/string.h>25 26#include <linux/ip.h>27#include <linux/if_arp.h>28#include <linux/tcp.h>29#include <linux/skbuff.h>30#include <linux/ctype.h>31#include <net/dst.h>32 33#include <linux/io.h>34#include <asm/ccwdev.h>35#include <asm/ccwgroup.h>36#include <linux/uaccess.h>37 38#include <asm/idals.h>39 40#include "fsm.h"41#include "ctcm_main.h"42 43/*44 * Definitions for the channel statemachine(s) for ctc and ctcmpc45 *46 * To allow better kerntyping, prefix-less definitions for channel states47 * and channel events have been replaced :48 * ch_event... -> ctc_ch_event...49 * CH_EVENT... -> CTC_EVENT...50 * ch_state... -> ctc_ch_state...51 * CH_STATE... -> CTC_STATE...52 */53/*54 * Events of the channel statemachine(s) for ctc and ctcmpc55 */56enum ctc_ch_events {57 /*58 * Events, representing return code of59 * I/O operations (ccw_device_start, ccw_device_halt et al.)60 */61 CTC_EVENT_IO_SUCCESS,62 CTC_EVENT_IO_EBUSY,63 CTC_EVENT_IO_ENODEV,64 CTC_EVENT_IO_UNKNOWN,65 66 CTC_EVENT_ATTNBUSY,67 CTC_EVENT_ATTN,68 CTC_EVENT_BUSY,69 /*70 * Events, representing unit-check71 */72 CTC_EVENT_UC_RCRESET,73 CTC_EVENT_UC_RSRESET,74 CTC_EVENT_UC_TXTIMEOUT,75 CTC_EVENT_UC_TXPARITY,76 CTC_EVENT_UC_HWFAIL,77 CTC_EVENT_UC_RXPARITY,78 CTC_EVENT_UC_ZERO,79 CTC_EVENT_UC_UNKNOWN,80 /*81 * Events, representing subchannel-check82 */83 CTC_EVENT_SC_UNKNOWN,84 /*85 * Events, representing machine checks86 */87 CTC_EVENT_MC_FAIL,88 CTC_EVENT_MC_GOOD,89 /*90 * Event, representing normal IRQ91 */92 CTC_EVENT_IRQ,93 CTC_EVENT_FINSTAT,94 /*95 * Event, representing timer expiry.96 */97 CTC_EVENT_TIMER,98 /*99 * Events, representing commands from upper levels.100 */101 CTC_EVENT_START,102 CTC_EVENT_STOP,103 CTC_NR_EVENTS,104 /*105 * additional MPC events106 */107 CTC_EVENT_SEND_XID = CTC_NR_EVENTS,108 CTC_EVENT_RSWEEP_TIMER,109 /*110 * MUST be always the last element!!111 */112 CTC_MPC_NR_EVENTS,113};114 115/*116 * States of the channel statemachine(s) for ctc and ctcmpc.117 */118enum ctc_ch_states {119 /*120 * Channel not assigned to any device,121 * initial state, direction invalid122 */123 CTC_STATE_IDLE,124 /*125 * Channel assigned but not operating126 */127 CTC_STATE_STOPPED,128 CTC_STATE_STARTWAIT,129 CTC_STATE_STARTRETRY,130 CTC_STATE_SETUPWAIT,131 CTC_STATE_RXINIT,132 CTC_STATE_TXINIT,133 CTC_STATE_RX,134 CTC_STATE_TX,135 CTC_STATE_RXIDLE,136 CTC_STATE_TXIDLE,137 CTC_STATE_RXERR,138 CTC_STATE_TXERR,139 CTC_STATE_TERM,140 CTC_STATE_DTERM,141 CTC_STATE_NOTOP,142 CTC_NR_STATES, /* MUST be the last element of non-expanded states */143 /*144 * additional MPC states145 */146 CH_XID0_PENDING = CTC_NR_STATES,147 CH_XID0_INPROGRESS,148 CH_XID7_PENDING,149 CH_XID7_PENDING1,150 CH_XID7_PENDING2,151 CH_XID7_PENDING3,152 CH_XID7_PENDING4,153 CTC_MPC_NR_STATES, /* MUST be the last element of expanded mpc states */154};155 156extern const char *ctc_ch_event_names[];157 158extern const char *ctc_ch_state_names[];159 160void ctcm_ccw_check_rc(struct channel *ch, int rc, char *msg);161void ctcm_purge_skb_queue(struct sk_buff_head *q);162 163/*164 * ----- non-static actions for ctcm channel statemachine -----165 *166 */167void ctcm_chx_txidle(fsm_instance *fi, int event, void *arg);168 169/*170 * ----- FSM (state/event/action) of the ctcm channel statemachine -----171 */172extern const fsm_node ch_fsm[];173extern int ch_fsm_len;174 175 176/*177 * ----- non-static actions for ctcmpc channel statemachine ----178 *179 */180/* shared :181void ctcm_chx_txidle(fsm_instance * fi, int event, void *arg);182 */183void ctcmpc_chx_rxidle(fsm_instance *fi, int event, void *arg);184 185/*186 * ----- FSM (state/event/action) of the ctcmpc channel statemachine -----187 */188extern const fsm_node ctcmpc_ch_fsm[];189extern int mpc_ch_fsm_len;190 191/*192 * Definitions for the device interface statemachine for ctc and mpc193 */194 195/*196 * States of the device interface statemachine.197 */198enum dev_states {199 DEV_STATE_STOPPED,200 DEV_STATE_STARTWAIT_RXTX,201 DEV_STATE_STARTWAIT_RX,202 DEV_STATE_STARTWAIT_TX,203 DEV_STATE_STOPWAIT_RXTX,204 DEV_STATE_STOPWAIT_RX,205 DEV_STATE_STOPWAIT_TX,206 DEV_STATE_RUNNING,207 /*208 * MUST be always the last element!!209 */210 CTCM_NR_DEV_STATES211};212 213extern const char *dev_state_names[];214 215/*216 * Events of the device interface statemachine.217 * ctcm and ctcmpc218 */219enum dev_events {220 DEV_EVENT_START,221 DEV_EVENT_STOP,222 DEV_EVENT_RXUP,223 DEV_EVENT_TXUP,224 DEV_EVENT_RXDOWN,225 DEV_EVENT_TXDOWN,226 DEV_EVENT_RESTART,227 /*228 * MUST be always the last element!!229 */230 CTCM_NR_DEV_EVENTS231};232 233extern const char *dev_event_names[];234 235/*236 * Actions for the device interface statemachine.237 * ctc and ctcmpc238 */239/*240static void dev_action_start(fsm_instance * fi, int event, void *arg);241static void dev_action_stop(fsm_instance * fi, int event, void *arg);242static void dev_action_restart(fsm_instance *fi, int event, void *arg);243static void dev_action_chup(fsm_instance * fi, int event, void *arg);244static void dev_action_chdown(fsm_instance * fi, int event, void *arg);245*/246 247/*248 * The (state/event/action) fsm table of the device interface statemachine.249 * ctcm and ctcmpc250 */251extern const fsm_node dev_fsm[];252extern int dev_fsm_len;253 254 255/*256 * Definitions for the MPC Group statemachine257 */258 259/*260 * MPC Group Station FSM States261 262State Name When In This State263====================== =======================================264MPCG_STATE_RESET Initial State When Driver Loaded265 We receive and send NOTHING266 267MPCG_STATE_INOP INOP Received.268 Group level non-recoverable error269 270MPCG_STATE_READY XID exchanges for at least 1 write and271 1 read channel have completed.272 Group is ready for data transfer.273 274States from ctc_mpc_alloc_channel275==============================================================276MPCG_STATE_XID2INITW Awaiting XID2(0) Initiation277 ATTN from other side will start278 XID negotiations.279 Y-side protocol only.280 281MPCG_STATE_XID2INITX XID2(0) negotiations are in progress.282 At least 1, but not all, XID2(0)'s283 have been received from partner.284 285MPCG_STATE_XID7INITW XID2(0) complete286 No XID2(7)'s have yet been received.287 XID2(7) negotiations pending.288 289MPCG_STATE_XID7INITX XID2(7) negotiations in progress.290 At least 1, but not all, XID2(7)'s291 have been received from partner.292 293MPCG_STATE_XID7INITF XID2(7) negotiations complete.294 Transitioning to READY.295 296MPCG_STATE_READY Ready for Data Transfer.297 298 299States from ctc_mpc_establish_connectivity call300==============================================================301MPCG_STATE_XID0IOWAIT Initiating XID2(0) negotiations.302 X-side protocol only.303 ATTN-BUSY from other side will convert304 this to Y-side protocol and the305 ctc_mpc_alloc_channel flow will begin.306 307MPCG_STATE_XID0IOWAIX XID2(0) negotiations are in progress.308 At least 1, but not all, XID2(0)'s309 have been received from partner.310 311MPCG_STATE_XID7INITI XID2(0) complete312 No XID2(7)'s have yet been received.313 XID2(7) negotiations pending.314 315MPCG_STATE_XID7INITZ XID2(7) negotiations in progress.316 At least 1, but not all, XID2(7)'s317 have been received from partner.318 319MPCG_STATE_XID7INITF XID2(7) negotiations complete.320 Transitioning to READY.321 322MPCG_STATE_READY Ready for Data Transfer.323 324*/325 326enum mpcg_events {327 MPCG_EVENT_INOP,328 MPCG_EVENT_DISCONC,329 MPCG_EVENT_XID0DO,330 MPCG_EVENT_XID2,331 MPCG_EVENT_XID2DONE,332 MPCG_EVENT_XID7DONE,333 MPCG_EVENT_TIMER,334 MPCG_EVENT_DOIO,335 MPCG_NR_EVENTS,336};337 338enum mpcg_states {339 MPCG_STATE_RESET,340 MPCG_STATE_INOP,341 MPCG_STATE_XID2INITW,342 MPCG_STATE_XID2INITX,343 MPCG_STATE_XID7INITW,344 MPCG_STATE_XID7INITX,345 MPCG_STATE_XID0IOWAIT,346 MPCG_STATE_XID0IOWAIX,347 MPCG_STATE_XID7INITI,348 MPCG_STATE_XID7INITZ,349 MPCG_STATE_XID7INITF,350 MPCG_STATE_FLOWC,351 MPCG_STATE_READY,352 MPCG_NR_STATES,353};354 355#endif356/* --- This is the END my friend --- */357