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1/* SPDX-License-Identifier: GPL-2.0-only */2/*3 * Copyright (c) 2005-2014 Brocade Communications Systems, Inc.4 * Copyright (c) 2014- QLogic Corporation.5 * All rights reserved6 * www.qlogic.com7 *8 * Linux driver for QLogic BR-series Fibre Channel Host Bus Adapter.9 */10#ifndef __BFA_H__11#define __BFA_H__12 13#include "bfad_drv.h"14#include "bfa_cs.h"15#include "bfa_plog.h"16#include "bfa_defs_svc.h"17#include "bfi.h"18#include "bfa_ioc.h"19 20struct bfa_s;21 22typedef void (*bfa_isr_func_t) (struct bfa_s *bfa, struct bfi_msg_s *m);23 24/*25 * Interrupt message handlers26 */27void bfa_isr_unhandled(struct bfa_s *bfa, struct bfi_msg_s *m);28 29/*30 * Request and response queue related defines31 */32#define BFA_REQQ_NELEMS_MIN	(4)33#define BFA_RSPQ_NELEMS_MIN	(4)34 35#define bfa_reqq_pi(__bfa, __reqq)	((__bfa)->iocfc.req_cq_pi[__reqq])36#define bfa_reqq_ci(__bfa, __reqq)					\37	(*(u32 *)((__bfa)->iocfc.req_cq_shadow_ci[__reqq].kva))38 39#define bfa_reqq_full(__bfa, __reqq)				\40	(((bfa_reqq_pi(__bfa, __reqq) + 1) &			\41	  ((__bfa)->iocfc.cfg.drvcfg.num_reqq_elems - 1)) ==	\42	 bfa_reqq_ci(__bfa, __reqq))43 44#define bfa_reqq_next(__bfa, __reqq)					\45	(bfa_reqq_full(__bfa, __reqq) ? NULL :				\46	 ((void *)((struct bfi_msg_s *)((__bfa)->iocfc.req_cq_ba[__reqq].kva) \47		   + bfa_reqq_pi((__bfa), (__reqq)))))48 49#define bfa_reqq_produce(__bfa, __reqq, __mh)  do {			\50		(__mh).mtag.h2i.qid     = (__bfa)->iocfc.hw_qid[__reqq];\51		(__bfa)->iocfc.req_cq_pi[__reqq]++;			\52		(__bfa)->iocfc.req_cq_pi[__reqq] &=			\53			((__bfa)->iocfc.cfg.drvcfg.num_reqq_elems - 1); \54		writel((__bfa)->iocfc.req_cq_pi[__reqq],		\55			(__bfa)->iocfc.bfa_regs.cpe_q_pi[__reqq]);	\56		} while (0)57 58#define bfa_rspq_pi(__bfa, __rspq)					\59	(*(u32 *)((__bfa)->iocfc.rsp_cq_shadow_pi[__rspq].kva))60 61#define bfa_rspq_ci(__bfa, __rspq)	((__bfa)->iocfc.rsp_cq_ci[__rspq])62#define bfa_rspq_elem(__bfa, __rspq, __ci)				\63	(&((struct bfi_msg_s *)((__bfa)->iocfc.rsp_cq_ba[__rspq].kva))[__ci])64 65#define CQ_INCR(__index, __size) do {			\66	(__index)++;					\67	(__index) &= ((__size) - 1);			\68} while (0)69 70/*71 * Circular queue usage assignments72 */73enum {74	BFA_REQQ_IOC	= 0,	/*  all low-priority IOC msgs	*/75	BFA_REQQ_FCXP	= 0,	/*  all FCXP messages		*/76	BFA_REQQ_LPS	= 0,	/*  all lport service msgs	*/77	BFA_REQQ_PORT	= 0,	/*  all port messages		*/78	BFA_REQQ_FLASH	= 0,	/*  for flash module		*/79	BFA_REQQ_DIAG	= 0,	/*  for diag module		*/80	BFA_REQQ_RPORT	= 0,	/*  all port messages		*/81	BFA_REQQ_SBOOT	= 0,	/*  all san boot messages	*/82	BFA_REQQ_QOS_LO	= 1,	/*  all low priority IO	*/83	BFA_REQQ_QOS_MD	= 2,	/*  all medium priority IO	*/84	BFA_REQQ_QOS_HI	= 3,	/*  all high priority IO	*/85};86 87static inline void88bfa_reqq_winit(struct bfa_reqq_wait_s *wqe, void (*qresume) (void *cbarg),89	       void *cbarg)90{91	wqe->qresume = qresume;92	wqe->cbarg = cbarg;93}94 95#define bfa_reqq(__bfa, __reqq)	(&(__bfa)->reqq_waitq[__reqq])96 97/*98 * static inline void99 * bfa_reqq_wait(struct bfa_s *bfa, int reqq, struct bfa_reqq_wait_s *wqe)100 */101#define bfa_reqq_wait(__bfa, __reqq, __wqe) do {			\102									\103		struct list_head *waitq = bfa_reqq(__bfa, __reqq);      \104									\105		WARN_ON(((__reqq) >= BFI_IOC_MAX_CQS));			\106		WARN_ON(!((__wqe)->qresume && (__wqe)->cbarg));		\107									\108		list_add_tail(&(__wqe)->qe, waitq);      \109	} while (0)110 111#define bfa_reqq_wcancel(__wqe)	list_del(&(__wqe)->qe)112 113#define bfa_cb_queue(__bfa, __hcb_qe, __cbfn, __cbarg) do {	\114		(__hcb_qe)->cbfn  = (__cbfn);      \115		(__hcb_qe)->cbarg = (__cbarg);      \116		(__hcb_qe)->pre_rmv = BFA_FALSE;		\117		list_add_tail(&(__hcb_qe)->qe, &(__bfa)->comp_q);      \118	} while (0)119 120#define bfa_cb_dequeue(__hcb_qe)	list_del(&(__hcb_qe)->qe)121 122#define bfa_cb_queue_once(__bfa, __hcb_qe, __cbfn, __cbarg) do {	\123		(__hcb_qe)->cbfn  = (__cbfn);      \124		(__hcb_qe)->cbarg = (__cbarg);      \125		if (!(__hcb_qe)->once) {      \126			list_add_tail(&(__hcb_qe)->qe, &(__bfa)->comp_q);      \127			(__hcb_qe)->once = BFA_TRUE;			\128		}							\129	} while (0)130 131#define bfa_cb_queue_status(__bfa, __hcb_qe, __status) do {		\132		(__hcb_qe)->fw_status = (__status);			\133		list_add_tail(&(__hcb_qe)->qe, &(__bfa)->comp_q);	\134} while (0)135 136#define bfa_cb_queue_done(__hcb_qe) do {	\137		(__hcb_qe)->once = BFA_FALSE;	\138	} while (0)139 140 141/*142 * PCI devices supported by the current BFA143 */144struct bfa_pciid_s {145	u16	device_id;146	u16	vendor_id;147};148 149extern char     bfa_version[];150 151struct bfa_iocfc_regs_s {152	void __iomem	*intr_status;153	void __iomem	*intr_mask;154	void __iomem	*cpe_q_pi[BFI_IOC_MAX_CQS];155	void __iomem	*cpe_q_ci[BFI_IOC_MAX_CQS];156	void __iomem	*cpe_q_ctrl[BFI_IOC_MAX_CQS];157	void __iomem	*rme_q_ci[BFI_IOC_MAX_CQS];158	void __iomem	*rme_q_pi[BFI_IOC_MAX_CQS];159	void __iomem	*rme_q_ctrl[BFI_IOC_MAX_CQS];160};161 162/*163 * MSIX vector handlers164 */165#define BFA_MSIX_MAX_VECTORS	22166typedef void (*bfa_msix_handler_t)(struct bfa_s *bfa, int vec);167struct bfa_msix_s {168	int	nvecs;169	bfa_msix_handler_t handler[BFA_MSIX_MAX_VECTORS];170};171 172/*173 * Chip specific interfaces174 */175struct bfa_hwif_s {176	void (*hw_reginit)(struct bfa_s *bfa);177	void (*hw_reqq_ack)(struct bfa_s *bfa, int reqq);178	void (*hw_rspq_ack)(struct bfa_s *bfa, int rspq, u32 ci);179	void (*hw_msix_init)(struct bfa_s *bfa, int nvecs);180	void (*hw_msix_ctrl_install)(struct bfa_s *bfa);181	void (*hw_msix_queue_install)(struct bfa_s *bfa);182	void (*hw_msix_uninstall)(struct bfa_s *bfa);183	void (*hw_isr_mode_set)(struct bfa_s *bfa, bfa_boolean_t msix);184	void (*hw_msix_getvecs)(struct bfa_s *bfa, u32 *vecmap,185				u32 *nvecs, u32 *maxvec);186	void (*hw_msix_get_rme_range) (struct bfa_s *bfa, u32 *start,187				       u32 *end);188	int	cpe_vec_q0;189	int	rme_vec_q0;190};191typedef void (*bfa_cb_iocfc_t) (void *cbarg, enum bfa_status status);192 193struct bfa_faa_cbfn_s {194	bfa_cb_iocfc_t	faa_cbfn;195	void		*faa_cbarg;196};197 198#define BFA_FAA_ENABLED		1199#define BFA_FAA_DISABLED	2200 201/*202 *	FAA attributes203 */204struct bfa_faa_attr_s {205	wwn_t	faa;206	u8	faa_state;207	u8	pwwn_source;208	u8	rsvd[6];209};210 211struct bfa_faa_args_s {212	struct bfa_faa_attr_s	*faa_attr;213	struct bfa_faa_cbfn_s	faa_cb;214	u8			faa_state;215	bfa_boolean_t		busy;216};217 218/*219 * IOCFC state machine definitions/declarations220 */221enum iocfc_event {222	IOCFC_E_INIT		= 1,	/* IOCFC init request		*/223	IOCFC_E_START		= 2,	/* IOCFC mod start request	*/224	IOCFC_E_STOP		= 3,	/* IOCFC stop request		*/225	IOCFC_E_ENABLE		= 4,	/* IOCFC enable request		*/226	IOCFC_E_DISABLE		= 5,	/* IOCFC disable request	*/227	IOCFC_E_IOC_ENABLED	= 6,	/* IOC enabled message		*/228	IOCFC_E_IOC_DISABLED	= 7,	/* IOC disabled message		*/229	IOCFC_E_IOC_FAILED	= 8,	/* failure notice by IOC sm	*/230	IOCFC_E_DCONF_DONE	= 9,	/* dconf read/write done	*/231	IOCFC_E_CFG_DONE	= 10,	/* IOCFC config complete	*/232};233 234struct bfa_iocfc_s;235typedef void (*bfa_iocfs_fsm_t)(struct bfa_iocfc_s *, enum iocfc_event);236 237struct bfa_iocfc_s {238	bfa_iocfs_fsm_t		fsm;239	struct bfa_s		*bfa;240	struct bfa_iocfc_cfg_s	cfg;241	u32		req_cq_pi[BFI_IOC_MAX_CQS];242	u32		rsp_cq_ci[BFI_IOC_MAX_CQS];243	u8		hw_qid[BFI_IOC_MAX_CQS];244	struct bfa_cb_qe_s	init_hcb_qe;245	struct bfa_cb_qe_s	stop_hcb_qe;246	struct bfa_cb_qe_s	dis_hcb_qe;247	struct bfa_cb_qe_s	en_hcb_qe;248	struct bfa_cb_qe_s	stats_hcb_qe;249	bfa_boolean_t		submod_enabled;250	bfa_boolean_t		cb_reqd;	/* Driver call back reqd */251	bfa_status_t		op_status;	/* Status of bfa iocfc op */252 253	struct bfa_dma_s	cfg_info;254	struct bfi_iocfc_cfg_s *cfginfo;255	struct bfa_dma_s	cfgrsp_dma;256	struct bfi_iocfc_cfgrsp_s *cfgrsp;257	struct bfa_dma_s	req_cq_ba[BFI_IOC_MAX_CQS];258	struct bfa_dma_s	req_cq_shadow_ci[BFI_IOC_MAX_CQS];259	struct bfa_dma_s	rsp_cq_ba[BFI_IOC_MAX_CQS];260	struct bfa_dma_s	rsp_cq_shadow_pi[BFI_IOC_MAX_CQS];261	struct bfa_iocfc_regs_s	bfa_regs;	/*  BFA device registers */262	struct bfa_hwif_s	hwif;263	bfa_cb_iocfc_t		updateq_cbfn; /*  bios callback function */264	void			*updateq_cbarg;	/*  bios callback arg */265	u32	intr_mask;266	struct bfa_faa_args_s	faa_args;267	struct bfa_mem_dma_s	ioc_dma;268	struct bfa_mem_dma_s	iocfc_dma;269	struct bfa_mem_dma_s	reqq_dma[BFI_IOC_MAX_CQS];270	struct bfa_mem_dma_s	rspq_dma[BFI_IOC_MAX_CQS];271	struct bfa_mem_kva_s	kva_seg;272};273 274#define BFA_MEM_IOC_DMA(_bfa)		(&((_bfa)->iocfc.ioc_dma))275#define BFA_MEM_IOCFC_DMA(_bfa)		(&((_bfa)->iocfc.iocfc_dma))276#define BFA_MEM_REQQ_DMA(_bfa, _qno)	(&((_bfa)->iocfc.reqq_dma[(_qno)]))277#define BFA_MEM_RSPQ_DMA(_bfa, _qno)	(&((_bfa)->iocfc.rspq_dma[(_qno)]))278#define BFA_MEM_IOCFC_KVA(_bfa)		(&((_bfa)->iocfc.kva_seg))279 280#define bfa_fn_lpu(__bfa)	\281	bfi_fn_lpu(bfa_ioc_pcifn(&(__bfa)->ioc), bfa_ioc_portid(&(__bfa)->ioc))282#define bfa_msix_init(__bfa, __nvecs)					\283	((__bfa)->iocfc.hwif.hw_msix_init(__bfa, __nvecs))284#define bfa_msix_ctrl_install(__bfa)					\285	((__bfa)->iocfc.hwif.hw_msix_ctrl_install(__bfa))286#define bfa_msix_queue_install(__bfa)					\287	((__bfa)->iocfc.hwif.hw_msix_queue_install(__bfa))288#define bfa_msix_uninstall(__bfa)					\289	((__bfa)->iocfc.hwif.hw_msix_uninstall(__bfa))290#define bfa_isr_rspq_ack(__bfa, __queue, __ci)				\291	((__bfa)->iocfc.hwif.hw_rspq_ack(__bfa, __queue, __ci))292#define bfa_isr_reqq_ack(__bfa, __queue) do {				\293	if ((__bfa)->iocfc.hwif.hw_reqq_ack)				\294		(__bfa)->iocfc.hwif.hw_reqq_ack(__bfa, __queue);	\295} while (0)296#define bfa_isr_mode_set(__bfa, __msix) do {				\297	if ((__bfa)->iocfc.hwif.hw_isr_mode_set)			\298		(__bfa)->iocfc.hwif.hw_isr_mode_set(__bfa, __msix);	\299} while (0)300#define bfa_msix_getvecs(__bfa, __vecmap, __nvecs, __maxvec)		\301	((__bfa)->iocfc.hwif.hw_msix_getvecs(__bfa, __vecmap,		\302					__nvecs, __maxvec))303#define bfa_msix_get_rme_range(__bfa, __start, __end)			\304	((__bfa)->iocfc.hwif.hw_msix_get_rme_range(__bfa, __start, __end))305#define bfa_msix(__bfa, __vec)						\306	((__bfa)->msix.handler[__vec](__bfa, __vec))307 308/*309 * FC specific IOC functions.310 */311void bfa_iocfc_meminfo(struct bfa_iocfc_cfg_s *cfg,312			struct bfa_meminfo_s *meminfo,313			struct bfa_s *bfa);314void bfa_iocfc_attach(struct bfa_s *bfa, void *bfad,315		      struct bfa_iocfc_cfg_s *cfg,316		      struct bfa_pcidev_s *pcidev);317void bfa_iocfc_init(struct bfa_s *bfa);318void bfa_iocfc_start(struct bfa_s *bfa);319void bfa_iocfc_stop(struct bfa_s *bfa);320void bfa_iocfc_isr(void *bfa, struct bfi_mbmsg_s *msg);321void bfa_iocfc_set_snsbase(struct bfa_s *bfa, int seg_no, u64 snsbase_pa);322bfa_boolean_t bfa_iocfc_is_operational(struct bfa_s *bfa);323void bfa_iocfc_reset_queues(struct bfa_s *bfa);324 325void bfa_msix_all(struct bfa_s *bfa, int vec);326void bfa_msix_reqq(struct bfa_s *bfa, int vec);327void bfa_msix_rspq(struct bfa_s *bfa, int vec);328void bfa_msix_lpu_err(struct bfa_s *bfa, int vec);329 330void bfa_hwcb_reginit(struct bfa_s *bfa);331void bfa_hwcb_rspq_ack(struct bfa_s *bfa, int rspq, u32 ci);332void bfa_hwcb_msix_init(struct bfa_s *bfa, int nvecs);333void bfa_hwcb_msix_ctrl_install(struct bfa_s *bfa);334void bfa_hwcb_msix_queue_install(struct bfa_s *bfa);335void bfa_hwcb_msix_uninstall(struct bfa_s *bfa);336void bfa_hwcb_isr_mode_set(struct bfa_s *bfa, bfa_boolean_t msix);337void bfa_hwcb_msix_getvecs(struct bfa_s *bfa, u32 *vecmap, u32 *nvecs,338			   u32 *maxvec);339void bfa_hwcb_msix_get_rme_range(struct bfa_s *bfa, u32 *start,340				 u32 *end);341void bfa_hwct_reginit(struct bfa_s *bfa);342void bfa_hwct2_reginit(struct bfa_s *bfa);343void bfa_hwct_reqq_ack(struct bfa_s *bfa, int rspq);344void bfa_hwct_rspq_ack(struct bfa_s *bfa, int rspq, u32 ci);345void bfa_hwct2_rspq_ack(struct bfa_s *bfa, int rspq, u32 ci);346void bfa_hwct_msix_init(struct bfa_s *bfa, int nvecs);347void bfa_hwct_msix_ctrl_install(struct bfa_s *bfa);348void bfa_hwct_msix_queue_install(struct bfa_s *bfa);349void bfa_hwct_msix_uninstall(struct bfa_s *bfa);350void bfa_hwct_isr_mode_set(struct bfa_s *bfa, bfa_boolean_t msix);351void bfa_hwct_msix_getvecs(struct bfa_s *bfa, u32 *vecmap, u32 *nvecs,352			   u32 *maxvec);353void bfa_hwct_msix_get_rme_range(struct bfa_s *bfa, u32 *start,354				 u32 *end);355void bfa_iocfc_get_bootwwns(struct bfa_s *bfa, u8 *nwwns, wwn_t *wwns);356int bfa_iocfc_get_pbc_vports(struct bfa_s *bfa,357				struct bfi_pbc_vport_s *pbc_vport);358 359 360/*361 *----------------------------------------------------------------------362 *		BFA public interfaces363 *----------------------------------------------------------------------364 */365#define bfa_stats(_mod, _stats)	((_mod)->stats._stats++)366#define bfa_ioc_get_stats(__bfa, __ioc_stats)		\367	bfa_ioc_fetch_stats(&(__bfa)->ioc, __ioc_stats)368#define bfa_ioc_clear_stats(__bfa)		\369	bfa_ioc_clr_stats(&(__bfa)->ioc)370#define bfa_get_nports(__bfa)			\371	bfa_ioc_get_nports(&(__bfa)->ioc)372#define bfa_get_adapter_manufacturer(__bfa, __manufacturer)		\373	bfa_ioc_get_adapter_manufacturer(&(__bfa)->ioc, __manufacturer)374#define bfa_get_adapter_model(__bfa, __model)			\375	bfa_ioc_get_adapter_model(&(__bfa)->ioc, __model)376#define bfa_get_adapter_serial_num(__bfa, __serial_num)			\377	bfa_ioc_get_adapter_serial_num(&(__bfa)->ioc, __serial_num)378#define bfa_get_adapter_fw_ver(__bfa, __fw_ver)			\379	bfa_ioc_get_adapter_fw_ver(&(__bfa)->ioc, __fw_ver)380#define bfa_get_adapter_optrom_ver(__bfa, __optrom_ver)			\381	bfa_ioc_get_adapter_optrom_ver(&(__bfa)->ioc, __optrom_ver)382#define bfa_get_pci_chip_rev(__bfa, __chip_rev)			\383	bfa_ioc_get_pci_chip_rev(&(__bfa)->ioc, __chip_rev)384#define bfa_get_ioc_state(__bfa)		\385	bfa_ioc_get_state(&(__bfa)->ioc)386#define bfa_get_type(__bfa)			\387	bfa_ioc_get_type(&(__bfa)->ioc)388#define bfa_get_mac(__bfa)			\389	bfa_ioc_get_mac(&(__bfa)->ioc)390#define bfa_get_mfg_mac(__bfa)			\391	bfa_ioc_get_mfg_mac(&(__bfa)->ioc)392#define bfa_get_fw_clock_res(__bfa)		\393	((__bfa)->iocfc.cfgrsp->fwcfg.fw_tick_res)394 395/*396 * lun mask macros return NULL when min cfg is enabled and there is397 * no memory allocated for lunmask.398 */399#define bfa_get_lun_mask(__bfa)					\400	((&(__bfa)->modules.dconf_mod)->min_cfg) ? NULL :	\401	 (&(BFA_DCONF_MOD(__bfa)->dconf->lun_mask))402 403#define bfa_get_lun_mask_list(_bfa)				\404	((&(_bfa)->modules.dconf_mod)->min_cfg) ? NULL :	\405	 (bfa_get_lun_mask(_bfa)->lun_list)406 407#define bfa_get_lun_mask_status(_bfa)				\408	(((&(_bfa)->modules.dconf_mod)->min_cfg)		\409	 ? BFA_LUNMASK_MINCFG : ((bfa_get_lun_mask(_bfa))->status))410 411void bfa_get_pciids(struct bfa_pciid_s **pciids, int *npciids);412void bfa_cfg_get_default(struct bfa_iocfc_cfg_s *cfg);413void bfa_cfg_get_min(struct bfa_iocfc_cfg_s *cfg);414void bfa_cfg_get_meminfo(struct bfa_iocfc_cfg_s *cfg,415			struct bfa_meminfo_s *meminfo,416			struct bfa_s *bfa);417void bfa_attach(struct bfa_s *bfa, void *bfad, struct bfa_iocfc_cfg_s *cfg,418		struct bfa_meminfo_s *meminfo,419		struct bfa_pcidev_s *pcidev);420void bfa_detach(struct bfa_s *bfa);421void bfa_cb_init(void *bfad, bfa_status_t status);422void bfa_cb_updateq(void *bfad, bfa_status_t status);423 424bfa_boolean_t bfa_intx(struct bfa_s *bfa);425void bfa_isr_enable(struct bfa_s *bfa);426void bfa_isr_disable(struct bfa_s *bfa);427 428void bfa_comp_deq(struct bfa_s *bfa, struct list_head *comp_q);429void bfa_comp_process(struct bfa_s *bfa, struct list_head *comp_q);430void bfa_comp_free(struct bfa_s *bfa, struct list_head *comp_q);431 432typedef void (*bfa_cb_ioc_t) (void *cbarg, enum bfa_status status);433void bfa_iocfc_get_attr(struct bfa_s *bfa, struct bfa_iocfc_attr_s *attr);434 435 436bfa_status_t bfa_iocfc_israttr_set(struct bfa_s *bfa,437				   struct bfa_iocfc_intr_attr_s *attr);438 439void bfa_iocfc_enable(struct bfa_s *bfa);440void bfa_iocfc_disable(struct bfa_s *bfa);441#define bfa_timer_start(_bfa, _timer, _timercb, _arg, _timeout)		\442	bfa_timer_begin(&(_bfa)->timer_mod, _timer, _timercb, _arg, _timeout)443 444struct bfa_cb_pending_q_s {445	struct bfa_cb_qe_s	hcb_qe;446	void			*data;  /* Driver buffer */447};448 449/* Common macros to operate on pending stats/attr apis */450#define bfa_pending_q_init(__qe, __cbfn, __cbarg, __data) do {	\451	bfa_q_qe_init(&((__qe)->hcb_qe.qe));			\452	(__qe)->hcb_qe.cbfn = (__cbfn);				\453	(__qe)->hcb_qe.cbarg = (__cbarg);			\454	(__qe)->hcb_qe.pre_rmv = BFA_TRUE;			\455	(__qe)->data = (__data);				\456} while (0)457 458#define bfa_pending_q_init_status(__qe, __cbfn, __cbarg, __data) do {	\459	bfa_q_qe_init(&((__qe)->hcb_qe.qe));			\460	(__qe)->hcb_qe.cbfn_status = (__cbfn);			\461	(__qe)->hcb_qe.cbarg = (__cbarg);			\462	(__qe)->hcb_qe.pre_rmv = BFA_TRUE;			\463	(__qe)->data = (__data);				\464} while (0)465 466#endif /* __BFA_H__ */467