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1// SPDX-License-Identifier: GPL-2.0-only2#include <linux/types.h>3#include <linux/init.h>4#include <linux/interrupt.h>5#include <linux/mm.h>6#include <linux/slab.h>7#include <linux/spinlock.h>8#include <linux/zorro.h>9#include <linux/module.h>10 11#include <asm/page.h>12#include <asm/amigaints.h>13#include <asm/amigahw.h>14 15#include <scsi/scsi.h>16#include <scsi/scsi_cmnd.h>17#include <scsi/scsi_device.h>18#include <scsi/scsi_eh.h>19#include <scsi/scsi_tcq.h>20#include "wd33c93.h"21#include "gvp11.h"22 23 24#define CHECK_WD33C9325 26struct gvp11_hostdata {27 struct WD33C93_hostdata wh;28 struct gvp11_scsiregs *regs;29 struct device *dev;30};31 32#define DMA_DIR(d) ((d == DATA_OUT_DIR) ? DMA_TO_DEVICE : DMA_FROM_DEVICE)33#define TO_DMA_MASK(m) (~((unsigned long long)m & 0xffffffff))34 35static irqreturn_t gvp11_intr(int irq, void *data)36{37 struct Scsi_Host *instance = data;38 struct gvp11_hostdata *hdata = shost_priv(instance);39 unsigned int status = hdata->regs->CNTR;40 unsigned long flags;41 42 if (!(status & GVP11_DMAC_INT_PENDING))43 return IRQ_NONE;44 45 spin_lock_irqsave(instance->host_lock, flags);46 wd33c93_intr(instance);47 spin_unlock_irqrestore(instance->host_lock, flags);48 return IRQ_HANDLED;49}50 51static int gvp11_xfer_mask = 0;52 53static int dma_setup(struct scsi_cmnd *cmd, int dir_in)54{55 struct scsi_pointer *scsi_pointer = WD33C93_scsi_pointer(cmd);56 unsigned long len = scsi_pointer->this_residual;57 struct Scsi_Host *instance = cmd->device->host;58 struct gvp11_hostdata *hdata = shost_priv(instance);59 struct WD33C93_hostdata *wh = &hdata->wh;60 struct gvp11_scsiregs *regs = hdata->regs;61 unsigned short cntr = GVP11_DMAC_INT_ENABLE;62 dma_addr_t addr;63 int bank_mask;64 static int scsi_alloc_out_of_range = 0;65 66 addr = dma_map_single(hdata->dev, scsi_pointer->ptr,67 len, DMA_DIR(dir_in));68 if (dma_mapping_error(hdata->dev, addr)) {69 dev_warn(hdata->dev, "cannot map SCSI data block %p\n",70 scsi_pointer->ptr);71 return 1;72 }73 scsi_pointer->dma_handle = addr;74 75 /* use bounce buffer if the physical address is bad */76 if (addr & wh->dma_xfer_mask) {77 /* drop useless mapping */78 dma_unmap_single(hdata->dev, scsi_pointer->dma_handle,79 scsi_pointer->this_residual,80 DMA_DIR(dir_in));81 scsi_pointer->dma_handle = (dma_addr_t) NULL;82 83 wh->dma_bounce_len = (scsi_pointer->this_residual + 511) & ~0x1ff;84 85 if (!scsi_alloc_out_of_range) {86 wh->dma_bounce_buffer =87 kmalloc(wh->dma_bounce_len, GFP_KERNEL);88 wh->dma_buffer_pool = BUF_SCSI_ALLOCED;89 }90 91 if (scsi_alloc_out_of_range ||92 !wh->dma_bounce_buffer) {93 wh->dma_bounce_buffer =94 amiga_chip_alloc(wh->dma_bounce_len,95 "GVP II SCSI Bounce Buffer");96 97 if (!wh->dma_bounce_buffer) {98 wh->dma_bounce_len = 0;99 return 1;100 }101 102 wh->dma_buffer_pool = BUF_CHIP_ALLOCED;103 }104 105 if (!dir_in) {106 /* copy to bounce buffer for a write */107 memcpy(wh->dma_bounce_buffer, scsi_pointer->ptr,108 scsi_pointer->this_residual);109 }110 111 if (wh->dma_buffer_pool == BUF_SCSI_ALLOCED) {112 /* will flush/invalidate cache for us */113 addr = dma_map_single(hdata->dev,114 wh->dma_bounce_buffer,115 wh->dma_bounce_len,116 DMA_DIR(dir_in));117 /* can't map buffer; use PIO */118 if (dma_mapping_error(hdata->dev, addr)) {119 dev_warn(hdata->dev,120 "cannot map bounce buffer %p\n",121 wh->dma_bounce_buffer);122 return 1;123 }124 }125 126 if (addr & wh->dma_xfer_mask) {127 /* drop useless mapping */128 dma_unmap_single(hdata->dev, scsi_pointer->dma_handle,129 scsi_pointer->this_residual,130 DMA_DIR(dir_in));131 /* fall back to Chip RAM if address out of range */132 if (wh->dma_buffer_pool == BUF_SCSI_ALLOCED) {133 kfree(wh->dma_bounce_buffer);134 scsi_alloc_out_of_range = 1;135 } else {136 amiga_chip_free(wh->dma_bounce_buffer);137 }138 139 wh->dma_bounce_buffer =140 amiga_chip_alloc(wh->dma_bounce_len,141 "GVP II SCSI Bounce Buffer");142 143 if (!wh->dma_bounce_buffer) {144 wh->dma_bounce_len = 0;145 return 1;146 }147 148 if (!dir_in) {149 /* copy to bounce buffer for a write */150 memcpy(wh->dma_bounce_buffer, scsi_pointer->ptr,151 scsi_pointer->this_residual);152 }153 /* chip RAM can be mapped to phys. address directly */154 addr = virt_to_phys(wh->dma_bounce_buffer);155 /* no need to flush/invalidate cache */156 wh->dma_buffer_pool = BUF_CHIP_ALLOCED;157 }158 /* finally, have OK mapping (punted for PIO else) */159 scsi_pointer->dma_handle = addr;160 161 }162 163 /* setup dma direction */164 if (!dir_in)165 cntr |= GVP11_DMAC_DIR_WRITE;166 167 wh->dma_dir = dir_in;168 regs->CNTR = cntr;169 170 /* setup DMA *physical* address */171 regs->ACR = addr;172 173 /* no more cache flush here - dma_map_single() takes care */174 175 bank_mask = (~wh->dma_xfer_mask >> 18) & 0x01c0;176 if (bank_mask)177 regs->BANK = bank_mask & (addr >> 18);178 179 /* start DMA */180 regs->ST_DMA = 1;181 182 /* return success */183 return 0;184}185 186static void dma_stop(struct Scsi_Host *instance, struct scsi_cmnd *SCpnt,187 int status)188{189 struct scsi_pointer *scsi_pointer = WD33C93_scsi_pointer(SCpnt);190 struct gvp11_hostdata *hdata = shost_priv(instance);191 struct WD33C93_hostdata *wh = &hdata->wh;192 struct gvp11_scsiregs *regs = hdata->regs;193 194 /* stop DMA */195 regs->SP_DMA = 1;196 /* remove write bit from CONTROL bits */197 regs->CNTR = GVP11_DMAC_INT_ENABLE;198 199 if (wh->dma_buffer_pool == BUF_SCSI_ALLOCED)200 dma_unmap_single(hdata->dev, scsi_pointer->dma_handle,201 scsi_pointer->this_residual,202 DMA_DIR(wh->dma_dir));203 204 /* copy from a bounce buffer, if necessary */205 if (status && wh->dma_bounce_buffer) {206 if (wh->dma_dir && SCpnt)207 memcpy(scsi_pointer->ptr, wh->dma_bounce_buffer,208 scsi_pointer->this_residual);209 210 if (wh->dma_buffer_pool == BUF_SCSI_ALLOCED)211 kfree(wh->dma_bounce_buffer);212 else213 amiga_chip_free(wh->dma_bounce_buffer);214 215 wh->dma_bounce_buffer = NULL;216 wh->dma_bounce_len = 0;217 }218}219 220static const struct scsi_host_template gvp11_scsi_template = {221 .module = THIS_MODULE,222 .name = "GVP Series II SCSI",223 .show_info = wd33c93_show_info,224 .write_info = wd33c93_write_info,225 .proc_name = "GVP11",226 .queuecommand = wd33c93_queuecommand,227 .eh_abort_handler = wd33c93_abort,228 .eh_host_reset_handler = wd33c93_host_reset,229 .can_queue = CAN_QUEUE,230 .this_id = 7,231 .sg_tablesize = SG_ALL,232 .cmd_per_lun = CMD_PER_LUN,233 .dma_boundary = PAGE_SIZE - 1,234 .cmd_size = sizeof(struct scsi_pointer),235};236 237static int check_wd33c93(struct gvp11_scsiregs *regs)238{239#ifdef CHECK_WD33C93240 volatile unsigned char *sasr_3393, *scmd_3393;241 unsigned char save_sasr;242 unsigned char q, qq;243 244 /*245 * These darn GVP boards are a problem - it can be tough to tell246 * whether or not they include a SCSI controller. This is the247 * ultimate Yet-Another-GVP-Detection-Hack in that it actually248 * probes for a WD33c93 chip: If we find one, it's extremely249 * likely that this card supports SCSI, regardless of Product_250 * Code, Board_Size, etc.251 */252 253 /* Get pointers to the presumed register locations and save contents */254 255 sasr_3393 = ®s->SASR;256 scmd_3393 = ®s->SCMD;257 save_sasr = *sasr_3393;258 259 /* First test the AuxStatus Reg */260 261 q = *sasr_3393; /* read it */262 if (q & 0x08) /* bit 3 should always be clear */263 return -ENODEV;264 *sasr_3393 = WD_AUXILIARY_STATUS; /* setup indirect address */265 if (*sasr_3393 == WD_AUXILIARY_STATUS) { /* shouldn't retain the write */266 *sasr_3393 = save_sasr; /* Oops - restore this byte */267 return -ENODEV;268 }269 if (*sasr_3393 != q) { /* should still read the same */270 *sasr_3393 = save_sasr; /* Oops - restore this byte */271 return -ENODEV;272 }273 if (*scmd_3393 != q) /* and so should the image at 0x1f */274 return -ENODEV;275 276 /*277 * Ok, we probably have a wd33c93, but let's check a few other places278 * for good measure. Make sure that this works for both 'A and 'B279 * chip versions.280 */281 282 *sasr_3393 = WD_SCSI_STATUS;283 q = *scmd_3393;284 *sasr_3393 = WD_SCSI_STATUS;285 *scmd_3393 = ~q;286 *sasr_3393 = WD_SCSI_STATUS;287 qq = *scmd_3393;288 *sasr_3393 = WD_SCSI_STATUS;289 *scmd_3393 = q;290 if (qq != q) /* should be read only */291 return -ENODEV;292 *sasr_3393 = 0x1e; /* this register is unimplemented */293 q = *scmd_3393;294 *sasr_3393 = 0x1e;295 *scmd_3393 = ~q;296 *sasr_3393 = 0x1e;297 qq = *scmd_3393;298 *sasr_3393 = 0x1e;299 *scmd_3393 = q;300 if (qq != q || qq != 0xff) /* should be read only, all 1's */301 return -ENODEV;302 *sasr_3393 = WD_TIMEOUT_PERIOD;303 q = *scmd_3393;304 *sasr_3393 = WD_TIMEOUT_PERIOD;305 *scmd_3393 = ~q;306 *sasr_3393 = WD_TIMEOUT_PERIOD;307 qq = *scmd_3393;308 *sasr_3393 = WD_TIMEOUT_PERIOD;309 *scmd_3393 = q;310 if (qq != (~q & 0xff)) /* should be read/write */311 return -ENODEV;312#endif /* CHECK_WD33C93 */313 314 return 0;315}316 317static int gvp11_probe(struct zorro_dev *z, const struct zorro_device_id *ent)318{319 struct Scsi_Host *instance;320 unsigned long address;321 int error;322 unsigned int epc;323 unsigned int default_dma_xfer_mask;324 struct gvp11_hostdata *hdata;325 struct gvp11_scsiregs *regs;326 wd33c93_regs wdregs;327 328 default_dma_xfer_mask = ent->driver_data;329 330 if (dma_set_mask_and_coherent(&z->dev,331 TO_DMA_MASK(default_dma_xfer_mask))) {332 dev_warn(&z->dev, "cannot use DMA mask %llx\n",333 TO_DMA_MASK(default_dma_xfer_mask));334 return -ENODEV;335 }336 337 /*338 * Rumors state that some GVP ram boards use the same product339 * code as the SCSI controllers. Therefore if the board-size340 * is not 64KB we assume it is a ram board and bail out.341 */342 if (zorro_resource_len(z) != 0x10000)343 return -ENODEV;344 345 address = z->resource.start;346 if (!request_mem_region(address, 256, "wd33c93"))347 return -EBUSY;348 349 regs = ZTWO_VADDR(address);350 351 error = check_wd33c93(regs);352 if (error)353 goto fail_check_or_alloc;354 355 instance = scsi_host_alloc(&gvp11_scsi_template,356 sizeof(struct gvp11_hostdata));357 if (!instance) {358 error = -ENOMEM;359 goto fail_check_or_alloc;360 }361 362 instance->irq = IRQ_AMIGA_PORTS;363 instance->unique_id = z->slotaddr;364 365 regs->secret2 = 1;366 regs->secret1 = 0;367 regs->secret3 = 15;368 while (regs->CNTR & GVP11_DMAC_BUSY)369 ;370 regs->CNTR = 0;371 regs->BANK = 0;372 373 wdregs.SASR = ®s->SASR;374 wdregs.SCMD = ®s->SCMD;375 376 hdata = shost_priv(instance);377 if (gvp11_xfer_mask) {378 hdata->wh.dma_xfer_mask = gvp11_xfer_mask;379 if (dma_set_mask_and_coherent(&z->dev,380 TO_DMA_MASK(gvp11_xfer_mask))) {381 dev_warn(&z->dev, "cannot use DMA mask %llx\n",382 TO_DMA_MASK(gvp11_xfer_mask));383 error = -ENODEV;384 goto fail_check_or_alloc;385 }386 } else387 hdata->wh.dma_xfer_mask = default_dma_xfer_mask;388 389 hdata->wh.no_sync = 0xff;390 hdata->wh.fast = 0;391 hdata->wh.dma_mode = CTRL_DMA;392 hdata->regs = regs;393 394 /*395 * Check for 14MHz SCSI clock396 */397 epc = *(unsigned short *)(ZTWO_VADDR(address) + 0x8000);398 wd33c93_init(instance, wdregs, dma_setup, dma_stop,399 (epc & GVP_SCSICLKMASK) ? WD33C93_FS_8_10400 : WD33C93_FS_12_15);401 402 error = request_irq(IRQ_AMIGA_PORTS, gvp11_intr, IRQF_SHARED,403 "GVP11 SCSI", instance);404 if (error)405 goto fail_irq;406 407 regs->CNTR = GVP11_DMAC_INT_ENABLE;408 409 error = scsi_add_host(instance, NULL);410 if (error)411 goto fail_host;412 413 zorro_set_drvdata(z, instance);414 scsi_scan_host(instance);415 return 0;416 417fail_host:418 free_irq(IRQ_AMIGA_PORTS, instance);419fail_irq:420 scsi_host_put(instance);421fail_check_or_alloc:422 release_mem_region(address, 256);423 return error;424}425 426static void gvp11_remove(struct zorro_dev *z)427{428 struct Scsi_Host *instance = zorro_get_drvdata(z);429 struct gvp11_hostdata *hdata = shost_priv(instance);430 431 hdata->regs->CNTR = 0;432 scsi_remove_host(instance);433 free_irq(IRQ_AMIGA_PORTS, instance);434 scsi_host_put(instance);435 release_mem_region(z->resource.start, 256);436}437 438 /*439 * This should (hopefully) be the correct way to identify440 * all the different GVP SCSI controllers (except for the441 * SERIES I though).442 */443 444static struct zorro_device_id gvp11_zorro_tbl[] = {445 { ZORRO_PROD_GVP_COMBO_030_R3_SCSI, ~0x00ffffff },446 { ZORRO_PROD_GVP_SERIES_II, ~0x00ffffff },447 { ZORRO_PROD_GVP_GFORCE_030_SCSI, ~0x01ffffff },448 { ZORRO_PROD_GVP_A530_SCSI, ~0x01ffffff },449 { ZORRO_PROD_GVP_COMBO_030_R4_SCSI, ~0x01ffffff },450 { ZORRO_PROD_GVP_A1291, ~0x07ffffff },451 { ZORRO_PROD_GVP_GFORCE_040_SCSI_1, ~0x07ffffff },452 { 0 }453};454MODULE_DEVICE_TABLE(zorro, gvp11_zorro_tbl);455 456static struct zorro_driver gvp11_driver = {457 .name = "gvp11",458 .id_table = gvp11_zorro_tbl,459 .probe = gvp11_probe,460 .remove = gvp11_remove,461};462 463static int __init gvp11_init(void)464{465 return zorro_register_driver(&gvp11_driver);466}467module_init(gvp11_init);468 469static void __exit gvp11_exit(void)470{471 zorro_unregister_driver(&gvp11_driver);472}473module_exit(gvp11_exit);474 475MODULE_DESCRIPTION("GVP Series II SCSI");476MODULE_LICENSE("GPL");477