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1/*2 * This file is provided under a dual BSD/GPLv2 license. When using or3 * redistributing this file, you may do so under either license.4 *5 * GPL LICENSE SUMMARY6 *7 * Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved.8 *9 * This program is free software; you can redistribute it and/or modify10 * it under the terms of version 2 of the GNU General Public License as11 * published by the Free Software Foundation.12 *13 * This program is distributed in the hope that it will be useful, but14 * WITHOUT ANY WARRANTY; without even the implied warranty of15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU16 * General Public License for more details.17 *18 * You should have received a copy of the GNU General Public License19 * along with this program; if not, write to the Free Software20 * Foundation, Inc., 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.21 * The full GNU General Public License is included in this distribution22 * in the file called LICENSE.GPL.23 *24 * BSD LICENSE25 *26 * Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved.27 * All rights reserved.28 *29 * Redistribution and use in source and binary forms, with or without30 * modification, are permitted provided that the following conditions31 * are met:32 *33 * * Redistributions of source code must retain the above copyright34 * notice, this list of conditions and the following disclaimer.35 * * Redistributions in binary form must reproduce the above copyright36 * notice, this list of conditions and the following disclaimer in37 * the documentation and/or other materials provided with the38 * distribution.39 * * Neither the name of Intel Corporation nor the names of its40 * contributors may be used to endorse or promote products derived41 * from this software without specific prior written permission.42 *43 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS44 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT45 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR46 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT47 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,48 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT49 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,50 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY51 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT52 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE53 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.54 */55#ifndef _ISCI_PHY_H_56#define _ISCI_PHY_H_57 58#include <scsi/sas.h>59#include <scsi/libsas.h>60#include "isci.h"61#include "sas.h"62 63/* This is the timeout value for the SATA phy to wait for a SIGNATURE FIS64 * before restarting the starting state machine. Technically, the old parallel65 * ATA specification required up to 30 seconds for a device to issue its66 * signature FIS as a result of a soft reset. Now we see that devices respond67 * generally within 15 seconds, but we'll use 25 for now.68 */69#define SCIC_SDS_SIGNATURE_FIS_TIMEOUT 2500070 71/* This is the timeout for the SATA OOB/SN because the hardware does not72 * recognize a hot plug after OOB signal but before the SN signals. We need to73 * make sure after a hotplug timeout if we have not received the speed event74 * notification from the hardware that we restart the hardware OOB state75 * machine.76 */77#define SCIC_SDS_SATA_LINK_TRAINING_TIMEOUT 25078 79/**80 * isci_phy - hba local phy infrastructure81 * @sm:82 * @protocol: attached device protocol83 * @phy_index: physical index relative to the controller (0-3)84 * @bcn_received_while_port_unassigned: bcn to report after port association85 * @sata_timer: timeout SATA signature FIS arrival86 */87struct isci_phy {88 struct sci_base_state_machine sm;89 struct isci_port *owning_port;90 enum sas_linkrate max_negotiated_speed;91 enum sas_protocol protocol;92 u8 phy_index;93 bool bcn_received_while_port_unassigned;94 bool is_in_link_training;95 struct sci_timer sata_timer;96 struct scu_transport_layer_registers __iomem *transport_layer_registers;97 struct scu_link_layer_registers __iomem *link_layer_registers;98 struct asd_sas_phy sas_phy;99 u8 sas_addr[SAS_ADDR_SIZE];100 union {101 struct sas_identify_frame iaf;102 struct dev_to_host_fis fis;103 } frame_rcvd;104};105 106static inline struct isci_phy *to_iphy(struct asd_sas_phy *sas_phy)107{108 struct isci_phy *iphy = container_of(sas_phy, typeof(*iphy), sas_phy);109 110 return iphy;111}112 113struct sci_phy_cap {114 union {115 struct {116 /*117 * The SAS specification indicates the start bit shall118 * always be set to119 * 1. This implementation will have the start bit set120 * to 0 if the PHY CAPABILITIES were either not121 * received or speed negotiation failed.122 */123 u8 start:1;124 u8 tx_ssc_type:1;125 u8 res1:2;126 u8 req_logical_linkrate:4;127 128 u32 gen1_no_ssc:1;129 u32 gen1_ssc:1;130 u32 gen2_no_ssc:1;131 u32 gen2_ssc:1;132 u32 gen3_no_ssc:1;133 u32 gen3_ssc:1;134 u32 res2:17;135 u32 parity:1;136 };137 u32 all;138 };139} __packed;140 141/* this data structure reflects the link layer transmit identification reg */142struct sci_phy_proto {143 union {144 struct {145 u16 _r_a:1;146 u16 smp_iport:1;147 u16 stp_iport:1;148 u16 ssp_iport:1;149 u16 _r_b:4;150 u16 _r_c:1;151 u16 smp_tport:1;152 u16 stp_tport:1;153 u16 ssp_tport:1;154 u16 _r_d:4;155 };156 u16 all;157 };158} __packed;159 160 161/**162 * struct sci_phy_properties - This structure defines the properties common to163 * all phys that can be retrieved.164 *165 *166 */167struct sci_phy_properties {168 /**169 * This field specifies the port that currently contains the170 * supplied phy. This field may be set to NULL171 * if the phy is not currently contained in a port.172 */173 struct isci_port *iport;174 175 /**176 * This field specifies the link rate at which the phy is177 * currently operating.178 */179 enum sas_linkrate negotiated_link_rate;180 181 /**182 * This field specifies the index of the phy in relation to other183 * phys within the controller. This index is zero relative.184 */185 u8 index;186};187 188/**189 * struct sci_sas_phy_properties - This structure defines the properties,190 * specific to a SAS phy, that can be retrieved.191 *192 *193 */194struct sci_sas_phy_properties {195 /**196 * This field delineates the Identify Address Frame received197 * from the remote end point.198 */199 struct sas_identify_frame rcvd_iaf;200 201 /**202 * This field delineates the Phy capabilities structure received203 * from the remote end point.204 */205 struct sci_phy_cap rcvd_cap;206 207};208 209/**210 * struct sci_sata_phy_properties - This structure defines the properties,211 * specific to a SATA phy, that can be retrieved.212 *213 *214 */215struct sci_sata_phy_properties {216 /**217 * This field delineates the signature FIS received from the218 * attached target.219 */220 struct dev_to_host_fis signature_fis;221 222 /**223 * This field specifies to the user if a port selector is connected224 * on the specified phy.225 */226 bool is_port_selector_present;227 228};229 230/**231 * enum sci_phy_counter_id - This enumeration depicts the various pieces of232 * optional information that can be retrieved for a specific phy.233 *234 *235 */236enum sci_phy_counter_id {237 /**238 * This PHY information field tracks the number of frames received.239 */240 SCIC_PHY_COUNTER_RECEIVED_FRAME,241 242 /**243 * This PHY information field tracks the number of frames transmitted.244 */245 SCIC_PHY_COUNTER_TRANSMITTED_FRAME,246 247 /**248 * This PHY information field tracks the number of DWORDs received.249 */250 SCIC_PHY_COUNTER_RECEIVED_FRAME_WORD,251 252 /**253 * This PHY information field tracks the number of DWORDs transmitted.254 */255 SCIC_PHY_COUNTER_TRANSMITTED_FRAME_DWORD,256 257 /**258 * This PHY information field tracks the number of times DWORD259 * synchronization was lost.260 */261 SCIC_PHY_COUNTER_LOSS_OF_SYNC_ERROR,262 263 /**264 * This PHY information field tracks the number of received DWORDs with265 * running disparity errors.266 */267 SCIC_PHY_COUNTER_RECEIVED_DISPARITY_ERROR,268 269 /**270 * This PHY information field tracks the number of received frames with a271 * CRC error (not including short or truncated frames).272 */273 SCIC_PHY_COUNTER_RECEIVED_FRAME_CRC_ERROR,274 275 /**276 * This PHY information field tracks the number of DONE (ACK/NAK TIMEOUT)277 * primitives received.278 */279 SCIC_PHY_COUNTER_RECEIVED_DONE_ACK_NAK_TIMEOUT,280 281 /**282 * This PHY information field tracks the number of DONE (ACK/NAK TIMEOUT)283 * primitives transmitted.284 */285 SCIC_PHY_COUNTER_TRANSMITTED_DONE_ACK_NAK_TIMEOUT,286 287 /**288 * This PHY information field tracks the number of times the inactivity289 * timer for connections on the phy has been utilized.290 */291 SCIC_PHY_COUNTER_INACTIVITY_TIMER_EXPIRED,292 293 /**294 * This PHY information field tracks the number of DONE (CREDIT TIMEOUT)295 * primitives received.296 */297 SCIC_PHY_COUNTER_RECEIVED_DONE_CREDIT_TIMEOUT,298 299 /**300 * This PHY information field tracks the number of DONE (CREDIT TIMEOUT)301 * primitives transmitted.302 */303 SCIC_PHY_COUNTER_TRANSMITTED_DONE_CREDIT_TIMEOUT,304 305 /**306 * This PHY information field tracks the number of CREDIT BLOCKED307 * primitives received.308 * @note Depending on remote device implementation, credit blocks309 * may occur regularly.310 */311 SCIC_PHY_COUNTER_RECEIVED_CREDIT_BLOCKED,312 313 /**314 * This PHY information field contains the number of short frames315 * received. A short frame is simply a frame smaller then what is316 * allowed by either the SAS or SATA specification.317 */318 SCIC_PHY_COUNTER_RECEIVED_SHORT_FRAME,319 320 /**321 * This PHY information field contains the number of frames received after322 * credit has been exhausted.323 */324 SCIC_PHY_COUNTER_RECEIVED_FRAME_WITHOUT_CREDIT,325 326 /**327 * This PHY information field contains the number of frames received after328 * a DONE has been received.329 */330 SCIC_PHY_COUNTER_RECEIVED_FRAME_AFTER_DONE,331 332 /**333 * This PHY information field contains the number of times the phy334 * failed to achieve DWORD synchronization during speed negotiation.335 */336 SCIC_PHY_COUNTER_SN_DWORD_SYNC_ERROR337};338 339/**340 * enum sci_phy_states - phy state machine states341 * @SCI_PHY_INITIAL: Simply the initial state for the base domain state342 * machine.343 * @SCI_PHY_STOPPED: phy has successfully been stopped. In this state344 * no new IO operations are permitted on this phy.345 * @SCI_PHY_STARTING: the phy is in the process of becomming ready. In346 * this state no new IO operations are permitted on347 * this phy.348 * @SCI_PHY_SUB_INITIAL: Initial state349 * @SCI_PHY_SUB_AWAIT_OSSP_EN: Wait state for the hardware OSSP event350 * type notification351 * @SCI_PHY_SUB_AWAIT_SAS_SPEED_EN: Wait state for the PHY speed352 * notification353 * @SCI_PHY_SUB_AWAIT_IAF_UF: Wait state for the IAF Unsolicited frame354 * notification355 * @SCI_PHY_SUB_AWAIT_SAS_POWER: Wait state for the request to consume356 * power357 * @SCI_PHY_SUB_AWAIT_SATA_POWER: Wait state for request to consume358 * power359 * @SCI_PHY_SUB_AWAIT_SATA_PHY_EN: Wait state for the SATA PHY360 * notification361 * @SCI_PHY_SUB_AWAIT_SATA_SPEED_EN: Wait for the SATA PHY speed362 * notification363 * @SCI_PHY_SUB_AWAIT_SIG_FIS_UF: Wait state for the SIGNATURE FIS364 * unsolicited frame notification365 * @SCI_PHY_SUB_FINAL: Exit state for this state machine366 * @SCI_PHY_READY: phy is now ready. Thus, the user is able to perform367 * IO operations utilizing this phy as long as it is368 * currently part of a valid port. This state is369 * entered from the STARTING state.370 * @SCI_PHY_RESETTING: phy is in the process of being reset. In this371 * state no new IO operations are permitted on this372 * phy. This state is entered from the READY state.373 * @SCI_PHY_FINAL: Simply the final state for the base phy state374 * machine.375 */376#define PHY_STATES {\377 C(PHY_INITIAL),\378 C(PHY_STOPPED),\379 C(PHY_STARTING),\380 C(PHY_SUB_INITIAL),\381 C(PHY_SUB_AWAIT_OSSP_EN),\382 C(PHY_SUB_AWAIT_SAS_SPEED_EN),\383 C(PHY_SUB_AWAIT_IAF_UF),\384 C(PHY_SUB_AWAIT_SAS_POWER),\385 C(PHY_SUB_AWAIT_SATA_POWER),\386 C(PHY_SUB_AWAIT_SATA_PHY_EN),\387 C(PHY_SUB_AWAIT_SATA_SPEED_EN),\388 C(PHY_SUB_AWAIT_SIG_FIS_UF),\389 C(PHY_SUB_FINAL),\390 C(PHY_READY),\391 C(PHY_RESETTING),\392 C(PHY_FINAL),\393 }394#undef C395#define C(a) SCI_##a396enum sci_phy_states PHY_STATES;397#undef C398 399void sci_phy_construct(400 struct isci_phy *iphy,401 struct isci_port *iport,402 u8 phy_index);403 404struct isci_port *phy_get_non_dummy_port(struct isci_phy *iphy);405 406void sci_phy_set_port(407 struct isci_phy *iphy,408 struct isci_port *iport);409 410enum sci_status sci_phy_initialize(411 struct isci_phy *iphy,412 struct scu_transport_layer_registers __iomem *transport_layer_registers,413 struct scu_link_layer_registers __iomem *link_layer_registers);414 415enum sci_status sci_phy_start(416 struct isci_phy *iphy);417 418enum sci_status sci_phy_stop(419 struct isci_phy *iphy);420 421enum sci_status sci_phy_reset(422 struct isci_phy *iphy);423 424void sci_phy_resume(425 struct isci_phy *iphy);426 427void sci_phy_setup_transport(428 struct isci_phy *iphy,429 u32 device_id);430 431enum sci_status sci_phy_event_handler(432 struct isci_phy *iphy,433 u32 event_code);434 435enum sci_status sci_phy_frame_handler(436 struct isci_phy *iphy,437 u32 frame_index);438 439enum sci_status sci_phy_consume_power_handler(440 struct isci_phy *iphy);441 442void sci_phy_get_sas_address(443 struct isci_phy *iphy,444 struct sci_sas_address *sas_address);445 446void sci_phy_get_attached_sas_address(447 struct isci_phy *iphy,448 struct sci_sas_address *sas_address);449 450void sci_phy_get_protocols(451 struct isci_phy *iphy,452 struct sci_phy_proto *protocols);453enum sas_linkrate sci_phy_linkrate(struct isci_phy *iphy);454 455struct isci_host;456void isci_phy_init(struct isci_phy *iphy, struct isci_host *ihost, int index);457int isci_phy_control(struct asd_sas_phy *phy, enum phy_func func, void *buf);458 459#endif /* !defined(_ISCI_PHY_H_) */460