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1/* SPDX-License-Identifier: GPL-2.0-or-later */2/*3 *4 * Linux MegaRAID device driver5 *6 * Copyright (c) 2003-2004 LSI Logic Corporation.7 *8 * FILE : megaraid_mbox.h9 */10 11#ifndef _MEGARAID_H_12#define _MEGARAID_H_13 14 15#include "mega_common.h"16#include "mbox_defs.h"17#include "megaraid_ioctl.h"18 19 20#define MEGARAID_VERSION "2.20.5.1"21#define MEGARAID_EXT_VERSION "(Release Date: Thu Nov 16 15:32:35 EST 2006)"22 23 24/*25 * Define some PCI values here until they are put in the kernel26 */27#define PCI_DEVICE_ID_PERC4_DI_DISCOVERY 0x000E28#define PCI_SUBSYS_ID_PERC4_DI_DISCOVERY 0x012329 30#define PCI_DEVICE_ID_PERC4_SC 0x196031#define PCI_SUBSYS_ID_PERC4_SC 0x052032 33#define PCI_DEVICE_ID_PERC4_DC 0x196034#define PCI_SUBSYS_ID_PERC4_DC 0x051835 36#define PCI_DEVICE_ID_VERDE 0x040737 38#define PCI_DEVICE_ID_PERC4_DI_EVERGLADES 0x000F39#define PCI_SUBSYS_ID_PERC4_DI_EVERGLADES 0x014A40 41#define PCI_DEVICE_ID_PERC4E_SI_BIGBEND 0x001342#define PCI_SUBSYS_ID_PERC4E_SI_BIGBEND 0x016c43 44#define PCI_DEVICE_ID_PERC4E_DI_KOBUK 0x001345#define PCI_SUBSYS_ID_PERC4E_DI_KOBUK 0x016d46 47#define PCI_DEVICE_ID_PERC4E_DI_CORVETTE 0x001348#define PCI_SUBSYS_ID_PERC4E_DI_CORVETTE 0x016e49 50#define PCI_DEVICE_ID_PERC4E_DI_EXPEDITION 0x001351#define PCI_SUBSYS_ID_PERC4E_DI_EXPEDITION 0x016f52 53#define PCI_DEVICE_ID_PERC4E_DI_GUADALUPE 0x001354#define PCI_SUBSYS_ID_PERC4E_DI_GUADALUPE 0x017055 56#define PCI_DEVICE_ID_DOBSON 0x040857 58#define PCI_DEVICE_ID_MEGARAID_SCSI_320_0 0x196059#define PCI_SUBSYS_ID_MEGARAID_SCSI_320_0 0xA52060 61#define PCI_DEVICE_ID_MEGARAID_SCSI_320_1 0x196062#define PCI_SUBSYS_ID_MEGARAID_SCSI_320_1 0x052063 64#define PCI_DEVICE_ID_MEGARAID_SCSI_320_2 0x196065#define PCI_SUBSYS_ID_MEGARAID_SCSI_320_2 0x051866 67#define PCI_DEVICE_ID_MEGARAID_I4_133_RAID 0x196068#define PCI_SUBSYS_ID_MEGARAID_I4_133_RAID 0x052269 70#define PCI_DEVICE_ID_MEGARAID_SATA_150_4 0x196071#define PCI_SUBSYS_ID_MEGARAID_SATA_150_4 0x452372 73#define PCI_DEVICE_ID_MEGARAID_SATA_150_6 0x196074#define PCI_SUBSYS_ID_MEGARAID_SATA_150_6 0x052375 76#define PCI_DEVICE_ID_LINDSAY 0x040977 78#define PCI_DEVICE_ID_INTEL_RAID_SRCS16 0x196079#define PCI_SUBSYS_ID_INTEL_RAID_SRCS16 0x052380 81#define PCI_DEVICE_ID_INTEL_RAID_SRCU41L_LAKE_SHETEK 0x196082#define PCI_SUBSYS_ID_INTEL_RAID_SRCU41L_LAKE_SHETEK 0x052083 84#define PCI_SUBSYS_ID_PERC3_QC 0x047185#define PCI_SUBSYS_ID_PERC3_DC 0x049386#define PCI_SUBSYS_ID_PERC3_SC 0x047587#define PCI_SUBSYS_ID_CERC_ATA100_4CH 0x051188 89 90#define MBOX_MAX_SCSI_CMDS 128 // number of cmds reserved for kernel91#define MBOX_MAX_USER_CMDS 32 // number of cmds for applications92#define MBOX_DEF_CMD_PER_LUN 64 // default commands per lun93#define MBOX_DEFAULT_SG_SIZE 26 // default sg size supported by all fw94#define MBOX_MAX_SG_SIZE 32 // maximum scatter-gather list size95#define MBOX_MAX_SECTORS 128 // maximum sectors per IO96#define MBOX_TIMEOUT 30 // timeout value for internal cmds97#define MBOX_BUSY_WAIT 10 // max usec to wait for busy mailbox98#define MBOX_RESET_WAIT 180 // wait these many seconds in reset99#define MBOX_RESET_EXT_WAIT 120 // extended wait reset100#define MBOX_SYNC_WAIT_CNT 0xFFFF // wait loop index for synchronous mode101 102#define MBOX_SYNC_DELAY_200 200 // 200 micro-seconds103 104/*105 * maximum transfer that can happen through the firmware commands issued106 * internnaly from the driver.107 */108#define MBOX_IBUF_SIZE 4096109 110 111/**112 * mbox_ccb_t - command control block specific to mailbox based controllers113 * @raw_mbox : raw mailbox pointer114 * @mbox : mailbox115 * @mbox64 : extended mailbox116 * @mbox_dma_h : mailbox dma address117 * @sgl64 : 64-bit scatter-gather list118 * @sgl32 : 32-bit scatter-gather list119 * @sgl_dma_h : dma handle for the scatter-gather list120 * @pthru : passthru structure121 * @pthru_dma_h : dma handle for the passthru structure122 * @epthru : extended passthru structure123 * @epthru_dma_h : dma handle for extended passthru structure124 * @buf_dma_h : dma handle for buffers w/o sg list125 *126 * command control block specific to the mailbox based controllers127 */128typedef struct {129 uint8_t *raw_mbox;130 mbox_t *mbox;131 mbox64_t *mbox64;132 dma_addr_t mbox_dma_h;133 mbox_sgl64 *sgl64;134 mbox_sgl32 *sgl32;135 dma_addr_t sgl_dma_h;136 mraid_passthru_t *pthru;137 dma_addr_t pthru_dma_h;138 mraid_epassthru_t *epthru;139 dma_addr_t epthru_dma_h;140 dma_addr_t buf_dma_h;141} mbox_ccb_t;142 143 144/**145 * mraid_device_t - adapter soft state structure for mailbox controllers146 * @una_mbox64 : 64-bit mbox - unaligned147 * @una_mbox64_dma : mbox dma addr - unaligned148 * @mbox : 32-bit mbox - aligned149 * @mbox64 : 64-bit mbox - aligned150 * @mbox_dma : mbox dma addr - aligned151 * @mailbox_lock : exclusion lock for the mailbox152 * @baseport : base port of hba memory153 * @baseaddr : mapped addr of hba memory154 * @mbox_pool : pool of mailboxes155 * @mbox_pool_handle : handle for the mailbox pool memory156 * @epthru_pool : a pool for extended passthru commands157 * @epthru_pool_handle : handle to the pool above158 * @sg_pool : pool of scatter-gather lists for this driver159 * @sg_pool_handle : handle to the pool above160 * @ccb_list : list of our command control blocks161 * @uccb_list : list of cmd control blocks for mgmt module162 * @umbox64 : array of mailbox for user commands (cmm)163 * @pdrv_state : array for state of each physical drive.164 * @last_disp : flag used to show device scanning165 * @hw_error : set if FW not responding166 * @fast_load : If set, skip physical device scanning167 * @channel_class : channel class, RAID or SCSI168 * @sysfs_mtx : mutex to serialize access to sysfs res.169 * @sysfs_uioc : management packet to issue FW calls from sysfs170 * @sysfs_mbox64 : mailbox packet to issue FW calls from sysfs171 * @sysfs_buffer : data buffer for FW commands issued from sysfs172 * @sysfs_buffer_dma : DMA buffer for FW commands issued from sysfs173 * @sysfs_wait_q : wait queue for sysfs operations174 * @random_del_supported : set if the random deletion is supported175 * @curr_ldmap : current LDID map176 *177 * Initialization structure for mailbox controllers: memory based and IO based178 * All the fields in this structure are LLD specific and may be discovered at179 * init() or start() time.180 *181 * NOTE: The fields of this structures are placed to minimize cache misses182 */183#define MAX_LD_EXTENDED64 64184typedef struct {185 mbox64_t *una_mbox64;186 dma_addr_t una_mbox64_dma;187 mbox_t *mbox;188 mbox64_t *mbox64;189 dma_addr_t mbox_dma;190 spinlock_t mailbox_lock;191 unsigned long baseport;192 void __iomem * baseaddr;193 struct mraid_pci_blk mbox_pool[MBOX_MAX_SCSI_CMDS];194 struct dma_pool *mbox_pool_handle;195 struct mraid_pci_blk epthru_pool[MBOX_MAX_SCSI_CMDS];196 struct dma_pool *epthru_pool_handle;197 struct mraid_pci_blk sg_pool[MBOX_MAX_SCSI_CMDS];198 struct dma_pool *sg_pool_handle;199 mbox_ccb_t ccb_list[MBOX_MAX_SCSI_CMDS];200 mbox_ccb_t uccb_list[MBOX_MAX_USER_CMDS];201 mbox64_t umbox64[MBOX_MAX_USER_CMDS];202 203 uint8_t pdrv_state[MBOX_MAX_PHYSICAL_DRIVES];204 uint32_t last_disp;205 int hw_error;206 int fast_load;207 uint8_t channel_class;208 struct mutex sysfs_mtx;209 uioc_t *sysfs_uioc;210 mbox64_t *sysfs_mbox64;211 caddr_t sysfs_buffer;212 dma_addr_t sysfs_buffer_dma;213 wait_queue_head_t sysfs_wait_q;214 int random_del_supported;215 uint16_t curr_ldmap[MAX_LD_EXTENDED64];216} mraid_device_t;217 218// route to raid device from adapter219#define ADAP2RAIDDEV(adp) ((mraid_device_t *)((adp)->raid_device))220 221#define MAILBOX_LOCK(rdev) (&(rdev)->mailbox_lock)222 223// Find out if this channel is a RAID or SCSI224#define IS_RAID_CH(rdev, ch) (((rdev)->channel_class >> (ch)) & 0x01)225 226 227#define RDINDOOR(rdev) readl((rdev)->baseaddr + 0x20)228#define RDOUTDOOR(rdev) readl((rdev)->baseaddr + 0x2C)229#define WRINDOOR(rdev, value) writel(value, (rdev)->baseaddr + 0x20)230#define WROUTDOOR(rdev, value) writel(value, (rdev)->baseaddr + 0x2C)231 232#endif // _MEGARAID_H_233