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1// SPDX-License-Identifier: GPL-2.0-only2/*3 * Marvell 88SE64xx/88SE94xx main function4 *5 * Copyright 2007 Red Hat, Inc.6 * Copyright 2008 Marvell. <kewei@marvell.com>7 * Copyright 2009-2011 Marvell. <yuxiangl@marvell.com>8*/9 10#include "mv_sas.h"11 12static int mvs_find_tag(struct mvs_info *mvi, struct sas_task *task, u32 *tag)13{14 if (task->lldd_task) {15 struct mvs_slot_info *slot;16 slot = task->lldd_task;17 *tag = slot->slot_tag;18 return 1;19 }20 return 0;21}22 23static void mvs_tag_clear(struct mvs_info *mvi, u32 tag)24{25 void *bitmap = mvi->rsvd_tags;26 clear_bit(tag, bitmap);27}28 29static void mvs_tag_free(struct mvs_info *mvi, u32 tag)30{31 if (tag >= MVS_RSVD_SLOTS)32 return;33 34 mvs_tag_clear(mvi, tag);35}36 37static void mvs_tag_set(struct mvs_info *mvi, unsigned int tag)38{39 void *bitmap = mvi->rsvd_tags;40 set_bit(tag, bitmap);41}42 43static int mvs_tag_alloc(struct mvs_info *mvi, u32 *tag_out)44{45 unsigned int index, tag;46 void *bitmap = mvi->rsvd_tags;47 48 index = find_first_zero_bit(bitmap, MVS_RSVD_SLOTS);49 tag = index;50 if (tag >= MVS_RSVD_SLOTS)51 return -SAS_QUEUE_FULL;52 mvs_tag_set(mvi, tag);53 *tag_out = tag;54 return 0;55}56 57static struct mvs_info *mvs_find_dev_mvi(struct domain_device *dev)58{59 unsigned long i = 0, j = 0, hi = 0;60 struct sas_ha_struct *sha = dev->port->ha;61 struct mvs_info *mvi = NULL;62 struct asd_sas_phy *phy;63 64 while (sha->sas_port[i]) {65 if (sha->sas_port[i] == dev->port) {66 spin_lock(&sha->sas_port[i]->phy_list_lock);67 phy = container_of(sha->sas_port[i]->phy_list.next,68 struct asd_sas_phy, port_phy_el);69 spin_unlock(&sha->sas_port[i]->phy_list_lock);70 j = 0;71 while (sha->sas_phy[j]) {72 if (sha->sas_phy[j] == phy)73 break;74 j++;75 }76 break;77 }78 i++;79 }80 hi = j/((struct mvs_prv_info *)sha->lldd_ha)->n_phy;81 mvi = ((struct mvs_prv_info *)sha->lldd_ha)->mvi[hi];82 83 return mvi;84 85}86 87static int mvs_find_dev_phyno(struct domain_device *dev, int *phyno)88{89 unsigned long i = 0, j = 0, n = 0, num = 0;90 struct mvs_device *mvi_dev = (struct mvs_device *)dev->lldd_dev;91 struct mvs_info *mvi = mvi_dev->mvi_info;92 struct sas_ha_struct *sha = dev->port->ha;93 94 while (sha->sas_port[i]) {95 if (sha->sas_port[i] == dev->port) {96 struct asd_sas_phy *phy;97 98 spin_lock(&sha->sas_port[i]->phy_list_lock);99 list_for_each_entry(phy,100 &sha->sas_port[i]->phy_list, port_phy_el) {101 j = 0;102 while (sha->sas_phy[j]) {103 if (sha->sas_phy[j] == phy)104 break;105 j++;106 }107 phyno[n] = (j >= mvi->chip->n_phy) ?108 (j - mvi->chip->n_phy) : j;109 num++;110 n++;111 }112 spin_unlock(&sha->sas_port[i]->phy_list_lock);113 break;114 }115 i++;116 }117 return num;118}119 120struct mvs_device *mvs_find_dev_by_reg_set(struct mvs_info *mvi,121 u8 reg_set)122{123 u32 dev_no;124 for (dev_no = 0; dev_no < MVS_MAX_DEVICES; dev_no++) {125 if (mvi->devices[dev_no].taskfileset == MVS_ID_NOT_MAPPED)126 continue;127 128 if (mvi->devices[dev_no].taskfileset == reg_set)129 return &mvi->devices[dev_no];130 }131 return NULL;132}133 134static inline void mvs_free_reg_set(struct mvs_info *mvi,135 struct mvs_device *dev)136{137 if (!dev) {138 mv_printk("device has been free.\n");139 return;140 }141 if (dev->taskfileset == MVS_ID_NOT_MAPPED)142 return;143 MVS_CHIP_DISP->free_reg_set(mvi, &dev->taskfileset);144}145 146static inline u8 mvs_assign_reg_set(struct mvs_info *mvi,147 struct mvs_device *dev)148{149 if (dev->taskfileset != MVS_ID_NOT_MAPPED)150 return 0;151 return MVS_CHIP_DISP->assign_reg_set(mvi, &dev->taskfileset);152}153 154void mvs_phys_reset(struct mvs_info *mvi, u32 phy_mask, int hard)155{156 u32 no;157 for_each_phy(phy_mask, phy_mask, no) {158 if (!(phy_mask & 1))159 continue;160 MVS_CHIP_DISP->phy_reset(mvi, no, hard);161 }162}163 164int mvs_phy_control(struct asd_sas_phy *sas_phy, enum phy_func func,165 void *funcdata)166{167 int rc = 0, phy_id = sas_phy->id;168 u32 tmp, i = 0, hi;169 struct sas_ha_struct *sha = sas_phy->ha;170 struct mvs_info *mvi = NULL;171 172 while (sha->sas_phy[i]) {173 if (sha->sas_phy[i] == sas_phy)174 break;175 i++;176 }177 hi = i/((struct mvs_prv_info *)sha->lldd_ha)->n_phy;178 mvi = ((struct mvs_prv_info *)sha->lldd_ha)->mvi[hi];179 180 switch (func) {181 case PHY_FUNC_SET_LINK_RATE:182 MVS_CHIP_DISP->phy_set_link_rate(mvi, phy_id, funcdata);183 break;184 185 case PHY_FUNC_HARD_RESET:186 tmp = MVS_CHIP_DISP->read_phy_ctl(mvi, phy_id);187 if (tmp & PHY_RST_HARD)188 break;189 MVS_CHIP_DISP->phy_reset(mvi, phy_id, MVS_HARD_RESET);190 break;191 192 case PHY_FUNC_LINK_RESET:193 MVS_CHIP_DISP->phy_enable(mvi, phy_id);194 MVS_CHIP_DISP->phy_reset(mvi, phy_id, MVS_SOFT_RESET);195 break;196 197 case PHY_FUNC_DISABLE:198 MVS_CHIP_DISP->phy_disable(mvi, phy_id);199 break;200 case PHY_FUNC_RELEASE_SPINUP_HOLD:201 default:202 rc = -ENOSYS;203 }204 msleep(200);205 return rc;206}207 208void mvs_set_sas_addr(struct mvs_info *mvi, int port_id, u32 off_lo,209 u32 off_hi, u64 sas_addr)210{211 u32 lo = (u32)sas_addr;212 u32 hi = (u32)(sas_addr>>32);213 214 MVS_CHIP_DISP->write_port_cfg_addr(mvi, port_id, off_lo);215 MVS_CHIP_DISP->write_port_cfg_data(mvi, port_id, lo);216 MVS_CHIP_DISP->write_port_cfg_addr(mvi, port_id, off_hi);217 MVS_CHIP_DISP->write_port_cfg_data(mvi, port_id, hi);218}219 220static void mvs_bytes_dmaed(struct mvs_info *mvi, int i, gfp_t gfp_flags)221{222 struct mvs_phy *phy = &mvi->phy[i];223 struct asd_sas_phy *sas_phy = &phy->sas_phy;224 225 if (!phy->phy_attached)226 return;227 228 if (!(phy->att_dev_info & PORT_DEV_TRGT_MASK)229 && phy->phy_type & PORT_TYPE_SAS) {230 return;231 }232 233 sas_notify_phy_event(sas_phy, PHYE_OOB_DONE, gfp_flags);234 235 if (sas_phy->phy) {236 struct sas_phy *sphy = sas_phy->phy;237 238 sphy->negotiated_linkrate = sas_phy->linkrate;239 sphy->minimum_linkrate = phy->minimum_linkrate;240 sphy->minimum_linkrate_hw = SAS_LINK_RATE_1_5_GBPS;241 sphy->maximum_linkrate = phy->maximum_linkrate;242 sphy->maximum_linkrate_hw = MVS_CHIP_DISP->phy_max_link_rate();243 }244 245 if (phy->phy_type & PORT_TYPE_SAS) {246 struct sas_identify_frame *id;247 248 id = (struct sas_identify_frame *)phy->frame_rcvd;249 id->dev_type = phy->identify.device_type;250 id->initiator_bits = SAS_PROTOCOL_ALL;251 id->target_bits = phy->identify.target_port_protocols;252 253 /* direct attached SAS device */254 if (phy->att_dev_info & PORT_SSP_TRGT_MASK) {255 MVS_CHIP_DISP->write_port_cfg_addr(mvi, i, PHYR_PHY_STAT);256 MVS_CHIP_DISP->write_port_cfg_data(mvi, i, 0x00);257 }258 } else if (phy->phy_type & PORT_TYPE_SATA) {259 /*Nothing*/260 }261 mv_dprintk("phy %d byte dmaded.\n", i + mvi->id * mvi->chip->n_phy);262 263 sas_phy->frame_rcvd_size = phy->frame_rcvd_size;264 265 sas_notify_port_event(sas_phy, PORTE_BYTES_DMAED, gfp_flags);266}267 268void mvs_scan_start(struct Scsi_Host *shost)269{270 int i, j;271 unsigned short core_nr;272 struct mvs_info *mvi;273 struct sas_ha_struct *sha = SHOST_TO_SAS_HA(shost);274 struct mvs_prv_info *mvs_prv = sha->lldd_ha;275 276 core_nr = ((struct mvs_prv_info *)sha->lldd_ha)->n_host;277 278 for (j = 0; j < core_nr; j++) {279 mvi = ((struct mvs_prv_info *)sha->lldd_ha)->mvi[j];280 for (i = 0; i < mvi->chip->n_phy; ++i)281 mvs_bytes_dmaed(mvi, i, GFP_KERNEL);282 }283 mvs_prv->scan_finished = 1;284}285 286int mvs_scan_finished(struct Scsi_Host *shost, unsigned long time)287{288 struct sas_ha_struct *sha = SHOST_TO_SAS_HA(shost);289 struct mvs_prv_info *mvs_prv = sha->lldd_ha;290 291 if (mvs_prv->scan_finished == 0)292 return 0;293 294 sas_drain_work(sha);295 return 1;296}297 298static int mvs_task_prep_smp(struct mvs_info *mvi,299 struct mvs_task_exec_info *tei)300{301 int elem, rc, i;302 struct sas_ha_struct *sha = mvi->sas;303 struct sas_task *task = tei->task;304 struct mvs_cmd_hdr *hdr = tei->hdr;305 struct domain_device *dev = task->dev;306 struct asd_sas_port *sas_port = dev->port;307 struct sas_phy *sphy = dev->phy;308 struct asd_sas_phy *sas_phy = sha->sas_phy[sphy->number];309 struct scatterlist *sg_req, *sg_resp;310 u32 req_len, resp_len, tag = tei->tag;311 void *buf_tmp;312 u8 *buf_oaf;313 dma_addr_t buf_tmp_dma;314 void *buf_prd;315 struct mvs_slot_info *slot = &mvi->slot_info[tag];316 u32 flags = (tei->n_elem << MCH_PRD_LEN_SHIFT);317 318 /*319 * DMA-map SMP request, response buffers320 */321 sg_req = &task->smp_task.smp_req;322 elem = dma_map_sg(mvi->dev, sg_req, 1, DMA_TO_DEVICE);323 if (!elem)324 return -ENOMEM;325 req_len = sg_dma_len(sg_req);326 327 sg_resp = &task->smp_task.smp_resp;328 elem = dma_map_sg(mvi->dev, sg_resp, 1, DMA_FROM_DEVICE);329 if (!elem) {330 rc = -ENOMEM;331 goto err_out;332 }333 resp_len = SB_RFB_MAX;334 335 /* must be in dwords */336 if ((req_len & 0x3) || (resp_len & 0x3)) {337 rc = -EINVAL;338 goto err_out_2;339 }340 341 /*342 * arrange MVS_SLOT_BUF_SZ-sized DMA buffer according to our needs343 */344 345 /* region 1: command table area (MVS_SSP_CMD_SZ bytes) ***** */346 buf_tmp = slot->buf;347 buf_tmp_dma = slot->buf_dma;348 349 hdr->cmd_tbl = cpu_to_le64(sg_dma_address(sg_req));350 351 /* region 2: open address frame area (MVS_OAF_SZ bytes) ********* */352 buf_oaf = buf_tmp;353 hdr->open_frame = cpu_to_le64(buf_tmp_dma);354 355 buf_tmp += MVS_OAF_SZ;356 buf_tmp_dma += MVS_OAF_SZ;357 358 /* region 3: PRD table *********************************** */359 buf_prd = buf_tmp;360 if (tei->n_elem)361 hdr->prd_tbl = cpu_to_le64(buf_tmp_dma);362 else363 hdr->prd_tbl = 0;364 365 i = MVS_CHIP_DISP->prd_size() * tei->n_elem;366 buf_tmp += i;367 buf_tmp_dma += i;368 369 /* region 4: status buffer (larger the PRD, smaller this buf) ****** */370 slot->response = buf_tmp;371 hdr->status_buf = cpu_to_le64(buf_tmp_dma);372 if (mvi->flags & MVF_FLAG_SOC)373 hdr->reserved[0] = 0;374 375 /*376 * Fill in TX ring and command slot header377 */378 slot->tx = mvi->tx_prod;379 mvi->tx[mvi->tx_prod] = cpu_to_le32((TXQ_CMD_SMP << TXQ_CMD_SHIFT) |380 TXQ_MODE_I | tag |381 (MVS_PHY_ID << TXQ_PHY_SHIFT));382 383 hdr->flags |= flags;384 hdr->lens = cpu_to_le32(((resp_len / 4) << 16) | ((req_len - 4) / 4));385 hdr->tags = cpu_to_le32(tag);386 hdr->data_len = 0;387 388 /* generate open address frame hdr (first 12 bytes) */389 /* initiator, SMP, ftype 1h */390 buf_oaf[0] = (1 << 7) | (PROTOCOL_SMP << 4) | 0x01;391 buf_oaf[1] = min(sas_port->linkrate, dev->linkrate) & 0xf;392 *(u16 *)(buf_oaf + 2) = 0xFFFF; /* SAS SPEC */393 memcpy(buf_oaf + 4, dev->sas_addr, SAS_ADDR_SIZE);394 395 /* fill in PRD (scatter/gather) table, if any */396 MVS_CHIP_DISP->make_prd(task->scatter, tei->n_elem, buf_prd);397 398 return 0;399 400err_out_2:401 dma_unmap_sg(mvi->dev, &tei->task->smp_task.smp_resp, 1,402 DMA_FROM_DEVICE);403err_out:404 dma_unmap_sg(mvi->dev, &tei->task->smp_task.smp_req, 1,405 DMA_TO_DEVICE);406 return rc;407}408 409static u32 mvs_get_ncq_tag(struct sas_task *task, u32 *tag)410{411 struct ata_queued_cmd *qc = task->uldd_task;412 413 if (qc) {414 if (qc->tf.command == ATA_CMD_FPDMA_WRITE ||415 qc->tf.command == ATA_CMD_FPDMA_READ ||416 qc->tf.command == ATA_CMD_FPDMA_RECV ||417 qc->tf.command == ATA_CMD_FPDMA_SEND ||418 qc->tf.command == ATA_CMD_NCQ_NON_DATA) {419 *tag = qc->tag;420 return 1;421 }422 }423 424 return 0;425}426 427static int mvs_task_prep_ata(struct mvs_info *mvi,428 struct mvs_task_exec_info *tei)429{430 struct sas_task *task = tei->task;431 struct domain_device *dev = task->dev;432 struct mvs_device *mvi_dev = dev->lldd_dev;433 struct mvs_cmd_hdr *hdr = tei->hdr;434 struct asd_sas_port *sas_port = dev->port;435 struct mvs_slot_info *slot;436 void *buf_prd;437 u32 tag = tei->tag, hdr_tag;438 u32 flags, del_q;439 void *buf_tmp;440 u8 *buf_cmd, *buf_oaf;441 dma_addr_t buf_tmp_dma;442 u32 i, req_len, resp_len;443 const u32 max_resp_len = SB_RFB_MAX;444 445 if (mvs_assign_reg_set(mvi, mvi_dev) == MVS_ID_NOT_MAPPED) {446 mv_dprintk("Have not enough regiset for dev %d.\n",447 mvi_dev->device_id);448 return -EBUSY;449 }450 slot = &mvi->slot_info[tag];451 slot->tx = mvi->tx_prod;452 del_q = TXQ_MODE_I | tag |453 (TXQ_CMD_STP << TXQ_CMD_SHIFT) |454 ((sas_port->phy_mask & TXQ_PHY_MASK) << TXQ_PHY_SHIFT) |455 (mvi_dev->taskfileset << TXQ_SRS_SHIFT);456 mvi->tx[mvi->tx_prod] = cpu_to_le32(del_q);457 458 if (task->data_dir == DMA_FROM_DEVICE)459 flags = (MVS_CHIP_DISP->prd_count() << MCH_PRD_LEN_SHIFT);460 else461 flags = (tei->n_elem << MCH_PRD_LEN_SHIFT);462 463 if (task->ata_task.use_ncq)464 flags |= MCH_FPDMA;465 if (dev->sata_dev.class == ATA_DEV_ATAPI) {466 if (task->ata_task.fis.command != ATA_CMD_ID_ATAPI)467 flags |= MCH_ATAPI;468 }469 470 hdr->flags = cpu_to_le32(flags);471 472 if (task->ata_task.use_ncq && mvs_get_ncq_tag(task, &hdr_tag))473 task->ata_task.fis.sector_count |= (u8) (hdr_tag << 3);474 else475 hdr_tag = tag;476 477 hdr->tags = cpu_to_le32(hdr_tag);478 479 hdr->data_len = cpu_to_le32(task->total_xfer_len);480 481 /*482 * arrange MVS_SLOT_BUF_SZ-sized DMA buffer according to our needs483 */484 485 /* region 1: command table area (MVS_ATA_CMD_SZ bytes) ************** */486 buf_cmd = buf_tmp = slot->buf;487 buf_tmp_dma = slot->buf_dma;488 489 hdr->cmd_tbl = cpu_to_le64(buf_tmp_dma);490 491 buf_tmp += MVS_ATA_CMD_SZ;492 buf_tmp_dma += MVS_ATA_CMD_SZ;493 494 /* region 2: open address frame area (MVS_OAF_SZ bytes) ********* */495 /* used for STP. unused for SATA? */496 buf_oaf = buf_tmp;497 hdr->open_frame = cpu_to_le64(buf_tmp_dma);498 499 buf_tmp += MVS_OAF_SZ;500 buf_tmp_dma += MVS_OAF_SZ;501 502 /* region 3: PRD table ********************************************* */503 buf_prd = buf_tmp;504 505 if (tei->n_elem)506 hdr->prd_tbl = cpu_to_le64(buf_tmp_dma);507 else508 hdr->prd_tbl = 0;509 i = MVS_CHIP_DISP->prd_size() * MVS_CHIP_DISP->prd_count();510 511 buf_tmp += i;512 buf_tmp_dma += i;513 514 /* region 4: status buffer (larger the PRD, smaller this buf) ****** */515 slot->response = buf_tmp;516 hdr->status_buf = cpu_to_le64(buf_tmp_dma);517 if (mvi->flags & MVF_FLAG_SOC)518 hdr->reserved[0] = 0;519 520 req_len = sizeof(struct host_to_dev_fis);521 resp_len = MVS_SLOT_BUF_SZ - MVS_ATA_CMD_SZ -522 sizeof(struct mvs_err_info) - i;523 524 /* request, response lengths */525 resp_len = min(resp_len, max_resp_len);526 hdr->lens = cpu_to_le32(((resp_len / 4) << 16) | (req_len / 4));527 528 if (likely(!task->ata_task.device_control_reg_update))529 task->ata_task.fis.flags |= 0x80; /* C=1: update ATA cmd reg */530 /* fill in command FIS and ATAPI CDB */531 memcpy(buf_cmd, &task->ata_task.fis, sizeof(struct host_to_dev_fis));532 if (dev->sata_dev.class == ATA_DEV_ATAPI)533 memcpy(buf_cmd + STP_ATAPI_CMD,534 task->ata_task.atapi_packet, 16);535 536 /* generate open address frame hdr (first 12 bytes) */537 /* initiator, STP, ftype 1h */538 buf_oaf[0] = (1 << 7) | (PROTOCOL_STP << 4) | 0x1;539 buf_oaf[1] = min(sas_port->linkrate, dev->linkrate) & 0xf;540 *(u16 *)(buf_oaf + 2) = cpu_to_be16(mvi_dev->device_id + 1);541 memcpy(buf_oaf + 4, dev->sas_addr, SAS_ADDR_SIZE);542 543 /* fill in PRD (scatter/gather) table, if any */544 MVS_CHIP_DISP->make_prd(task->scatter, tei->n_elem, buf_prd);545 546 if (task->data_dir == DMA_FROM_DEVICE)547 MVS_CHIP_DISP->dma_fix(mvi, sas_port->phy_mask,548 TRASH_BUCKET_SIZE, tei->n_elem, buf_prd);549 550 return 0;551}552 553static int mvs_task_prep_ssp(struct mvs_info *mvi,554 struct mvs_task_exec_info *tei, int is_tmf,555 struct sas_tmf_task *tmf)556{557 struct sas_task *task = tei->task;558 struct mvs_cmd_hdr *hdr = tei->hdr;559 struct mvs_port *port = tei->port;560 struct domain_device *dev = task->dev;561 struct mvs_device *mvi_dev = dev->lldd_dev;562 struct asd_sas_port *sas_port = dev->port;563 struct mvs_slot_info *slot;564 void *buf_prd;565 struct ssp_frame_hdr *ssp_hdr;566 void *buf_tmp;567 u8 *buf_cmd, *buf_oaf;568 dma_addr_t buf_tmp_dma;569 u32 flags;570 u32 resp_len, req_len, i, tag = tei->tag;571 const u32 max_resp_len = SB_RFB_MAX;572 u32 phy_mask;573 574 slot = &mvi->slot_info[tag];575 576 phy_mask = ((port->wide_port_phymap) ? port->wide_port_phymap :577 sas_port->phy_mask) & TXQ_PHY_MASK;578 579 slot->tx = mvi->tx_prod;580 mvi->tx[mvi->tx_prod] = cpu_to_le32(TXQ_MODE_I | tag |581 (TXQ_CMD_SSP << TXQ_CMD_SHIFT) |582 (phy_mask << TXQ_PHY_SHIFT));583 584 flags = MCH_RETRY;585 if (is_tmf)586 flags |= (MCH_SSP_FR_TASK << MCH_SSP_FR_TYPE_SHIFT);587 else588 flags |= (MCH_SSP_FR_CMD << MCH_SSP_FR_TYPE_SHIFT);589 590 hdr->flags = cpu_to_le32(flags | (tei->n_elem << MCH_PRD_LEN_SHIFT));591 hdr->tags = cpu_to_le32(tag);592 hdr->data_len = cpu_to_le32(task->total_xfer_len);593 594 /*595 * arrange MVS_SLOT_BUF_SZ-sized DMA buffer according to our needs596 */597 598 /* region 1: command table area (MVS_SSP_CMD_SZ bytes) ************** */599 buf_cmd = buf_tmp = slot->buf;600 buf_tmp_dma = slot->buf_dma;601 602 hdr->cmd_tbl = cpu_to_le64(buf_tmp_dma);603 604 buf_tmp += MVS_SSP_CMD_SZ;605 buf_tmp_dma += MVS_SSP_CMD_SZ;606 607 /* region 2: open address frame area (MVS_OAF_SZ bytes) ********* */608 buf_oaf = buf_tmp;609 hdr->open_frame = cpu_to_le64(buf_tmp_dma);610 611 buf_tmp += MVS_OAF_SZ;612 buf_tmp_dma += MVS_OAF_SZ;613 614 /* region 3: PRD table ********************************************* */615 buf_prd = buf_tmp;616 if (tei->n_elem)617 hdr->prd_tbl = cpu_to_le64(buf_tmp_dma);618 else619 hdr->prd_tbl = 0;620 621 i = MVS_CHIP_DISP->prd_size() * tei->n_elem;622 buf_tmp += i;623 buf_tmp_dma += i;624 625 /* region 4: status buffer (larger the PRD, smaller this buf) ****** */626 slot->response = buf_tmp;627 hdr->status_buf = cpu_to_le64(buf_tmp_dma);628 if (mvi->flags & MVF_FLAG_SOC)629 hdr->reserved[0] = 0;630 631 resp_len = MVS_SLOT_BUF_SZ - MVS_SSP_CMD_SZ - MVS_OAF_SZ -632 sizeof(struct mvs_err_info) - i;633 resp_len = min(resp_len, max_resp_len);634 635 req_len = sizeof(struct ssp_frame_hdr) + 28;636 637 /* request, response lengths */638 hdr->lens = cpu_to_le32(((resp_len / 4) << 16) | (req_len / 4));639 640 /* generate open address frame hdr (first 12 bytes) */641 /* initiator, SSP, ftype 1h */642 buf_oaf[0] = (1 << 7) | (PROTOCOL_SSP << 4) | 0x1;643 buf_oaf[1] = min(sas_port->linkrate, dev->linkrate) & 0xf;644 *(u16 *)(buf_oaf + 2) = cpu_to_be16(mvi_dev->device_id + 1);645 memcpy(buf_oaf + 4, dev->sas_addr, SAS_ADDR_SIZE);646 647 /* fill in SSP frame header (Command Table.SSP frame header) */648 ssp_hdr = (struct ssp_frame_hdr *)buf_cmd;649 650 if (is_tmf)651 ssp_hdr->frame_type = SSP_TASK;652 else653 ssp_hdr->frame_type = SSP_COMMAND;654 655 memcpy(ssp_hdr->hashed_dest_addr, dev->hashed_sas_addr,656 HASHED_SAS_ADDR_SIZE);657 memcpy(ssp_hdr->hashed_src_addr,658 dev->hashed_sas_addr, HASHED_SAS_ADDR_SIZE);659 ssp_hdr->tag = cpu_to_be16(tag);660 661 /* fill in IU for TASK and Command Frame */662 buf_cmd += sizeof(*ssp_hdr);663 memcpy(buf_cmd, &task->ssp_task.LUN, 8);664 665 if (ssp_hdr->frame_type != SSP_TASK) {666 buf_cmd[9] = task->ssp_task.task_attr;667 memcpy(buf_cmd + 12, task->ssp_task.cmd->cmnd,668 task->ssp_task.cmd->cmd_len);669 } else{670 buf_cmd[10] = tmf->tmf;671 switch (tmf->tmf) {672 case TMF_ABORT_TASK:673 case TMF_QUERY_TASK:674 buf_cmd[12] =675 (tmf->tag_of_task_to_be_managed >> 8) & 0xff;676 buf_cmd[13] =677 tmf->tag_of_task_to_be_managed & 0xff;678 break;679 default:680 break;681 }682 }683 /* fill in PRD (scatter/gather) table, if any */684 MVS_CHIP_DISP->make_prd(task->scatter, tei->n_elem, buf_prd);685 return 0;686}687 688#define DEV_IS_GONE(mvi_dev) ((!mvi_dev || (mvi_dev->dev_type == SAS_PHY_UNUSED)))689static int mvs_task_prep(struct sas_task *task, struct mvs_info *mvi, int is_tmf,690 struct sas_tmf_task *tmf, int *pass)691{692 struct domain_device *dev = task->dev;693 struct mvs_device *mvi_dev = dev->lldd_dev;694 struct mvs_task_exec_info tei;695 struct mvs_slot_info *slot;696 u32 tag = 0xdeadbeef, n_elem = 0;697 struct request *rq;698 int rc = 0;699 700 if (!dev->port) {701 struct task_status_struct *tsm = &task->task_status;702 703 tsm->resp = SAS_TASK_UNDELIVERED;704 tsm->stat = SAS_PHY_DOWN;705 /*706 * libsas will use dev->port, should707 * not call task_done for sata708 */709 if (dev->dev_type != SAS_SATA_DEV)710 task->task_done(task);711 return rc;712 }713 714 if (DEV_IS_GONE(mvi_dev)) {715 if (mvi_dev)716 mv_dprintk("device %d not ready.\n",717 mvi_dev->device_id);718 else719 mv_dprintk("device %016llx not ready.\n",720 SAS_ADDR(dev->sas_addr));721 722 rc = SAS_PHY_DOWN;723 return rc;724 }725 tei.port = dev->port->lldd_port;726 if (tei.port && !tei.port->port_attached && !tmf) {727 if (sas_protocol_ata(task->task_proto)) {728 struct task_status_struct *ts = &task->task_status;729 mv_dprintk("SATA/STP port %d does not attach"730 "device.\n", dev->port->id);731 ts->resp = SAS_TASK_COMPLETE;732 ts->stat = SAS_PHY_DOWN;733 734 task->task_done(task);735 736 } else {737 struct task_status_struct *ts = &task->task_status;738 mv_dprintk("SAS port %d does not attach"739 "device.\n", dev->port->id);740 ts->resp = SAS_TASK_UNDELIVERED;741 ts->stat = SAS_PHY_DOWN;742 task->task_done(task);743 }744 return rc;745 }746 747 if (!sas_protocol_ata(task->task_proto)) {748 if (task->num_scatter) {749 n_elem = dma_map_sg(mvi->dev,750 task->scatter,751 task->num_scatter,752 task->data_dir);753 if (!n_elem) {754 rc = -ENOMEM;755 goto prep_out;756 }757 }758 } else {759 n_elem = task->num_scatter;760 }761 762 rq = sas_task_find_rq(task);763 if (rq) {764 tag = rq->tag + MVS_RSVD_SLOTS;765 } else {766 rc = mvs_tag_alloc(mvi, &tag);767 if (rc)768 goto err_out;769 }770 771 slot = &mvi->slot_info[tag];772 773 task->lldd_task = NULL;774 slot->n_elem = n_elem;775 slot->slot_tag = tag;776 777 slot->buf = dma_pool_zalloc(mvi->dma_pool, GFP_ATOMIC, &slot->buf_dma);778 if (!slot->buf) {779 rc = -ENOMEM;780 goto err_out_tag;781 }782 783 tei.task = task;784 tei.hdr = &mvi->slot[tag];785 tei.tag = tag;786 tei.n_elem = n_elem;787 switch (task->task_proto) {788 case SAS_PROTOCOL_SMP:789 rc = mvs_task_prep_smp(mvi, &tei);790 break;791 case SAS_PROTOCOL_SSP:792 rc = mvs_task_prep_ssp(mvi, &tei, is_tmf, tmf);793 break;794 case SAS_PROTOCOL_SATA:795 case SAS_PROTOCOL_STP:796 case SAS_PROTOCOL_SATA | SAS_PROTOCOL_STP:797 rc = mvs_task_prep_ata(mvi, &tei);798 break;799 default:800 dev_printk(KERN_ERR, mvi->dev,801 "unknown sas_task proto: 0x%x\n",802 task->task_proto);803 rc = -EINVAL;804 break;805 }806 807 if (rc) {808 mv_dprintk("rc is %x\n", rc);809 goto err_out_slot_buf;810 }811 slot->task = task;812 slot->port = tei.port;813 task->lldd_task = slot;814 list_add_tail(&slot->entry, &tei.port->list);815 816 mvi_dev->running_req++;817 ++(*pass);818 mvi->tx_prod = (mvi->tx_prod + 1) & (MVS_CHIP_SLOT_SZ - 1);819 820 return rc;821 822err_out_slot_buf:823 dma_pool_free(mvi->dma_pool, slot->buf, slot->buf_dma);824err_out_tag:825 mvs_tag_free(mvi, tag);826err_out:827 828 dev_printk(KERN_ERR, mvi->dev, "mvsas prep failed[%d]!\n", rc);829 if (!sas_protocol_ata(task->task_proto))830 if (n_elem)831 dma_unmap_sg(mvi->dev, task->scatter, n_elem,832 task->data_dir);833prep_out:834 return rc;835}836 837int mvs_queue_command(struct sas_task *task, gfp_t gfp_flags)838{839 struct mvs_info *mvi = NULL;840 u32 rc = 0;841 u32 pass = 0;842 unsigned long flags = 0;843 struct sas_tmf_task *tmf = task->tmf;844 int is_tmf = !!task->tmf;845 846 mvi = ((struct mvs_device *)task->dev->lldd_dev)->mvi_info;847 848 spin_lock_irqsave(&mvi->lock, flags);849 rc = mvs_task_prep(task, mvi, is_tmf, tmf, &pass);850 if (rc)851 dev_printk(KERN_ERR, mvi->dev, "mvsas exec failed[%d]!\n", rc);852 853 if (likely(pass))854 MVS_CHIP_DISP->start_delivery(mvi, (mvi->tx_prod - 1) &855 (MVS_CHIP_SLOT_SZ - 1));856 spin_unlock_irqrestore(&mvi->lock, flags);857 858 return rc;859}860 861static void mvs_slot_free(struct mvs_info *mvi, u32 rx_desc)862{863 u32 slot_idx = rx_desc & RXQ_SLOT_MASK;864 mvs_tag_free(mvi, slot_idx);865}866 867static void mvs_slot_task_free(struct mvs_info *mvi, struct sas_task *task,868 struct mvs_slot_info *slot, u32 slot_idx)869{870 if (!slot)871 return;872 if (!slot->task)873 return;874 if (!sas_protocol_ata(task->task_proto))875 if (slot->n_elem)876 dma_unmap_sg(mvi->dev, task->scatter,877 slot->n_elem, task->data_dir);878 879 switch (task->task_proto) {880 case SAS_PROTOCOL_SMP:881 dma_unmap_sg(mvi->dev, &task->smp_task.smp_resp, 1,882 DMA_FROM_DEVICE);883 dma_unmap_sg(mvi->dev, &task->smp_task.smp_req, 1,884 DMA_TO_DEVICE);885 break;886 887 case SAS_PROTOCOL_SATA:888 case SAS_PROTOCOL_STP:889 case SAS_PROTOCOL_SSP:890 default:891 /* do nothing */892 break;893 }894 895 if (slot->buf) {896 dma_pool_free(mvi->dma_pool, slot->buf, slot->buf_dma);897 slot->buf = NULL;898 }899 list_del_init(&slot->entry);900 task->lldd_task = NULL;901 slot->task = NULL;902 slot->port = NULL;903 slot->slot_tag = 0xFFFFFFFF;904 mvs_slot_free(mvi, slot_idx);905}906 907static void mvs_update_wideport(struct mvs_info *mvi, int phy_no)908{909 struct mvs_phy *phy = &mvi->phy[phy_no];910 struct mvs_port *port = phy->port;911 int j, no;912 913 for_each_phy(port->wide_port_phymap, j, no) {914 if (j & 1) {915 MVS_CHIP_DISP->write_port_cfg_addr(mvi, no,916 PHYR_WIDE_PORT);917 MVS_CHIP_DISP->write_port_cfg_data(mvi, no,918 port->wide_port_phymap);919 } else {920 MVS_CHIP_DISP->write_port_cfg_addr(mvi, no,921 PHYR_WIDE_PORT);922 MVS_CHIP_DISP->write_port_cfg_data(mvi, no,923 0);924 }925 }926}927 928static u32 mvs_is_phy_ready(struct mvs_info *mvi, int i)929{930 u32 tmp;931 struct mvs_phy *phy = &mvi->phy[i];932 struct mvs_port *port = phy->port;933 934 tmp = MVS_CHIP_DISP->read_phy_ctl(mvi, i);935 if ((tmp & PHY_READY_MASK) && !(phy->irq_status & PHYEV_POOF)) {936 if (!port)937 phy->phy_attached = 1;938 return tmp;939 }940 941 if (port) {942 if (phy->phy_type & PORT_TYPE_SAS) {943 port->wide_port_phymap &= ~(1U << i);944 if (!port->wide_port_phymap)945 port->port_attached = 0;946 mvs_update_wideport(mvi, i);947 } else if (phy->phy_type & PORT_TYPE_SATA)948 port->port_attached = 0;949 phy->port = NULL;950 phy->phy_attached = 0;951 phy->phy_type &= ~(PORT_TYPE_SAS | PORT_TYPE_SATA);952 }953 return 0;954}955 956static void *mvs_get_d2h_reg(struct mvs_info *mvi, int i, void *buf)957{958 u32 *s = (u32 *) buf;959 960 if (!s)961 return NULL;962 963 MVS_CHIP_DISP->write_port_cfg_addr(mvi, i, PHYR_SATA_SIG3);964 s[3] = cpu_to_le32(MVS_CHIP_DISP->read_port_cfg_data(mvi, i));965 966 MVS_CHIP_DISP->write_port_cfg_addr(mvi, i, PHYR_SATA_SIG2);967 s[2] = cpu_to_le32(MVS_CHIP_DISP->read_port_cfg_data(mvi, i));968 969 MVS_CHIP_DISP->write_port_cfg_addr(mvi, i, PHYR_SATA_SIG1);970 s[1] = cpu_to_le32(MVS_CHIP_DISP->read_port_cfg_data(mvi, i));971 972 MVS_CHIP_DISP->write_port_cfg_addr(mvi, i, PHYR_SATA_SIG0);973 s[0] = cpu_to_le32(MVS_CHIP_DISP->read_port_cfg_data(mvi, i));974 975 if (((s[1] & 0x00FFFFFF) == 0x00EB1401) && (*(u8 *)&s[3] == 0x01))976 s[1] = 0x00EB1401 | (*((u8 *)&s[1] + 3) & 0x10);977 978 return s;979}980 981static u32 mvs_is_sig_fis_received(u32 irq_status)982{983 return irq_status & PHYEV_SIG_FIS;984}985 986static void mvs_sig_remove_timer(struct mvs_phy *phy)987{988 if (phy->timer.function)989 del_timer(&phy->timer);990 phy->timer.function = NULL;991}992 993void mvs_update_phyinfo(struct mvs_info *mvi, int i, int get_st)994{995 struct mvs_phy *phy = &mvi->phy[i];996 struct sas_identify_frame *id;997 998 id = (struct sas_identify_frame *)phy->frame_rcvd;999 1000 if (get_st) {1001 phy->irq_status = MVS_CHIP_DISP->read_port_irq_stat(mvi, i);1002 phy->phy_status = mvs_is_phy_ready(mvi, i);1003 }1004 1005 if (phy->phy_status) {1006 int oob_done = 0;1007 struct asd_sas_phy *sas_phy = &mvi->phy[i].sas_phy;1008 1009 oob_done = MVS_CHIP_DISP->oob_done(mvi, i);1010 1011 MVS_CHIP_DISP->fix_phy_info(mvi, i, id);1012 if (phy->phy_type & PORT_TYPE_SATA) {1013 phy->identify.target_port_protocols = SAS_PROTOCOL_STP;1014 if (mvs_is_sig_fis_received(phy->irq_status)) {1015 mvs_sig_remove_timer(phy);1016 phy->phy_attached = 1;1017 phy->att_dev_sas_addr =1018 i + mvi->id * mvi->chip->n_phy;1019 if (oob_done)1020 sas_phy->oob_mode = SATA_OOB_MODE;1021 phy->frame_rcvd_size =1022 sizeof(struct dev_to_host_fis);1023 mvs_get_d2h_reg(mvi, i, id);1024 } else {1025 u32 tmp;1026 dev_printk(KERN_DEBUG, mvi->dev,1027 "Phy%d : No sig fis\n", i);1028 tmp = MVS_CHIP_DISP->read_port_irq_mask(mvi, i);1029 MVS_CHIP_DISP->write_port_irq_mask(mvi, i,1030 tmp | PHYEV_SIG_FIS);1031 phy->phy_attached = 0;1032 phy->phy_type &= ~PORT_TYPE_SATA;1033 goto out_done;1034 }1035 } else if (phy->phy_type & PORT_TYPE_SAS1036 || phy->att_dev_info & PORT_SSP_INIT_MASK) {1037 phy->phy_attached = 1;1038 phy->identify.device_type =1039 phy->att_dev_info & PORT_DEV_TYPE_MASK;1040 1041 if (phy->identify.device_type == SAS_END_DEVICE)1042 phy->identify.target_port_protocols =1043 SAS_PROTOCOL_SSP;1044 else if (phy->identify.device_type != SAS_PHY_UNUSED)1045 phy->identify.target_port_protocols =1046 SAS_PROTOCOL_SMP;1047 if (oob_done)1048 sas_phy->oob_mode = SAS_OOB_MODE;1049 phy->frame_rcvd_size =1050 sizeof(struct sas_identify_frame);1051 }1052 memcpy(sas_phy->attached_sas_addr,1053 &phy->att_dev_sas_addr, SAS_ADDR_SIZE);1054 1055 if (MVS_CHIP_DISP->phy_work_around)1056 MVS_CHIP_DISP->phy_work_around(mvi, i);1057 }1058 mv_dprintk("phy %d attach dev info is %x\n",1059 i + mvi->id * mvi->chip->n_phy, phy->att_dev_info);1060 mv_dprintk("phy %d attach sas addr is %llx\n",1061 i + mvi->id * mvi->chip->n_phy, phy->att_dev_sas_addr);1062out_done:1063 if (get_st)1064 MVS_CHIP_DISP->write_port_irq_stat(mvi, i, phy->irq_status);1065}1066 1067static void mvs_port_notify_formed(struct asd_sas_phy *sas_phy, int lock)1068{1069 struct sas_ha_struct *sas_ha = sas_phy->ha;1070 struct mvs_info *mvi = NULL; int i = 0, hi;1071 struct mvs_phy *phy = sas_phy->lldd_phy;1072 struct asd_sas_port *sas_port = sas_phy->port;1073 struct mvs_port *port;1074 unsigned long flags = 0;1075 if (!sas_port)1076 return;1077 1078 while (sas_ha->sas_phy[i]) {1079 if (sas_ha->sas_phy[i] == sas_phy)1080 break;1081 i++;1082 }1083 hi = i/((struct mvs_prv_info *)sas_ha->lldd_ha)->n_phy;1084 mvi = ((struct mvs_prv_info *)sas_ha->lldd_ha)->mvi[hi];1085 if (i >= mvi->chip->n_phy)1086 port = &mvi->port[i - mvi->chip->n_phy];1087 else1088 port = &mvi->port[i];1089 if (lock)1090 spin_lock_irqsave(&mvi->lock, flags);1091 port->port_attached = 1;1092 phy->port = port;1093 sas_port->lldd_port = port;1094 if (phy->phy_type & PORT_TYPE_SAS) {1095 port->wide_port_phymap = sas_port->phy_mask;1096 mv_printk("set wide port phy map %x\n", sas_port->phy_mask);1097 mvs_update_wideport(mvi, sas_phy->id);1098 1099 /* direct attached SAS device */1100 if (phy->att_dev_info & PORT_SSP_TRGT_MASK) {1101 MVS_CHIP_DISP->write_port_cfg_addr(mvi, i, PHYR_PHY_STAT);1102 MVS_CHIP_DISP->write_port_cfg_data(mvi, i, 0x04);1103 }1104 }1105 if (lock)1106 spin_unlock_irqrestore(&mvi->lock, flags);1107}1108 1109static void mvs_port_notify_deformed(struct asd_sas_phy *sas_phy, int lock)1110{1111 struct domain_device *dev;1112 struct mvs_phy *phy = sas_phy->lldd_phy;1113 struct mvs_info *mvi = phy->mvi;1114 struct asd_sas_port *port = sas_phy->port;1115 int phy_no = 0;1116 1117 while (phy != &mvi->phy[phy_no]) {1118 phy_no++;1119 if (phy_no >= MVS_MAX_PHYS)1120 return;1121 }1122 list_for_each_entry(dev, &port->dev_list, dev_list_node)1123 mvs_do_release_task(phy->mvi, phy_no, dev);1124 1125}1126 1127 1128void mvs_port_formed(struct asd_sas_phy *sas_phy)1129{1130 mvs_port_notify_formed(sas_phy, 1);1131}1132 1133void mvs_port_deformed(struct asd_sas_phy *sas_phy)1134{1135 mvs_port_notify_deformed(sas_phy, 1);1136}1137 1138static struct mvs_device *mvs_alloc_dev(struct mvs_info *mvi)1139{1140 u32 dev;1141 for (dev = 0; dev < MVS_MAX_DEVICES; dev++) {1142 if (mvi->devices[dev].dev_type == SAS_PHY_UNUSED) {1143 mvi->devices[dev].device_id = dev;1144 return &mvi->devices[dev];1145 }1146 }1147 1148 if (dev == MVS_MAX_DEVICES)1149 mv_printk("max support %d devices, ignore ..\n",1150 MVS_MAX_DEVICES);1151 1152 return NULL;1153}1154 1155static void mvs_free_dev(struct mvs_device *mvi_dev)1156{1157 u32 id = mvi_dev->device_id;1158 memset(mvi_dev, 0, sizeof(*mvi_dev));1159 mvi_dev->device_id = id;1160 mvi_dev->dev_type = SAS_PHY_UNUSED;1161 mvi_dev->dev_status = MVS_DEV_NORMAL;1162 mvi_dev->taskfileset = MVS_ID_NOT_MAPPED;1163}1164 1165static int mvs_dev_found_notify(struct domain_device *dev, int lock)1166{1167 unsigned long flags = 0;1168 int res = 0;1169 struct mvs_info *mvi = NULL;1170 struct domain_device *parent_dev = dev->parent;1171 struct mvs_device *mvi_device;1172 1173 mvi = mvs_find_dev_mvi(dev);1174 1175 if (lock)1176 spin_lock_irqsave(&mvi->lock, flags);1177 1178 mvi_device = mvs_alloc_dev(mvi);1179 if (!mvi_device) {1180 res = -1;1181 goto found_out;1182 }1183 dev->lldd_dev = mvi_device;1184 mvi_device->dev_status = MVS_DEV_NORMAL;1185 mvi_device->dev_type = dev->dev_type;1186 mvi_device->mvi_info = mvi;1187 mvi_device->sas_device = dev;1188 if (parent_dev && dev_is_expander(parent_dev->dev_type)) {1189 int phy_id;1190 1191 phy_id = sas_find_attached_phy_id(&parent_dev->ex_dev, dev);1192 if (phy_id < 0) {1193 mv_printk("Error: no attached dev:%016llx"1194 "at ex:%016llx.\n",1195 SAS_ADDR(dev->sas_addr),1196 SAS_ADDR(parent_dev->sas_addr));1197 res = phy_id;1198 } else {1199 mvi_device->attached_phy = phy_id;1200 }1201 }1202 1203found_out:1204 if (lock)1205 spin_unlock_irqrestore(&mvi->lock, flags);1206 return res;1207}1208 1209int mvs_dev_found(struct domain_device *dev)1210{1211 return mvs_dev_found_notify(dev, 1);1212}1213 1214static void mvs_dev_gone_notify(struct domain_device *dev)1215{1216 unsigned long flags = 0;1217 struct mvs_device *mvi_dev = dev->lldd_dev;1218 struct mvs_info *mvi;1219 1220 if (!mvi_dev) {1221 mv_dprintk("found dev has gone.\n");1222 return;1223 }1224 1225 mvi = mvi_dev->mvi_info;1226 1227 spin_lock_irqsave(&mvi->lock, flags);1228 1229 mv_dprintk("found dev[%d:%x] is gone.\n",1230 mvi_dev->device_id, mvi_dev->dev_type);1231 mvs_release_task(mvi, dev);1232 mvs_free_reg_set(mvi, mvi_dev);1233 mvs_free_dev(mvi_dev);1234 1235 dev->lldd_dev = NULL;1236 mvi_dev->sas_device = NULL;1237 1238 spin_unlock_irqrestore(&mvi->lock, flags);1239}1240 1241 1242void mvs_dev_gone(struct domain_device *dev)1243{1244 mvs_dev_gone_notify(dev);1245}1246 1247/* Standard mandates link reset for ATA (type 0)1248 and hard reset for SSP (type 1) , only for RECOVERY */1249static int mvs_debug_I_T_nexus_reset(struct domain_device *dev)1250{1251 int rc;1252 struct sas_phy *phy = sas_get_local_phy(dev);1253 int reset_type = (dev->dev_type == SAS_SATA_DEV ||1254 (dev->tproto & SAS_PROTOCOL_STP)) ? 0 : 1;1255 rc = sas_phy_reset(phy, reset_type);1256 sas_put_local_phy(phy);1257 msleep(2000);1258 return rc;1259}1260 1261/* mandatory SAM-3 */1262int mvs_lu_reset(struct domain_device *dev, u8 *lun)1263{1264 unsigned long flags;1265 int rc = TMF_RESP_FUNC_FAILED;1266 struct mvs_device * mvi_dev = dev->lldd_dev;1267 struct mvs_info *mvi = mvi_dev->mvi_info;1268 1269 mvi_dev->dev_status = MVS_DEV_EH;1270 rc = sas_lu_reset(dev, lun);1271 if (rc == TMF_RESP_FUNC_COMPLETE) {1272 spin_lock_irqsave(&mvi->lock, flags);1273 mvs_release_task(mvi, dev);1274 spin_unlock_irqrestore(&mvi->lock, flags);1275 }1276 /* If failed, fall-through I_T_Nexus reset */1277 mv_printk("%s for device[%x]:rc= %d\n", __func__,1278 mvi_dev->device_id, rc);1279 return rc;1280}1281 1282int mvs_I_T_nexus_reset(struct domain_device *dev)1283{1284 unsigned long flags;1285 int rc = TMF_RESP_FUNC_FAILED;1286 struct mvs_device *mvi_dev = (struct mvs_device *)dev->lldd_dev;1287 struct mvs_info *mvi = mvi_dev->mvi_info;1288 1289 if (mvi_dev->dev_status != MVS_DEV_EH)1290 return TMF_RESP_FUNC_COMPLETE;1291 else1292 mvi_dev->dev_status = MVS_DEV_NORMAL;1293 rc = mvs_debug_I_T_nexus_reset(dev);1294 mv_printk("%s for device[%x]:rc= %d\n",1295 __func__, mvi_dev->device_id, rc);1296 1297 spin_lock_irqsave(&mvi->lock, flags);1298 mvs_release_task(mvi, dev);1299 spin_unlock_irqrestore(&mvi->lock, flags);1300 1301 return rc;1302}1303/* optional SAM-3 */1304int mvs_query_task(struct sas_task *task)1305{1306 u32 tag;1307 int rc = TMF_RESP_FUNC_FAILED;1308 1309 if (task->lldd_task && task->task_proto & SAS_PROTOCOL_SSP) {1310 struct domain_device *dev = task->dev;1311 struct mvs_device *mvi_dev = (struct mvs_device *)dev->lldd_dev;1312 struct mvs_info *mvi = mvi_dev->mvi_info;1313 1314 rc = mvs_find_tag(mvi, task, &tag);1315 if (rc == 0) {1316 rc = TMF_RESP_FUNC_FAILED;1317 return rc;1318 }1319 1320 rc = sas_query_task(task, tag);1321 switch (rc) {1322 /* The task is still in Lun, release it then */1323 case TMF_RESP_FUNC_SUCC:1324 /* The task is not in Lun or failed, reset the phy */1325 case TMF_RESP_FUNC_FAILED:1326 case TMF_RESP_FUNC_COMPLETE:1327 break;1328 }1329 }1330 mv_printk("%s:rc= %d\n", __func__, rc);1331 return rc;1332}1333 1334/* mandatory SAM-3, still need free task/slot info */1335int mvs_abort_task(struct sas_task *task)1336{1337 struct domain_device *dev = task->dev;1338 struct mvs_device *mvi_dev = (struct mvs_device *)dev->lldd_dev;1339 struct mvs_info *mvi;1340 int rc = TMF_RESP_FUNC_FAILED;1341 unsigned long flags;1342 u32 tag;1343 1344 if (!mvi_dev) {1345 mv_printk("Device has removed\n");1346 return TMF_RESP_FUNC_FAILED;1347 }1348 1349 mvi = mvi_dev->mvi_info;1350 1351 spin_lock_irqsave(&task->task_state_lock, flags);1352 if (task->task_state_flags & SAS_TASK_STATE_DONE) {1353 spin_unlock_irqrestore(&task->task_state_lock, flags);1354 rc = TMF_RESP_FUNC_COMPLETE;1355 goto out;1356 }1357 spin_unlock_irqrestore(&task->task_state_lock, flags);1358 mvi_dev->dev_status = MVS_DEV_EH;1359 if (task->lldd_task && task->task_proto & SAS_PROTOCOL_SSP) {1360 rc = mvs_find_tag(mvi, task, &tag);1361 if (rc == 0) {1362 mv_printk("No such tag in %s\n", __func__);1363 rc = TMF_RESP_FUNC_FAILED;1364 return rc;1365 }1366 1367 rc = sas_abort_task(task, tag);1368 1369 /* if successful, clear the task and callback forwards.*/1370 if (rc == TMF_RESP_FUNC_COMPLETE) {1371 u32 slot_no;1372 struct mvs_slot_info *slot;1373 1374 if (task->lldd_task) {1375 slot = task->lldd_task;1376 slot_no = (u32) (slot - mvi->slot_info);1377 spin_lock_irqsave(&mvi->lock, flags);1378 mvs_slot_complete(mvi, slot_no, 1);1379 spin_unlock_irqrestore(&mvi->lock, flags);1380 }1381 }1382 1383 } else if (task->task_proto & SAS_PROTOCOL_SATA ||1384 task->task_proto & SAS_PROTOCOL_STP) {1385 if (SAS_SATA_DEV == dev->dev_type) {1386 struct mvs_slot_info *slot = task->lldd_task;1387 u32 slot_idx = (u32)(slot - mvi->slot_info);1388 mv_dprintk("mvs_abort_task() mvi=%p task=%p "1389 "slot=%p slot_idx=x%x\n",1390 mvi, task, slot, slot_idx);1391 task->task_state_flags |= SAS_TASK_STATE_ABORTED;1392 mvs_slot_task_free(mvi, task, slot, slot_idx);1393 rc = TMF_RESP_FUNC_COMPLETE;1394 goto out;1395 }1396 1397 }1398out:1399 if (rc != TMF_RESP_FUNC_COMPLETE)1400 mv_printk("%s:rc= %d\n", __func__, rc);1401 return rc;1402}1403 1404static int mvs_sata_done(struct mvs_info *mvi, struct sas_task *task,1405 u32 slot_idx, int err)1406{1407 struct mvs_device *mvi_dev = task->dev->lldd_dev;1408 struct task_status_struct *tstat = &task->task_status;1409 struct ata_task_resp *resp = (struct ata_task_resp *)tstat->buf;1410 int stat = SAM_STAT_GOOD;1411 1412 1413 resp->frame_len = sizeof(struct dev_to_host_fis);1414 memcpy(&resp->ending_fis[0],1415 SATA_RECEIVED_D2H_FIS(mvi_dev->taskfileset),1416 sizeof(struct dev_to_host_fis));1417 tstat->buf_valid_size = sizeof(*resp);1418 if (unlikely(err)) {1419 if (unlikely(err & CMD_ISS_STPD))1420 stat = SAS_OPEN_REJECT;1421 else1422 stat = SAS_PROTO_RESPONSE;1423 }1424 1425 return stat;1426}1427 1428static void mvs_set_sense(u8 *buffer, int len, int d_sense,1429 int key, int asc, int ascq)1430{1431 memset(buffer, 0, len);1432 1433 if (d_sense) {1434 /* Descriptor format */1435 if (len < 4) {1436 mv_printk("Length %d of sense buffer too small to "1437 "fit sense %x:%x:%x", len, key, asc, ascq);1438 }1439 1440 buffer[0] = 0x72; /* Response Code */1441 if (len > 1)1442 buffer[1] = key; /* Sense Key */1443 if (len > 2)1444 buffer[2] = asc; /* ASC */1445 if (len > 3)1446 buffer[3] = ascq; /* ASCQ */1447 } else {1448 if (len < 14) {1449 mv_printk("Length %d of sense buffer too small to "1450 "fit sense %x:%x:%x", len, key, asc, ascq);1451 }1452 1453 buffer[0] = 0x70; /* Response Code */1454 if (len > 2)1455 buffer[2] = key; /* Sense Key */1456 if (len > 7)1457 buffer[7] = 0x0a; /* Additional Sense Length */1458 if (len > 12)1459 buffer[12] = asc; /* ASC */1460 if (len > 13)1461 buffer[13] = ascq; /* ASCQ */1462 }1463 1464 return;1465}1466 1467static void mvs_fill_ssp_resp_iu(struct ssp_response_iu *iu,1468 u8 key, u8 asc, u8 asc_q)1469{1470 iu->datapres = SAS_DATAPRES_SENSE_DATA;1471 iu->response_data_len = 0;1472 iu->sense_data_len = 17;1473 iu->status = 02;1474 mvs_set_sense(iu->sense_data, 17, 0,1475 key, asc, asc_q);1476}1477 1478static int mvs_slot_err(struct mvs_info *mvi, struct sas_task *task,1479 u32 slot_idx)1480{1481 struct mvs_slot_info *slot = &mvi->slot_info[slot_idx];1482 int stat;1483 u32 err_dw0 = le32_to_cpu(*(u32 *)slot->response);1484 u32 err_dw1 = le32_to_cpu(*((u32 *)slot->response + 1));1485 u32 tfs = 0;1486 enum mvs_port_type type = PORT_TYPE_SAS;1487 1488 if (err_dw0 & CMD_ISS_STPD)1489 MVS_CHIP_DISP->issue_stop(mvi, type, tfs);1490 1491 MVS_CHIP_DISP->command_active(mvi, slot_idx);1492 1493 stat = SAM_STAT_CHECK_CONDITION;1494 switch (task->task_proto) {1495 case SAS_PROTOCOL_SSP:1496 {1497 stat = SAS_ABORTED_TASK;1498 if ((err_dw0 & NO_DEST) || err_dw1 & bit(31)) {1499 struct ssp_response_iu *iu = slot->response +1500 sizeof(struct mvs_err_info);1501 mvs_fill_ssp_resp_iu(iu, NOT_READY, 0x04, 01);1502 sas_ssp_task_response(mvi->dev, task, iu);1503 stat = SAM_STAT_CHECK_CONDITION;1504 }1505 if (err_dw1 & bit(31))1506 mv_printk("reuse same slot, retry command.\n");1507 break;1508 }1509 case SAS_PROTOCOL_SMP:1510 stat = SAM_STAT_CHECK_CONDITION;1511 break;1512 1513 case SAS_PROTOCOL_SATA:1514 case SAS_PROTOCOL_STP:1515 case SAS_PROTOCOL_SATA | SAS_PROTOCOL_STP:1516 {1517 task->ata_task.use_ncq = 0;1518 stat = SAS_PROTO_RESPONSE;1519 mvs_sata_done(mvi, task, slot_idx, err_dw0);1520 }1521 break;1522 default:1523 break;1524 }1525 1526 return stat;1527}1528 1529int mvs_slot_complete(struct mvs_info *mvi, u32 rx_desc, u32 flags)1530{1531 u32 slot_idx = rx_desc & RXQ_SLOT_MASK;1532 struct mvs_slot_info *slot = &mvi->slot_info[slot_idx];1533 struct sas_task *task = slot->task;1534 struct mvs_device *mvi_dev = NULL;1535 struct task_status_struct *tstat;1536 struct domain_device *dev;1537 u32 aborted;1538 1539 void *to;1540 enum exec_status sts;1541 1542 if (unlikely(!task || !task->lldd_task || !task->dev))1543 return -1;1544 1545 tstat = &task->task_status;1546 dev = task->dev;1547 mvi_dev = dev->lldd_dev;1548 1549 spin_lock(&task->task_state_lock);1550 task->task_state_flags &= ~SAS_TASK_STATE_PENDING;1551 task->task_state_flags |= SAS_TASK_STATE_DONE;1552 /* race condition*/1553 aborted = task->task_state_flags & SAS_TASK_STATE_ABORTED;1554 spin_unlock(&task->task_state_lock);1555 1556 memset(tstat, 0, sizeof(*tstat));1557 tstat->resp = SAS_TASK_COMPLETE;1558 1559 if (unlikely(aborted)) {1560 tstat->stat = SAS_ABORTED_TASK;1561 if (mvi_dev && mvi_dev->running_req)1562 mvi_dev->running_req--;1563 if (sas_protocol_ata(task->task_proto))1564 mvs_free_reg_set(mvi, mvi_dev);1565 1566 mvs_slot_task_free(mvi, task, slot, slot_idx);1567 return -1;1568 }1569 1570 /* when no device attaching, go ahead and complete by error handling*/1571 if (unlikely(!mvi_dev || flags)) {1572 if (!mvi_dev)1573 mv_dprintk("port has not device.\n");1574 tstat->stat = SAS_PHY_DOWN;1575 goto out;1576 }1577 1578 /*1579 * error info record present; slot->response is 32 bit aligned but may1580 * not be 64 bit aligned, so check for zero in two 32 bit reads1581 */1582 if (unlikely((rx_desc & RXQ_ERR)1583 && (*((u32 *)slot->response)1584 || *(((u32 *)slot->response) + 1)))) {1585 mv_dprintk("port %d slot %d rx_desc %X has error info"1586 "%016llX.\n", slot->port->sas_port.id, slot_idx,1587 rx_desc, get_unaligned_le64(slot->response));1588 tstat->stat = mvs_slot_err(mvi, task, slot_idx);1589 tstat->resp = SAS_TASK_COMPLETE;1590 goto out;1591 }1592 1593 switch (task->task_proto) {1594 case SAS_PROTOCOL_SSP:1595 /* hw says status == 0, datapres == 0 */1596 if (rx_desc & RXQ_GOOD) {1597 tstat->stat = SAS_SAM_STAT_GOOD;1598 tstat->resp = SAS_TASK_COMPLETE;1599 }1600 /* response frame present */1601 else if (rx_desc & RXQ_RSP) {1602 struct ssp_response_iu *iu = slot->response +1603 sizeof(struct mvs_err_info);1604 sas_ssp_task_response(mvi->dev, task, iu);1605 } else1606 tstat->stat = SAS_SAM_STAT_CHECK_CONDITION;1607 break;1608 1609 case SAS_PROTOCOL_SMP: {1610 struct scatterlist *sg_resp = &task->smp_task.smp_resp;1611 tstat->stat = SAS_SAM_STAT_GOOD;1612 to = kmap_atomic(sg_page(sg_resp));1613 memcpy(to + sg_resp->offset,1614 slot->response + sizeof(struct mvs_err_info),1615 sg_dma_len(sg_resp));1616 kunmap_atomic(to);1617 break;1618 }1619 1620 case SAS_PROTOCOL_SATA:1621 case SAS_PROTOCOL_STP:1622 case SAS_PROTOCOL_SATA | SAS_PROTOCOL_STP: {1623 tstat->stat = mvs_sata_done(mvi, task, slot_idx, 0);1624 break;1625 }1626 1627 default:1628 tstat->stat = SAS_SAM_STAT_CHECK_CONDITION;1629 break;1630 }1631 if (!slot->port->port_attached) {1632 mv_dprintk("port %d has removed.\n", slot->port->sas_port.id);1633 tstat->stat = SAS_PHY_DOWN;1634 }1635 1636 1637out:1638 if (mvi_dev && mvi_dev->running_req) {1639 mvi_dev->running_req--;1640 if (sas_protocol_ata(task->task_proto) && !mvi_dev->running_req)1641 mvs_free_reg_set(mvi, mvi_dev);1642 }1643 mvs_slot_task_free(mvi, task, slot, slot_idx);1644 sts = tstat->stat;1645 1646 spin_unlock(&mvi->lock);1647 if (task->task_done)1648 task->task_done(task);1649 1650 spin_lock(&mvi->lock);1651 1652 return sts;1653}1654 1655void mvs_do_release_task(struct mvs_info *mvi,1656 int phy_no, struct domain_device *dev)1657{1658 u32 slot_idx;1659 struct mvs_phy *phy;1660 struct mvs_port *port;1661 struct mvs_slot_info *slot, *slot2;1662 1663 phy = &mvi->phy[phy_no];1664 port = phy->port;1665 if (!port)1666 return;1667 /* clean cmpl queue in case request is already finished */1668 mvs_int_rx(mvi, false);1669 1670 1671 1672 list_for_each_entry_safe(slot, slot2, &port->list, entry) {1673 struct sas_task *task;1674 slot_idx = (u32) (slot - mvi->slot_info);1675 task = slot->task;1676 1677 if (dev && task->dev != dev)1678 continue;1679 1680 mv_printk("Release slot [%x] tag[%x], task [%p]:\n",1681 slot_idx, slot->slot_tag, task);1682 MVS_CHIP_DISP->command_active(mvi, slot_idx);1683 1684 mvs_slot_complete(mvi, slot_idx, 1);1685 }1686}1687 1688void mvs_release_task(struct mvs_info *mvi,1689 struct domain_device *dev)1690{1691 int i, phyno[WIDE_PORT_MAX_PHY], num;1692 num = mvs_find_dev_phyno(dev, phyno);1693 for (i = 0; i < num; i++)1694 mvs_do_release_task(mvi, phyno[i], dev);1695}1696 1697static void mvs_phy_disconnected(struct mvs_phy *phy)1698{1699 phy->phy_attached = 0;1700 phy->att_dev_info = 0;1701 phy->att_dev_sas_addr = 0;1702}1703 1704static void mvs_work_queue(struct work_struct *work)1705{1706 struct delayed_work *dw = container_of(work, struct delayed_work, work);1707 struct mvs_wq *mwq = container_of(dw, struct mvs_wq, work_q);1708 struct mvs_info *mvi = mwq->mvi;1709 unsigned long flags;1710 u32 phy_no = (unsigned long) mwq->data;1711 struct mvs_phy *phy = &mvi->phy[phy_no];1712 struct asd_sas_phy *sas_phy = &phy->sas_phy;1713 1714 spin_lock_irqsave(&mvi->lock, flags);1715 if (mwq->handler & PHY_PLUG_EVENT) {1716 1717 if (phy->phy_event & PHY_PLUG_OUT) {1718 u32 tmp;1719 1720 tmp = MVS_CHIP_DISP->read_phy_ctl(mvi, phy_no);1721 phy->phy_event &= ~PHY_PLUG_OUT;1722 if (!(tmp & PHY_READY_MASK)) {1723 sas_phy_disconnected(sas_phy);1724 mvs_phy_disconnected(phy);1725 sas_notify_phy_event(sas_phy,1726 PHYE_LOSS_OF_SIGNAL, GFP_ATOMIC);1727 mv_dprintk("phy%d Removed Device\n", phy_no);1728 } else {1729 MVS_CHIP_DISP->detect_porttype(mvi, phy_no);1730 mvs_update_phyinfo(mvi, phy_no, 1);1731 mvs_bytes_dmaed(mvi, phy_no, GFP_ATOMIC);1732 mvs_port_notify_formed(sas_phy, 0);1733 mv_dprintk("phy%d Attached Device\n", phy_no);1734 }1735 }1736 } else if (mwq->handler & EXP_BRCT_CHG) {1737 phy->phy_event &= ~EXP_BRCT_CHG;1738 sas_notify_port_event(sas_phy,1739 PORTE_BROADCAST_RCVD, GFP_ATOMIC);1740 mv_dprintk("phy%d Got Broadcast Change\n", phy_no);1741 }1742 list_del(&mwq->entry);1743 spin_unlock_irqrestore(&mvi->lock, flags);1744 kfree(mwq);1745}1746 1747static int mvs_handle_event(struct mvs_info *mvi, void *data, int handler)1748{1749 struct mvs_wq *mwq;1750 int ret = 0;1751 1752 mwq = kmalloc(sizeof(struct mvs_wq), GFP_ATOMIC);1753 if (mwq) {1754 mwq->mvi = mvi;1755 mwq->data = data;1756 mwq->handler = handler;1757 MV_INIT_DELAYED_WORK(&mwq->work_q, mvs_work_queue, mwq);1758 list_add_tail(&mwq->entry, &mvi->wq_list);1759 schedule_delayed_work(&mwq->work_q, HZ * 2);1760 } else1761 ret = -ENOMEM;1762 1763 return ret;1764}1765 1766static void mvs_sig_time_out(struct timer_list *t)1767{1768 struct mvs_phy *phy = from_timer(phy, t, timer);1769 struct mvs_info *mvi = phy->mvi;1770 u8 phy_no;1771 1772 for (phy_no = 0; phy_no < mvi->chip->n_phy; phy_no++) {1773 if (&mvi->phy[phy_no] == phy) {1774 mv_dprintk("Get signature time out, reset phy %d\n",1775 phy_no+mvi->id*mvi->chip->n_phy);1776 MVS_CHIP_DISP->phy_reset(mvi, phy_no, MVS_HARD_RESET);1777 }1778 }1779}1780 1781void mvs_int_port(struct mvs_info *mvi, int phy_no, u32 events)1782{1783 u32 tmp;1784 struct mvs_phy *phy = &mvi->phy[phy_no];1785 1786 phy->irq_status = MVS_CHIP_DISP->read_port_irq_stat(mvi, phy_no);1787 MVS_CHIP_DISP->write_port_irq_stat(mvi, phy_no, phy->irq_status);1788 mv_dprintk("phy %d ctrl sts=0x%08X.\n", phy_no+mvi->id*mvi->chip->n_phy,1789 MVS_CHIP_DISP->read_phy_ctl(mvi, phy_no));1790 mv_dprintk("phy %d irq sts = 0x%08X\n", phy_no+mvi->id*mvi->chip->n_phy,1791 phy->irq_status);1792 1793 /*1794 * events is port event now ,1795 * we need check the interrupt status which belongs to per port.1796 */1797 1798 if (phy->irq_status & PHYEV_DCDR_ERR) {1799 mv_dprintk("phy %d STP decoding error.\n",1800 phy_no + mvi->id*mvi->chip->n_phy);1801 }1802 1803 if (phy->irq_status & PHYEV_POOF) {1804 mdelay(500);1805 if (!(phy->phy_event & PHY_PLUG_OUT)) {1806 int dev_sata = phy->phy_type & PORT_TYPE_SATA;1807 int ready;1808 mvs_do_release_task(mvi, phy_no, NULL);1809 phy->phy_event |= PHY_PLUG_OUT;1810 MVS_CHIP_DISP->clear_srs_irq(mvi, 0, 1);1811 mvs_handle_event(mvi,1812 (void *)(unsigned long)phy_no,1813 PHY_PLUG_EVENT);1814 ready = mvs_is_phy_ready(mvi, phy_no);1815 if (ready || dev_sata) {1816 if (MVS_CHIP_DISP->stp_reset)1817 MVS_CHIP_DISP->stp_reset(mvi,1818 phy_no);1819 else1820 MVS_CHIP_DISP->phy_reset(mvi,1821 phy_no, MVS_SOFT_RESET);1822 return;1823 }1824 }1825 }1826 1827 if (phy->irq_status & PHYEV_COMWAKE) {1828 tmp = MVS_CHIP_DISP->read_port_irq_mask(mvi, phy_no);1829 MVS_CHIP_DISP->write_port_irq_mask(mvi, phy_no,1830 tmp | PHYEV_SIG_FIS);1831 if (phy->timer.function == NULL) {1832 phy->timer.function = mvs_sig_time_out;1833 phy->timer.expires = jiffies + 5*HZ;1834 add_timer(&phy->timer);1835 }1836 }1837 if (phy->irq_status & (PHYEV_SIG_FIS | PHYEV_ID_DONE)) {1838 phy->phy_status = mvs_is_phy_ready(mvi, phy_no);1839 mv_dprintk("notify plug in on phy[%d]\n", phy_no);1840 if (phy->phy_status) {1841 mdelay(10);1842 MVS_CHIP_DISP->detect_porttype(mvi, phy_no);1843 if (phy->phy_type & PORT_TYPE_SATA) {1844 tmp = MVS_CHIP_DISP->read_port_irq_mask(1845 mvi, phy_no);1846 tmp &= ~PHYEV_SIG_FIS;1847 MVS_CHIP_DISP->write_port_irq_mask(mvi,1848 phy_no, tmp);1849 }1850 mvs_update_phyinfo(mvi, phy_no, 0);1851 if (phy->phy_type & PORT_TYPE_SAS) {1852 MVS_CHIP_DISP->phy_reset(mvi, phy_no, MVS_PHY_TUNE);1853 mdelay(10);1854 }1855 1856 mvs_bytes_dmaed(mvi, phy_no, GFP_ATOMIC);1857 /* whether driver is going to handle hot plug */1858 if (phy->phy_event & PHY_PLUG_OUT) {1859 mvs_port_notify_formed(&phy->sas_phy, 0);1860 phy->phy_event &= ~PHY_PLUG_OUT;1861 }1862 } else {1863 mv_dprintk("plugin interrupt but phy%d is gone\n",1864 phy_no + mvi->id*mvi->chip->n_phy);1865 }1866 } else if (phy->irq_status & PHYEV_BROAD_CH) {1867 mv_dprintk("phy %d broadcast change.\n",1868 phy_no + mvi->id*mvi->chip->n_phy);1869 mvs_handle_event(mvi, (void *)(unsigned long)phy_no,1870 EXP_BRCT_CHG);1871 }1872}1873 1874int mvs_int_rx(struct mvs_info *mvi, bool self_clear)1875{1876 u32 rx_prod_idx, rx_desc;1877 bool attn = false;1878 1879 /* the first dword in the RX ring is special: it contains1880 * a mirror of the hardware's RX producer index, so that1881 * we don't have to stall the CPU reading that register.1882 * The actual RX ring is offset by one dword, due to this.1883 */1884 rx_prod_idx = mvi->rx_cons;1885 mvi->rx_cons = le32_to_cpu(mvi->rx[0]);1886 if (mvi->rx_cons == 0xfff) /* h/w hasn't touched RX ring yet */1887 return 0;1888 1889 /* The CMPL_Q may come late, read from register and try again1890 * note: if coalescing is enabled,1891 * it will need to read from register every time for sure1892 */1893 if (unlikely(mvi->rx_cons == rx_prod_idx))1894 mvi->rx_cons = MVS_CHIP_DISP->rx_update(mvi) & RX_RING_SZ_MASK;1895 1896 if (mvi->rx_cons == rx_prod_idx)1897 return 0;1898 1899 while (mvi->rx_cons != rx_prod_idx) {1900 /* increment our internal RX consumer pointer */1901 rx_prod_idx = (rx_prod_idx + 1) & (MVS_RX_RING_SZ - 1);1902 rx_desc = le32_to_cpu(mvi->rx[rx_prod_idx + 1]);1903 1904 if (likely(rx_desc & RXQ_DONE))1905 mvs_slot_complete(mvi, rx_desc, 0);1906 if (rx_desc & RXQ_ATTN) {1907 attn = true;1908 } else if (rx_desc & RXQ_ERR) {1909 if (!(rx_desc & RXQ_DONE))1910 mvs_slot_complete(mvi, rx_desc, 0);1911 } else if (rx_desc & RXQ_SLOT_RESET) {1912 mvs_slot_free(mvi, rx_desc);1913 }1914 }1915 1916 if (attn && self_clear)1917 MVS_CHIP_DISP->int_full(mvi);1918 return 0;1919}1920 1921int mvs_gpio_write(struct sas_ha_struct *sha, u8 reg_type, u8 reg_index,1922 u8 reg_count, u8 *write_data)1923{1924 struct mvs_prv_info *mvs_prv = sha->lldd_ha;1925 struct mvs_info *mvi = mvs_prv->mvi[0];1926 1927 if (MVS_CHIP_DISP->gpio_write) {1928 return MVS_CHIP_DISP->gpio_write(mvs_prv, reg_type,1929 reg_index, reg_count, write_data);1930 }1931 1932 return -ENOSYS;1933}1934