brintos

brintos / linux-shallow public Read only

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1/*2 * PMC-Sierra 8001/8081/8088/8089 SAS/SATA based host adapters driver3 *4 * Copyright (c) 2008-2009 USI Co., Ltd.5 * All rights reserved.6 *7 * Redistribution and use in source and binary forms, with or without8 * modification, are permitted provided that the following conditions9 * are met:10 * 1. Redistributions of source code must retain the above copyright11 *    notice, this list of conditions, and the following disclaimer,12 *    without modification.13 * 2. Redistributions in binary form must reproduce at minimum a disclaimer14 *    substantially similar to the "NO WARRANTY" disclaimer below15 *    ("Disclaimer") and any redistribution must be conditioned upon16 *    including a substantially similar Disclaimer requirement for further17 *    binary redistribution.18 * 3. Neither the names of the above-listed copyright holders nor the names19 *    of any contributors may be used to endorse or promote products derived20 *    from this software without specific prior written permission.21 *22 * Alternatively, this software may be distributed under the terms of the23 * GNU General Public License ("GPL") version 2 as published by the Free24 * Software Foundation.25 *26 * NO WARRANTY27 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS28 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT29 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTIBILITY AND FITNESS FOR30 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT31 * HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY, OR CONSEQUENTIAL32 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS33 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)34 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,35 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING36 * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE37 * POSSIBILITY OF SUCH DAMAGES.38 *39 */40 41#ifndef _PM8001_DEFS_H_42#define _PM8001_DEFS_H_43 44enum chip_flavors {45	chip_8001,46	chip_8008,47	chip_8009,48	chip_8018,49	chip_8019,50	chip_8074,51	chip_8076,52	chip_8077,53	chip_8006,54	chip_8070,55	chip_807256};57 58enum phy_speed {59	PHY_SPEED_15 = 0x01,60	PHY_SPEED_30 = 0x02,61	PHY_SPEED_60 = 0x04,62	PHY_SPEED_120 = 0x08,63};64 65enum data_direction {66	DATA_DIR_NONE = 0x0,	/* NO TRANSFER */67	DATA_DIR_IN = 0x01,	/* INBOUND */68	DATA_DIR_OUT = 0x02,	/* OUTBOUND */69	DATA_DIR_BYRECIPIENT = 0x04, /* UNSPECIFIED */70};71 72enum port_type {73	PORT_TYPE_SAS = (1L << 1),74	PORT_TYPE_SATA = (1L << 0),75};76 77/* driver compile-time configuration */78#define	PM8001_MAX_CCB		 1024	/* max ccbs supported */79#define PM8001_MPI_QUEUE         1024   /* maximum mpi queue entries */80#define	PM8001_MAX_INB_NUM	 6481#define	PM8001_MAX_OUTB_NUM	 6482#define	PM8001_CAN_QUEUE	 508	/* SCSI Queue depth */83 84/* Inbound/Outbound queue size */85#define IOMB_SIZE_SPC		6486#define IOMB_SIZE_SPCV		12887 88/* unchangeable hardware details */89#define	PM8001_MAX_PHYS		 16	/* max. possible phys */90#define	PM8001_MAX_PORTS	 16	/* max. possible ports */91#define	PM8001_MAX_DEVICES	 2048	/* max supported device */92#define	PM8001_MAX_MSIX_VEC	 64	/* max msi-x int for spcv/ve */93#define	PM8001_RESERVE_SLOT	 894 95#define	CONFIG_SCSI_PM8001_MAX_DMA_SG	52896#define PM8001_MAX_DMA_SG	CONFIG_SCSI_PM8001_MAX_DMA_SG97 98enum memory_region_num {99	AAP1 = 0x0, /* application acceleration processor */100	IOP,	    /* IO processor */101	NVMD,	    /* NVM device */102	FW_FLASH,    /* memory for fw flash update */103	FORENSIC_MEM,  /* memory for fw forensic data */104	USI_MAX_MEMCNT_BASE105};106#define	PM8001_EVENT_LOG_SIZE	 (128 * 1024)107 108/**109 * maximum DMA memory regions(number of IBQ + number of IBQ CI110 * + number of  OBQ + number of OBQ PI)111 */112#define USI_MAX_MEMCNT	(USI_MAX_MEMCNT_BASE + ((2 * PM8001_MAX_INB_NUM) \113			+ (2 * PM8001_MAX_OUTB_NUM)))114/*error code*/115enum mpi_err {116	MPI_IO_STATUS_SUCCESS = 0x0,117	MPI_IO_STATUS_BUSY = 0x01,118	MPI_IO_STATUS_FAIL = 0x02,119};120 121/**122 * Phy Control constants123 */124enum phy_control_type {125	PHY_LINK_RESET = 0x01,126	PHY_HARD_RESET = 0x02,127	PHY_NOTIFY_ENABLE_SPINUP = 0x10,128};129 130enum pm8001_hba_info_flags {131	PM8001F_INIT_TIME	= (1U << 0),132	PM8001F_RUN_TIME	= (1U << 1),133};134 135/**136 * Phy Status137 */138#define PHY_LINK_DISABLE	0x00139#define PHY_LINK_DOWN		0x01140#define PHY_STATE_LINK_UP_SPCV	0x2141#define PHY_STATE_LINK_UP_SPC	0x1142 143#endif144