1765 lines · c
1// SPDX-License-Identifier: GPL-2.02// Copyright (c) 2011-2017, The Linux Foundation. All rights reserved.3// Copyright (c) 2018, Linaro Limited4 5#include <linux/irq.h>6#include <linux/kernel.h>7#include <linux/init.h>8#include <linux/slab.h>9#include <linux/interrupt.h>10#include <linux/platform_device.h>11#include <linux/dma-mapping.h>12#include <linux/dmaengine.h>13#include <linux/slimbus.h>14#include <linux/delay.h>15#include <linux/pm_runtime.h>16#include <linux/mutex.h>17#include <linux/notifier.h>18#include <linux/remoteproc/qcom_rproc.h>19#include <linux/of.h>20#include <linux/io.h>21#include <linux/soc/qcom/qmi.h>22#include <linux/soc/qcom/pdr.h>23#include <net/sock.h>24#include "slimbus.h"25 26/* NGD (Non-ported Generic Device) registers */27#define NGD_CFG 0x028#define NGD_CFG_ENABLE BIT(0)29#define NGD_CFG_RX_MSGQ_EN BIT(1)30#define NGD_CFG_TX_MSGQ_EN BIT(2)31#define NGD_STATUS 0x432#define NGD_LADDR BIT(1)33#define NGD_RX_MSGQ_CFG 0x834#define NGD_INT_EN 0x1035#define NGD_INT_RECFG_DONE BIT(24)36#define NGD_INT_TX_NACKED_2 BIT(25)37#define NGD_INT_MSG_BUF_CONTE BIT(26)38#define NGD_INT_MSG_TX_INVAL BIT(27)39#define NGD_INT_IE_VE_CHG BIT(28)40#define NGD_INT_DEV_ERR BIT(29)41#define NGD_INT_RX_MSG_RCVD BIT(30)42#define NGD_INT_TX_MSG_SENT BIT(31)43#define NGD_INT_STAT 0x1444#define NGD_INT_CLR 0x1845#define DEF_NGD_INT_MASK (NGD_INT_TX_NACKED_2 | NGD_INT_MSG_BUF_CONTE | \46 NGD_INT_MSG_TX_INVAL | NGD_INT_IE_VE_CHG | \47 NGD_INT_DEV_ERR | NGD_INT_TX_MSG_SENT | \48 NGD_INT_RX_MSG_RCVD)49 50/* Slimbus QMI service */51#define SLIMBUS_QMI_SVC_ID 0x030152#define SLIMBUS_QMI_SVC_V1 153#define SLIMBUS_QMI_INS_ID 054#define SLIMBUS_QMI_SELECT_INSTANCE_REQ_V01 0x002055#define SLIMBUS_QMI_SELECT_INSTANCE_RESP_V01 0x002056#define SLIMBUS_QMI_POWER_REQ_V01 0x002157#define SLIMBUS_QMI_POWER_RESP_V01 0x002158#define SLIMBUS_QMI_CHECK_FRAMER_STATUS_REQ 0x002259#define SLIMBUS_QMI_CHECK_FRAMER_STATUS_RESP 0x002260#define SLIMBUS_QMI_POWER_REQ_MAX_MSG_LEN 1461#define SLIMBUS_QMI_POWER_RESP_MAX_MSG_LEN 762#define SLIMBUS_QMI_SELECT_INSTANCE_REQ_MAX_MSG_LEN 1463#define SLIMBUS_QMI_SELECT_INSTANCE_RESP_MAX_MSG_LEN 764#define SLIMBUS_QMI_CHECK_FRAMER_STAT_RESP_MAX_MSG_LEN 765/* QMI response timeout of 500ms */66#define SLIMBUS_QMI_RESP_TOUT 100067 68/* User defined commands */69#define SLIM_USR_MC_GENERIC_ACK 0x2570#define SLIM_USR_MC_MASTER_CAPABILITY 0x071#define SLIM_USR_MC_REPORT_SATELLITE 0x172#define SLIM_USR_MC_ADDR_QUERY 0xD73#define SLIM_USR_MC_ADDR_REPLY 0xE74#define SLIM_USR_MC_DEFINE_CHAN 0x2075#define SLIM_USR_MC_DEF_ACT_CHAN 0x2176#define SLIM_USR_MC_CHAN_CTRL 0x2377#define SLIM_USR_MC_RECONFIG_NOW 0x2478#define SLIM_USR_MC_REQ_BW 0x2879#define SLIM_USR_MC_CONNECT_SRC 0x2C80#define SLIM_USR_MC_CONNECT_SINK 0x2D81#define SLIM_USR_MC_DISCONNECT_PORT 0x2E82#define SLIM_USR_MC_REPEAT_CHANGE_VALUE 0x083 84#define SLIM_RX_MSGQ_TIMEOUT_VAL 0x1000085 86#define SLIM_LA_MGR 0xFF87#define SLIM_ROOT_FREQ 2457600088#define LADDR_RETRY 589 90/* Per spec.max 40 bytes per received message */91#define SLIM_MSGQ_BUF_LEN 4092#define QCOM_SLIM_NGD_DESC_NUM 3293 94#define SLIM_MSG_ASM_FIRST_WORD(l, mt, mc, dt, ad) \95 ((l) | ((mt) << 5) | ((mc) << 8) | ((dt) << 15) | ((ad) << 16))96 97#define INIT_MX_RETRIES 1098#define DEF_RETRY_MS 1099#define SAT_MAGIC_LSB 0xD9100#define SAT_MAGIC_MSB 0xC5101#define SAT_MSG_VER 0x1102#define SAT_MSG_PROT 0x1103#define to_ngd(d) container_of(d, struct qcom_slim_ngd, dev)104 105struct ngd_reg_offset_data {106 u32 offset, size;107};108 109static const struct ngd_reg_offset_data ngd_v1_5_offset_info = {110 .offset = 0x1000,111 .size = 0x1000,112};113 114enum qcom_slim_ngd_state {115 QCOM_SLIM_NGD_CTRL_AWAKE,116 QCOM_SLIM_NGD_CTRL_IDLE,117 QCOM_SLIM_NGD_CTRL_ASLEEP,118 QCOM_SLIM_NGD_CTRL_DOWN,119};120 121struct qcom_slim_ngd_qmi {122 struct qmi_handle qmi;123 struct sockaddr_qrtr svc_info;124 struct qmi_handle svc_event_hdl;125 struct qmi_response_type_v01 resp;126 struct qmi_handle *handle;127 struct completion qmi_comp;128};129 130struct qcom_slim_ngd_ctrl;131struct qcom_slim_ngd;132 133struct qcom_slim_ngd_dma_desc {134 struct dma_async_tx_descriptor *desc;135 struct qcom_slim_ngd_ctrl *ctrl;136 struct completion *comp;137 dma_cookie_t cookie;138 dma_addr_t phys;139 void *base;140};141 142struct qcom_slim_ngd {143 struct platform_device *pdev;144 void __iomem *base;145 int id;146};147 148struct qcom_slim_ngd_ctrl {149 struct slim_framer framer;150 struct slim_controller ctrl;151 struct qcom_slim_ngd_qmi qmi;152 struct qcom_slim_ngd *ngd;153 struct device *dev;154 void __iomem *base;155 struct dma_chan *dma_rx_channel;156 struct dma_chan *dma_tx_channel;157 struct qcom_slim_ngd_dma_desc rx_desc[QCOM_SLIM_NGD_DESC_NUM];158 struct qcom_slim_ngd_dma_desc txdesc[QCOM_SLIM_NGD_DESC_NUM];159 struct completion reconf;160 struct work_struct m_work;161 struct work_struct ngd_up_work;162 struct workqueue_struct *mwq;163 struct completion qmi_up;164 spinlock_t tx_buf_lock;165 struct mutex tx_lock;166 struct mutex ssr_lock;167 struct notifier_block nb;168 void *notifier;169 struct pdr_handle *pdr;170 enum qcom_slim_ngd_state state;171 dma_addr_t rx_phys_base;172 dma_addr_t tx_phys_base;173 void *rx_base;174 void *tx_base;175 int tx_tail;176 int tx_head;177 u32 ver;178};179 180enum slimbus_mode_enum_type_v01 {181 /* To force a 32 bit signed enum. Do not change or use*/182 SLIMBUS_MODE_ENUM_TYPE_MIN_ENUM_VAL_V01 = INT_MIN,183 SLIMBUS_MODE_SATELLITE_V01 = 1,184 SLIMBUS_MODE_MASTER_V01 = 2,185 SLIMBUS_MODE_ENUM_TYPE_MAX_ENUM_VAL_V01 = INT_MAX,186};187 188enum slimbus_pm_enum_type_v01 {189 /* To force a 32 bit signed enum. Do not change or use*/190 SLIMBUS_PM_ENUM_TYPE_MIN_ENUM_VAL_V01 = INT_MIN,191 SLIMBUS_PM_INACTIVE_V01 = 1,192 SLIMBUS_PM_ACTIVE_V01 = 2,193 SLIMBUS_PM_ENUM_TYPE_MAX_ENUM_VAL_V01 = INT_MAX,194};195 196enum slimbus_resp_enum_type_v01 {197 SLIMBUS_RESP_ENUM_TYPE_MIN_VAL_V01 = INT_MIN,198 SLIMBUS_RESP_SYNCHRONOUS_V01 = 1,199 SLIMBUS_RESP_ENUM_TYPE_MAX_VAL_V01 = INT_MAX,200};201 202struct slimbus_select_inst_req_msg_v01 {203 uint32_t instance;204 uint8_t mode_valid;205 enum slimbus_mode_enum_type_v01 mode;206};207 208struct slimbus_select_inst_resp_msg_v01 {209 struct qmi_response_type_v01 resp;210};211 212struct slimbus_power_req_msg_v01 {213 enum slimbus_pm_enum_type_v01 pm_req;214 uint8_t resp_type_valid;215 enum slimbus_resp_enum_type_v01 resp_type;216};217 218struct slimbus_power_resp_msg_v01 {219 struct qmi_response_type_v01 resp;220};221 222static const struct qmi_elem_info slimbus_select_inst_req_msg_v01_ei[] = {223 {224 .data_type = QMI_UNSIGNED_4_BYTE,225 .elem_len = 1,226 .elem_size = sizeof(uint32_t),227 .array_type = NO_ARRAY,228 .tlv_type = 0x01,229 .offset = offsetof(struct slimbus_select_inst_req_msg_v01,230 instance),231 .ei_array = NULL,232 },233 {234 .data_type = QMI_OPT_FLAG,235 .elem_len = 1,236 .elem_size = sizeof(uint8_t),237 .array_type = NO_ARRAY,238 .tlv_type = 0x10,239 .offset = offsetof(struct slimbus_select_inst_req_msg_v01,240 mode_valid),241 .ei_array = NULL,242 },243 {244 .data_type = QMI_UNSIGNED_4_BYTE,245 .elem_len = 1,246 .elem_size = sizeof(enum slimbus_mode_enum_type_v01),247 .array_type = NO_ARRAY,248 .tlv_type = 0x10,249 .offset = offsetof(struct slimbus_select_inst_req_msg_v01,250 mode),251 .ei_array = NULL,252 },253 {254 .data_type = QMI_EOTI,255 .elem_len = 0,256 .elem_size = 0,257 .array_type = NO_ARRAY,258 .tlv_type = 0x00,259 .offset = 0,260 .ei_array = NULL,261 },262};263 264static const struct qmi_elem_info slimbus_select_inst_resp_msg_v01_ei[] = {265 {266 .data_type = QMI_STRUCT,267 .elem_len = 1,268 .elem_size = sizeof(struct qmi_response_type_v01),269 .array_type = NO_ARRAY,270 .tlv_type = 0x02,271 .offset = offsetof(struct slimbus_select_inst_resp_msg_v01,272 resp),273 .ei_array = qmi_response_type_v01_ei,274 },275 {276 .data_type = QMI_EOTI,277 .elem_len = 0,278 .elem_size = 0,279 .array_type = NO_ARRAY,280 .tlv_type = 0x00,281 .offset = 0,282 .ei_array = NULL,283 },284};285 286static const struct qmi_elem_info slimbus_power_req_msg_v01_ei[] = {287 {288 .data_type = QMI_UNSIGNED_4_BYTE,289 .elem_len = 1,290 .elem_size = sizeof(enum slimbus_pm_enum_type_v01),291 .array_type = NO_ARRAY,292 .tlv_type = 0x01,293 .offset = offsetof(struct slimbus_power_req_msg_v01,294 pm_req),295 .ei_array = NULL,296 },297 {298 .data_type = QMI_OPT_FLAG,299 .elem_len = 1,300 .elem_size = sizeof(uint8_t),301 .array_type = NO_ARRAY,302 .tlv_type = 0x10,303 .offset = offsetof(struct slimbus_power_req_msg_v01,304 resp_type_valid),305 },306 {307 .data_type = QMI_SIGNED_4_BYTE_ENUM,308 .elem_len = 1,309 .elem_size = sizeof(enum slimbus_resp_enum_type_v01),310 .array_type = NO_ARRAY,311 .tlv_type = 0x10,312 .offset = offsetof(struct slimbus_power_req_msg_v01,313 resp_type),314 },315 {316 .data_type = QMI_EOTI,317 .elem_len = 0,318 .elem_size = 0,319 .array_type = NO_ARRAY,320 .tlv_type = 0x00,321 .offset = 0,322 .ei_array = NULL,323 },324};325 326static const struct qmi_elem_info slimbus_power_resp_msg_v01_ei[] = {327 {328 .data_type = QMI_STRUCT,329 .elem_len = 1,330 .elem_size = sizeof(struct qmi_response_type_v01),331 .array_type = NO_ARRAY,332 .tlv_type = 0x02,333 .offset = offsetof(struct slimbus_power_resp_msg_v01, resp),334 .ei_array = qmi_response_type_v01_ei,335 },336 {337 .data_type = QMI_EOTI,338 .elem_len = 0,339 .elem_size = 0,340 .array_type = NO_ARRAY,341 .tlv_type = 0x00,342 .offset = 0,343 .ei_array = NULL,344 },345};346 347static int qcom_slim_qmi_send_select_inst_req(struct qcom_slim_ngd_ctrl *ctrl,348 struct slimbus_select_inst_req_msg_v01 *req)349{350 struct slimbus_select_inst_resp_msg_v01 resp = { { 0, 0 } };351 struct qmi_txn txn;352 int rc;353 354 rc = qmi_txn_init(ctrl->qmi.handle, &txn,355 slimbus_select_inst_resp_msg_v01_ei, &resp);356 if (rc < 0) {357 dev_err(ctrl->dev, "QMI TXN init fail: %d\n", rc);358 return rc;359 }360 361 rc = qmi_send_request(ctrl->qmi.handle, NULL, &txn,362 SLIMBUS_QMI_SELECT_INSTANCE_REQ_V01,363 SLIMBUS_QMI_SELECT_INSTANCE_REQ_MAX_MSG_LEN,364 slimbus_select_inst_req_msg_v01_ei, req);365 if (rc < 0) {366 dev_err(ctrl->dev, "QMI send req fail %d\n", rc);367 qmi_txn_cancel(&txn);368 return rc;369 }370 371 rc = qmi_txn_wait(&txn, SLIMBUS_QMI_RESP_TOUT);372 if (rc < 0) {373 dev_err(ctrl->dev, "QMI TXN wait fail: %d\n", rc);374 return rc;375 }376 /* Check the response */377 if (resp.resp.result != QMI_RESULT_SUCCESS_V01) {378 dev_err(ctrl->dev, "QMI request failed 0x%x\n",379 resp.resp.result);380 return -EREMOTEIO;381 }382 383 return 0;384}385 386static void qcom_slim_qmi_power_resp_cb(struct qmi_handle *handle,387 struct sockaddr_qrtr *sq,388 struct qmi_txn *txn, const void *data)389{390 struct slimbus_power_resp_msg_v01 *resp;391 392 resp = (struct slimbus_power_resp_msg_v01 *)data;393 if (resp->resp.result != QMI_RESULT_SUCCESS_V01)394 pr_err("QMI power request failed 0x%x\n",395 resp->resp.result);396 397 complete(&txn->completion);398}399 400static int qcom_slim_qmi_send_power_request(struct qcom_slim_ngd_ctrl *ctrl,401 struct slimbus_power_req_msg_v01 *req)402{403 struct slimbus_power_resp_msg_v01 resp = { { 0, 0 } };404 struct qmi_txn txn;405 int rc;406 407 rc = qmi_txn_init(ctrl->qmi.handle, &txn,408 slimbus_power_resp_msg_v01_ei, &resp);409 410 rc = qmi_send_request(ctrl->qmi.handle, NULL, &txn,411 SLIMBUS_QMI_POWER_REQ_V01,412 SLIMBUS_QMI_POWER_REQ_MAX_MSG_LEN,413 slimbus_power_req_msg_v01_ei, req);414 if (rc < 0) {415 dev_err(ctrl->dev, "QMI send req fail %d\n", rc);416 qmi_txn_cancel(&txn);417 return rc;418 }419 420 rc = qmi_txn_wait(&txn, SLIMBUS_QMI_RESP_TOUT);421 if (rc < 0) {422 dev_err(ctrl->dev, "QMI TXN wait fail: %d\n", rc);423 return rc;424 }425 426 /* Check the response */427 if (resp.resp.result != QMI_RESULT_SUCCESS_V01) {428 dev_err(ctrl->dev, "QMI request failed 0x%x\n",429 resp.resp.result);430 return -EREMOTEIO;431 }432 433 return 0;434}435 436static const struct qmi_msg_handler qcom_slim_qmi_msg_handlers[] = {437 {438 .type = QMI_RESPONSE,439 .msg_id = SLIMBUS_QMI_POWER_RESP_V01,440 .ei = slimbus_power_resp_msg_v01_ei,441 .decoded_size = sizeof(struct slimbus_power_resp_msg_v01),442 .fn = qcom_slim_qmi_power_resp_cb,443 },444 {}445};446 447static int qcom_slim_qmi_init(struct qcom_slim_ngd_ctrl *ctrl,448 bool apps_is_master)449{450 struct slimbus_select_inst_req_msg_v01 req;451 struct qmi_handle *handle;452 int rc;453 454 handle = devm_kzalloc(ctrl->dev, sizeof(*handle), GFP_KERNEL);455 if (!handle)456 return -ENOMEM;457 458 rc = qmi_handle_init(handle, SLIMBUS_QMI_POWER_REQ_MAX_MSG_LEN,459 NULL, qcom_slim_qmi_msg_handlers);460 if (rc < 0) {461 dev_err(ctrl->dev, "QMI client init failed: %d\n", rc);462 goto qmi_handle_init_failed;463 }464 465 rc = kernel_connect(handle->sock,466 (struct sockaddr *)&ctrl->qmi.svc_info,467 sizeof(ctrl->qmi.svc_info), 0);468 if (rc < 0) {469 dev_err(ctrl->dev, "Remote Service connect failed: %d\n", rc);470 goto qmi_connect_to_service_failed;471 }472 473 /* Instance is 0 based */474 req.instance = (ctrl->ngd->id >> 1);475 req.mode_valid = 1;476 477 /* Mode indicates the role of the ADSP */478 if (apps_is_master)479 req.mode = SLIMBUS_MODE_SATELLITE_V01;480 else481 req.mode = SLIMBUS_MODE_MASTER_V01;482 483 ctrl->qmi.handle = handle;484 485 rc = qcom_slim_qmi_send_select_inst_req(ctrl, &req);486 if (rc) {487 dev_err(ctrl->dev, "failed to select h/w instance\n");488 goto qmi_select_instance_failed;489 }490 491 return 0;492 493qmi_select_instance_failed:494 ctrl->qmi.handle = NULL;495qmi_connect_to_service_failed:496 qmi_handle_release(handle);497qmi_handle_init_failed:498 devm_kfree(ctrl->dev, handle);499 return rc;500}501 502static void qcom_slim_qmi_exit(struct qcom_slim_ngd_ctrl *ctrl)503{504 if (!ctrl->qmi.handle)505 return;506 507 qmi_handle_release(ctrl->qmi.handle);508 devm_kfree(ctrl->dev, ctrl->qmi.handle);509 ctrl->qmi.handle = NULL;510}511 512static int qcom_slim_qmi_power_request(struct qcom_slim_ngd_ctrl *ctrl,513 bool active)514{515 struct slimbus_power_req_msg_v01 req;516 517 if (active)518 req.pm_req = SLIMBUS_PM_ACTIVE_V01;519 else520 req.pm_req = SLIMBUS_PM_INACTIVE_V01;521 522 req.resp_type_valid = 0;523 524 return qcom_slim_qmi_send_power_request(ctrl, &req);525}526 527static u32 *qcom_slim_ngd_tx_msg_get(struct qcom_slim_ngd_ctrl *ctrl, int len,528 struct completion *comp)529{530 struct qcom_slim_ngd_dma_desc *desc;531 unsigned long flags;532 533 spin_lock_irqsave(&ctrl->tx_buf_lock, flags);534 535 if ((ctrl->tx_tail + 1) % QCOM_SLIM_NGD_DESC_NUM == ctrl->tx_head) {536 spin_unlock_irqrestore(&ctrl->tx_buf_lock, flags);537 return NULL;538 }539 desc = &ctrl->txdesc[ctrl->tx_tail];540 desc->base = ctrl->tx_base + ctrl->tx_tail * SLIM_MSGQ_BUF_LEN;541 desc->comp = comp;542 ctrl->tx_tail = (ctrl->tx_tail + 1) % QCOM_SLIM_NGD_DESC_NUM;543 544 spin_unlock_irqrestore(&ctrl->tx_buf_lock, flags);545 546 return desc->base;547}548 549static void qcom_slim_ngd_tx_msg_dma_cb(void *args)550{551 struct qcom_slim_ngd_dma_desc *desc = args;552 struct qcom_slim_ngd_ctrl *ctrl = desc->ctrl;553 unsigned long flags;554 555 spin_lock_irqsave(&ctrl->tx_buf_lock, flags);556 557 if (desc->comp) {558 complete(desc->comp);559 desc->comp = NULL;560 }561 562 ctrl->tx_head = (ctrl->tx_head + 1) % QCOM_SLIM_NGD_DESC_NUM;563 spin_unlock_irqrestore(&ctrl->tx_buf_lock, flags);564}565 566static int qcom_slim_ngd_tx_msg_post(struct qcom_slim_ngd_ctrl *ctrl,567 void *buf, int len)568{569 struct qcom_slim_ngd_dma_desc *desc;570 unsigned long flags;571 int index, offset;572 573 spin_lock_irqsave(&ctrl->tx_buf_lock, flags);574 offset = buf - ctrl->tx_base;575 index = offset/SLIM_MSGQ_BUF_LEN;576 577 desc = &ctrl->txdesc[index];578 desc->phys = ctrl->tx_phys_base + offset;579 desc->base = ctrl->tx_base + offset;580 desc->ctrl = ctrl;581 len = (len + 3) & 0xfc;582 583 desc->desc = dmaengine_prep_slave_single(ctrl->dma_tx_channel,584 desc->phys, len,585 DMA_MEM_TO_DEV,586 DMA_PREP_INTERRUPT);587 if (!desc->desc) {588 dev_err(ctrl->dev, "unable to prepare channel\n");589 spin_unlock_irqrestore(&ctrl->tx_buf_lock, flags);590 return -EINVAL;591 }592 593 desc->desc->callback = qcom_slim_ngd_tx_msg_dma_cb;594 desc->desc->callback_param = desc;595 desc->desc->cookie = dmaengine_submit(desc->desc);596 dma_async_issue_pending(ctrl->dma_tx_channel);597 spin_unlock_irqrestore(&ctrl->tx_buf_lock, flags);598 599 return 0;600}601 602static void qcom_slim_ngd_rx(struct qcom_slim_ngd_ctrl *ctrl, u8 *buf)603{604 u8 mc, mt, len;605 606 mt = SLIM_HEADER_GET_MT(buf[0]);607 len = SLIM_HEADER_GET_RL(buf[0]);608 mc = SLIM_HEADER_GET_MC(buf[1]);609 610 if (mc == SLIM_USR_MC_MASTER_CAPABILITY &&611 mt == SLIM_MSG_MT_SRC_REFERRED_USER)612 queue_work(ctrl->mwq, &ctrl->m_work);613 614 if (mc == SLIM_MSG_MC_REPLY_INFORMATION ||615 mc == SLIM_MSG_MC_REPLY_VALUE || (mc == SLIM_USR_MC_ADDR_REPLY &&616 mt == SLIM_MSG_MT_SRC_REFERRED_USER) ||617 (mc == SLIM_USR_MC_GENERIC_ACK &&618 mt == SLIM_MSG_MT_SRC_REFERRED_USER)) {619 slim_msg_response(&ctrl->ctrl, &buf[4], buf[3], len - 4);620 pm_runtime_mark_last_busy(ctrl->ctrl.dev);621 }622}623 624static void qcom_slim_ngd_rx_msgq_cb(void *args)625{626 struct qcom_slim_ngd_dma_desc *desc = args;627 struct qcom_slim_ngd_ctrl *ctrl = desc->ctrl;628 629 qcom_slim_ngd_rx(ctrl, (u8 *)desc->base);630 /* Add descriptor back to the queue */631 desc->desc = dmaengine_prep_slave_single(ctrl->dma_rx_channel,632 desc->phys, SLIM_MSGQ_BUF_LEN,633 DMA_DEV_TO_MEM,634 DMA_PREP_INTERRUPT);635 if (!desc->desc) {636 dev_err(ctrl->dev, "Unable to prepare rx channel\n");637 return;638 }639 640 desc->desc->callback = qcom_slim_ngd_rx_msgq_cb;641 desc->desc->callback_param = desc;642 desc->desc->cookie = dmaengine_submit(desc->desc);643 dma_async_issue_pending(ctrl->dma_rx_channel);644}645 646static int qcom_slim_ngd_post_rx_msgq(struct qcom_slim_ngd_ctrl *ctrl)647{648 struct qcom_slim_ngd_dma_desc *desc;649 int i;650 651 for (i = 0; i < QCOM_SLIM_NGD_DESC_NUM; i++) {652 desc = &ctrl->rx_desc[i];653 desc->phys = ctrl->rx_phys_base + i * SLIM_MSGQ_BUF_LEN;654 desc->ctrl = ctrl;655 desc->base = ctrl->rx_base + i * SLIM_MSGQ_BUF_LEN;656 desc->desc = dmaengine_prep_slave_single(ctrl->dma_rx_channel,657 desc->phys, SLIM_MSGQ_BUF_LEN,658 DMA_DEV_TO_MEM,659 DMA_PREP_INTERRUPT);660 if (!desc->desc) {661 dev_err(ctrl->dev, "Unable to prepare rx channel\n");662 return -EINVAL;663 }664 665 desc->desc->callback = qcom_slim_ngd_rx_msgq_cb;666 desc->desc->callback_param = desc;667 desc->desc->cookie = dmaengine_submit(desc->desc);668 }669 dma_async_issue_pending(ctrl->dma_rx_channel);670 671 return 0;672}673 674static int qcom_slim_ngd_init_rx_msgq(struct qcom_slim_ngd_ctrl *ctrl)675{676 struct device *dev = ctrl->dev;677 int ret, size;678 679 ctrl->dma_rx_channel = dma_request_chan(dev, "rx");680 if (IS_ERR(ctrl->dma_rx_channel)) {681 dev_err(dev, "Failed to request RX dma channel");682 ret = PTR_ERR(ctrl->dma_rx_channel);683 ctrl->dma_rx_channel = NULL;684 return ret;685 }686 687 size = QCOM_SLIM_NGD_DESC_NUM * SLIM_MSGQ_BUF_LEN;688 ctrl->rx_base = dma_alloc_coherent(dev, size, &ctrl->rx_phys_base,689 GFP_KERNEL);690 if (!ctrl->rx_base) {691 ret = -ENOMEM;692 goto rel_rx;693 }694 695 ret = qcom_slim_ngd_post_rx_msgq(ctrl);696 if (ret) {697 dev_err(dev, "post_rx_msgq() failed 0x%x\n", ret);698 goto rx_post_err;699 }700 701 return 0;702 703rx_post_err:704 dma_free_coherent(dev, size, ctrl->rx_base, ctrl->rx_phys_base);705rel_rx:706 dma_release_channel(ctrl->dma_rx_channel);707 return ret;708}709 710static int qcom_slim_ngd_init_tx_msgq(struct qcom_slim_ngd_ctrl *ctrl)711{712 struct device *dev = ctrl->dev;713 unsigned long flags;714 int ret = 0;715 int size;716 717 ctrl->dma_tx_channel = dma_request_chan(dev, "tx");718 if (IS_ERR(ctrl->dma_tx_channel)) {719 dev_err(dev, "Failed to request TX dma channel");720 ret = PTR_ERR(ctrl->dma_tx_channel);721 ctrl->dma_tx_channel = NULL;722 return ret;723 }724 725 size = ((QCOM_SLIM_NGD_DESC_NUM + 1) * SLIM_MSGQ_BUF_LEN);726 ctrl->tx_base = dma_alloc_coherent(dev, size, &ctrl->tx_phys_base,727 GFP_KERNEL);728 if (!ctrl->tx_base) {729 ret = -EINVAL;730 goto rel_tx;731 }732 733 spin_lock_irqsave(&ctrl->tx_buf_lock, flags);734 ctrl->tx_tail = 0;735 ctrl->tx_head = 0;736 spin_unlock_irqrestore(&ctrl->tx_buf_lock, flags);737 738 return 0;739rel_tx:740 dma_release_channel(ctrl->dma_tx_channel);741 return ret;742}743 744static int qcom_slim_ngd_init_dma(struct qcom_slim_ngd_ctrl *ctrl)745{746 int ret = 0;747 748 ret = qcom_slim_ngd_init_rx_msgq(ctrl);749 if (ret) {750 dev_err(ctrl->dev, "rx dma init failed\n");751 return ret;752 }753 754 ret = qcom_slim_ngd_init_tx_msgq(ctrl);755 if (ret)756 dev_err(ctrl->dev, "tx dma init failed\n");757 758 return ret;759}760 761static irqreturn_t qcom_slim_ngd_interrupt(int irq, void *d)762{763 struct qcom_slim_ngd_ctrl *ctrl = d;764 void __iomem *base = ctrl->ngd->base;765 u32 stat;766 767 if (pm_runtime_suspended(ctrl->ctrl.dev)) {768 dev_warn_once(ctrl->dev, "Interrupt received while suspended\n");769 return IRQ_NONE;770 }771 772 stat = readl(base + NGD_INT_STAT);773 774 if ((stat & NGD_INT_MSG_BUF_CONTE) ||775 (stat & NGD_INT_MSG_TX_INVAL) || (stat & NGD_INT_DEV_ERR) ||776 (stat & NGD_INT_TX_NACKED_2)) {777 dev_err(ctrl->dev, "Error Interrupt received 0x%x\n", stat);778 }779 780 writel(stat, base + NGD_INT_CLR);781 782 return IRQ_HANDLED;783}784 785static int qcom_slim_ngd_xfer_msg(struct slim_controller *sctrl,786 struct slim_msg_txn *txn)787{788 struct qcom_slim_ngd_ctrl *ctrl = dev_get_drvdata(sctrl->dev);789 DECLARE_COMPLETION_ONSTACK(tx_sent);790 DECLARE_COMPLETION_ONSTACK(done);791 int ret, i;792 unsigned long time_left;793 u8 wbuf[SLIM_MSGQ_BUF_LEN];794 u8 rbuf[SLIM_MSGQ_BUF_LEN];795 u32 *pbuf;796 u8 *puc;797 u8 la = txn->la;798 bool usr_msg = false;799 800 if (txn->mt == SLIM_MSG_MT_CORE &&801 (txn->mc >= SLIM_MSG_MC_BEGIN_RECONFIGURATION &&802 txn->mc <= SLIM_MSG_MC_RECONFIGURE_NOW))803 return 0;804 805 if (txn->dt == SLIM_MSG_DEST_ENUMADDR)806 return -EPROTONOSUPPORT;807 808 if (txn->msg->num_bytes > SLIM_MSGQ_BUF_LEN ||809 txn->rl > SLIM_MSGQ_BUF_LEN) {810 dev_err(ctrl->dev, "msg exceeds HW limit\n");811 return -EINVAL;812 }813 814 pbuf = qcom_slim_ngd_tx_msg_get(ctrl, txn->rl, &tx_sent);815 if (!pbuf) {816 dev_err(ctrl->dev, "Message buffer unavailable\n");817 return -ENOMEM;818 }819 820 if (txn->mt == SLIM_MSG_MT_CORE &&821 (txn->mc == SLIM_MSG_MC_CONNECT_SOURCE ||822 txn->mc == SLIM_MSG_MC_CONNECT_SINK ||823 txn->mc == SLIM_MSG_MC_DISCONNECT_PORT)) {824 txn->mt = SLIM_MSG_MT_DEST_REFERRED_USER;825 switch (txn->mc) {826 case SLIM_MSG_MC_CONNECT_SOURCE:827 txn->mc = SLIM_USR_MC_CONNECT_SRC;828 break;829 case SLIM_MSG_MC_CONNECT_SINK:830 txn->mc = SLIM_USR_MC_CONNECT_SINK;831 break;832 case SLIM_MSG_MC_DISCONNECT_PORT:833 txn->mc = SLIM_USR_MC_DISCONNECT_PORT;834 break;835 default:836 return -EINVAL;837 }838 839 usr_msg = true;840 i = 0;841 wbuf[i++] = txn->la;842 la = SLIM_LA_MGR;843 wbuf[i++] = txn->msg->wbuf[0];844 if (txn->mc != SLIM_USR_MC_DISCONNECT_PORT)845 wbuf[i++] = txn->msg->wbuf[1];846 847 txn->comp = &done;848 ret = slim_alloc_txn_tid(sctrl, txn);849 if (ret) {850 dev_err(ctrl->dev, "Unable to allocate TID\n");851 return ret;852 }853 854 wbuf[i++] = txn->tid;855 856 txn->msg->num_bytes = i;857 txn->msg->wbuf = wbuf;858 txn->msg->rbuf = rbuf;859 txn->rl = txn->msg->num_bytes + 4;860 }861 862 /* HW expects length field to be excluded */863 txn->rl--;864 puc = (u8 *)pbuf;865 *pbuf = 0;866 if (txn->dt == SLIM_MSG_DEST_LOGICALADDR) {867 *pbuf = SLIM_MSG_ASM_FIRST_WORD(txn->rl, txn->mt, txn->mc, 0,868 la);869 puc += 3;870 } else {871 *pbuf = SLIM_MSG_ASM_FIRST_WORD(txn->rl, txn->mt, txn->mc, 1,872 la);873 puc += 2;874 }875 876 if (slim_tid_txn(txn->mt, txn->mc))877 *(puc++) = txn->tid;878 879 if (slim_ec_txn(txn->mt, txn->mc)) {880 *(puc++) = (txn->ec & 0xFF);881 *(puc++) = (txn->ec >> 8) & 0xFF;882 }883 884 if (txn->msg && txn->msg->wbuf)885 memcpy(puc, txn->msg->wbuf, txn->msg->num_bytes);886 887 mutex_lock(&ctrl->tx_lock);888 ret = qcom_slim_ngd_tx_msg_post(ctrl, pbuf, txn->rl);889 if (ret) {890 mutex_unlock(&ctrl->tx_lock);891 return ret;892 }893 894 time_left = wait_for_completion_timeout(&tx_sent, HZ);895 if (!time_left) {896 dev_err(sctrl->dev, "TX timed out:MC:0x%x,mt:0x%x", txn->mc,897 txn->mt);898 mutex_unlock(&ctrl->tx_lock);899 return -ETIMEDOUT;900 }901 902 if (usr_msg) {903 time_left = wait_for_completion_timeout(&done, HZ);904 if (!time_left) {905 dev_err(sctrl->dev, "TX timed out:MC:0x%x,mt:0x%x",906 txn->mc, txn->mt);907 mutex_unlock(&ctrl->tx_lock);908 return -ETIMEDOUT;909 }910 }911 912 mutex_unlock(&ctrl->tx_lock);913 return 0;914}915 916static int qcom_slim_ngd_xfer_msg_sync(struct slim_controller *ctrl,917 struct slim_msg_txn *txn)918{919 DECLARE_COMPLETION_ONSTACK(done);920 int ret;921 unsigned long time_left;922 923 ret = pm_runtime_get_sync(ctrl->dev);924 if (ret < 0)925 goto pm_put;926 927 txn->comp = &done;928 929 ret = qcom_slim_ngd_xfer_msg(ctrl, txn);930 if (ret)931 goto pm_put;932 933 time_left = wait_for_completion_timeout(&done, HZ);934 if (!time_left) {935 dev_err(ctrl->dev, "TX timed out:MC:0x%x,mt:0x%x", txn->mc,936 txn->mt);937 ret = -ETIMEDOUT;938 goto pm_put;939 }940 return 0;941 942pm_put:943 pm_runtime_put(ctrl->dev);944 945 return ret;946}947 948static int qcom_slim_calc_coef(struct slim_stream_runtime *rt, int *exp)949{950 struct slim_controller *ctrl = rt->dev->ctrl;951 int coef;952 953 if (rt->ratem * ctrl->a_framer->superfreq < rt->rate)954 rt->ratem++;955 956 coef = rt->ratem;957 *exp = 0;958 959 /*960 * CRM = Cx(2^E) is the formula we are using.961 * Here C is the coffecient and E is the exponent.962 * CRM is the Channel Rate Multiplier.963 * Coefficeint should be either 1 or 3 and exponenet964 * should be an integer between 0 to 9, inclusive.965 */966 while (1) {967 while ((coef & 0x1) != 0x1) {968 coef >>= 1;969 *exp = *exp + 1;970 }971 972 if (coef <= 3)973 break;974 975 coef++;976 }977 978 /*979 * we rely on the coef value (1 or 3) to set a bit980 * in the slimbus message packet. This bit is981 * BIT(5) which is the segment rate coefficient.982 */983 if (coef == 1) {984 if (*exp > 9)985 return -EIO;986 coef = 0;987 } else {988 if (*exp > 8)989 return -EIO;990 coef = 1;991 }992 993 return coef;994}995 996static int qcom_slim_ngd_enable_stream(struct slim_stream_runtime *rt)997{998 struct slim_device *sdev = rt->dev;999 struct slim_controller *ctrl = sdev->ctrl;1000 struct slim_val_inf msg = {0};1001 u8 wbuf[SLIM_MSGQ_BUF_LEN];1002 u8 rbuf[SLIM_MSGQ_BUF_LEN];1003 struct slim_msg_txn txn = {0,};1004 int i, ret;1005 1006 txn.mt = SLIM_MSG_MT_DEST_REFERRED_USER;1007 txn.dt = SLIM_MSG_DEST_LOGICALADDR;1008 txn.la = SLIM_LA_MGR;1009 txn.ec = 0;1010 txn.msg = &msg;1011 txn.msg->num_bytes = 0;1012 txn.msg->wbuf = wbuf;1013 txn.msg->rbuf = rbuf;1014 1015 for (i = 0; i < rt->num_ports; i++) {1016 struct slim_port *port = &rt->ports[i];1017 1018 if (txn.msg->num_bytes == 0) {1019 int exp = 0, coef = 0;1020 1021 wbuf[txn.msg->num_bytes++] = sdev->laddr;1022 wbuf[txn.msg->num_bytes] = rt->bps >> 2 |1023 (port->ch.aux_fmt << 6);1024 1025 /* calculate coef dynamically */1026 coef = qcom_slim_calc_coef(rt, &exp);1027 if (coef < 0) {1028 dev_err(&sdev->dev,1029 "%s: error calculating coef %d\n", __func__,1030 coef);1031 return -EIO;1032 }1033 1034 if (coef)1035 wbuf[txn.msg->num_bytes] |= BIT(5);1036 1037 txn.msg->num_bytes++;1038 wbuf[txn.msg->num_bytes++] = exp << 4 | rt->prot;1039 1040 if (rt->prot == SLIM_PROTO_ISO)1041 wbuf[txn.msg->num_bytes++] =1042 port->ch.prrate |1043 SLIM_CHANNEL_CONTENT_FL;1044 else1045 wbuf[txn.msg->num_bytes++] = port->ch.prrate;1046 1047 ret = slim_alloc_txn_tid(ctrl, &txn);1048 if (ret) {1049 dev_err(&sdev->dev, "Fail to allocate TID\n");1050 return -ENXIO;1051 }1052 wbuf[txn.msg->num_bytes++] = txn.tid;1053 }1054 wbuf[txn.msg->num_bytes++] = port->ch.id;1055 }1056 1057 txn.mc = SLIM_USR_MC_DEF_ACT_CHAN;1058 txn.rl = txn.msg->num_bytes + 4;1059 ret = qcom_slim_ngd_xfer_msg_sync(ctrl, &txn);1060 if (ret) {1061 slim_free_txn_tid(ctrl, &txn);1062 dev_err(&sdev->dev, "TX timed out:MC:0x%x,mt:0x%x", txn.mc,1063 txn.mt);1064 return ret;1065 }1066 1067 txn.mc = SLIM_USR_MC_RECONFIG_NOW;1068 txn.msg->num_bytes = 2;1069 wbuf[1] = sdev->laddr;1070 txn.rl = txn.msg->num_bytes + 4;1071 1072 ret = slim_alloc_txn_tid(ctrl, &txn);1073 if (ret) {1074 dev_err(ctrl->dev, "Fail to allocate TID\n");1075 return ret;1076 }1077 1078 wbuf[0] = txn.tid;1079 ret = qcom_slim_ngd_xfer_msg_sync(ctrl, &txn);1080 if (ret) {1081 slim_free_txn_tid(ctrl, &txn);1082 dev_err(&sdev->dev, "TX timed out:MC:0x%x,mt:0x%x", txn.mc,1083 txn.mt);1084 }1085 1086 return ret;1087}1088 1089static int qcom_slim_ngd_get_laddr(struct slim_controller *ctrl,1090 struct slim_eaddr *ea, u8 *laddr)1091{1092 struct slim_val_inf msg = {0};1093 u8 failed_ea[6] = {0, 0, 0, 0, 0, 0};1094 struct slim_msg_txn txn;1095 u8 wbuf[10] = {0};1096 u8 rbuf[10] = {0};1097 int ret;1098 1099 txn.mt = SLIM_MSG_MT_DEST_REFERRED_USER;1100 txn.dt = SLIM_MSG_DEST_LOGICALADDR;1101 txn.la = SLIM_LA_MGR;1102 txn.ec = 0;1103 1104 txn.mc = SLIM_USR_MC_ADDR_QUERY;1105 txn.rl = 11;1106 txn.msg = &msg;1107 txn.msg->num_bytes = 7;1108 txn.msg->wbuf = wbuf;1109 txn.msg->rbuf = rbuf;1110 1111 ret = slim_alloc_txn_tid(ctrl, &txn);1112 if (ret < 0)1113 return ret;1114 1115 wbuf[0] = (u8)txn.tid;1116 memcpy(&wbuf[1], ea, sizeof(*ea));1117 1118 ret = qcom_slim_ngd_xfer_msg_sync(ctrl, &txn);1119 if (ret) {1120 slim_free_txn_tid(ctrl, &txn);1121 return ret;1122 }1123 1124 if (!memcmp(rbuf, failed_ea, 6))1125 return -ENXIO;1126 1127 *laddr = rbuf[6];1128 1129 return ret;1130}1131 1132static int qcom_slim_ngd_exit_dma(struct qcom_slim_ngd_ctrl *ctrl)1133{1134 if (ctrl->dma_rx_channel) {1135 dmaengine_terminate_sync(ctrl->dma_rx_channel);1136 dma_release_channel(ctrl->dma_rx_channel);1137 }1138 1139 if (ctrl->dma_tx_channel) {1140 dmaengine_terminate_sync(ctrl->dma_tx_channel);1141 dma_release_channel(ctrl->dma_tx_channel);1142 }1143 1144 ctrl->dma_tx_channel = ctrl->dma_rx_channel = NULL;1145 1146 return 0;1147}1148 1149static void qcom_slim_ngd_setup(struct qcom_slim_ngd_ctrl *ctrl)1150{1151 u32 cfg = readl_relaxed(ctrl->ngd->base);1152 1153 if (ctrl->state == QCOM_SLIM_NGD_CTRL_DOWN ||1154 ctrl->state == QCOM_SLIM_NGD_CTRL_ASLEEP)1155 qcom_slim_ngd_init_dma(ctrl);1156 1157 /* By default enable message queues */1158 cfg |= NGD_CFG_RX_MSGQ_EN;1159 cfg |= NGD_CFG_TX_MSGQ_EN;1160 1161 /* Enable NGD if it's not already enabled*/1162 if (!(cfg & NGD_CFG_ENABLE))1163 cfg |= NGD_CFG_ENABLE;1164 1165 writel_relaxed(cfg, ctrl->ngd->base);1166}1167 1168static int qcom_slim_ngd_power_up(struct qcom_slim_ngd_ctrl *ctrl)1169{1170 enum qcom_slim_ngd_state cur_state = ctrl->state;1171 struct qcom_slim_ngd *ngd = ctrl->ngd;1172 u32 laddr, rx_msgq;1173 int ret = 0;1174 unsigned long time_left;1175 1176 if (ctrl->state == QCOM_SLIM_NGD_CTRL_DOWN) {1177 time_left = wait_for_completion_timeout(&ctrl->qmi.qmi_comp, HZ);1178 if (!time_left)1179 return -EREMOTEIO;1180 }1181 1182 if (ctrl->state == QCOM_SLIM_NGD_CTRL_ASLEEP ||1183 ctrl->state == QCOM_SLIM_NGD_CTRL_DOWN) {1184 ret = qcom_slim_qmi_power_request(ctrl, true);1185 if (ret) {1186 dev_err(ctrl->dev, "SLIM QMI power request failed:%d\n",1187 ret);1188 return ret;1189 }1190 }1191 1192 ctrl->ver = readl_relaxed(ctrl->base);1193 /* Version info in 16 MSbits */1194 ctrl->ver >>= 16;1195 1196 laddr = readl_relaxed(ngd->base + NGD_STATUS);1197 if (laddr & NGD_LADDR) {1198 /*1199 * external MDM restart case where ADSP itself was active framer1200 * For example, modem restarted when playback was active1201 */1202 if (cur_state == QCOM_SLIM_NGD_CTRL_AWAKE) {1203 dev_info(ctrl->dev, "Subsys restart: ADSP active framer\n");1204 return 0;1205 }1206 qcom_slim_ngd_setup(ctrl);1207 return 0;1208 }1209 1210 /*1211 * Reinitialize only when registers are not retained or when enumeration1212 * is lost for ngd.1213 */1214 reinit_completion(&ctrl->reconf);1215 1216 writel_relaxed(DEF_NGD_INT_MASK, ngd->base + NGD_INT_EN);1217 rx_msgq = readl_relaxed(ngd->base + NGD_RX_MSGQ_CFG);1218 1219 writel_relaxed(rx_msgq|SLIM_RX_MSGQ_TIMEOUT_VAL,1220 ngd->base + NGD_RX_MSGQ_CFG);1221 qcom_slim_ngd_setup(ctrl);1222 1223 time_left = wait_for_completion_timeout(&ctrl->reconf, HZ);1224 if (!time_left) {1225 dev_err(ctrl->dev, "capability exchange timed-out\n");1226 return -ETIMEDOUT;1227 }1228 1229 return 0;1230}1231 1232static void qcom_slim_ngd_notify_slaves(struct qcom_slim_ngd_ctrl *ctrl)1233{1234 struct slim_device *sbdev;1235 struct device_node *node;1236 1237 for_each_child_of_node(ctrl->ngd->pdev->dev.of_node, node) {1238 sbdev = of_slim_get_device(&ctrl->ctrl, node);1239 if (!sbdev)1240 continue;1241 1242 if (slim_get_logical_addr(sbdev))1243 dev_err(ctrl->dev, "Failed to get logical address\n");1244 }1245}1246 1247static void qcom_slim_ngd_master_worker(struct work_struct *work)1248{1249 struct qcom_slim_ngd_ctrl *ctrl;1250 struct slim_msg_txn txn;1251 struct slim_val_inf msg = {0};1252 int retries = 0;1253 u8 wbuf[8];1254 int ret = 0;1255 1256 ctrl = container_of(work, struct qcom_slim_ngd_ctrl, m_work);1257 txn.dt = SLIM_MSG_DEST_LOGICALADDR;1258 txn.ec = 0;1259 txn.mc = SLIM_USR_MC_REPORT_SATELLITE;1260 txn.mt = SLIM_MSG_MT_SRC_REFERRED_USER;1261 txn.la = SLIM_LA_MGR;1262 wbuf[0] = SAT_MAGIC_LSB;1263 wbuf[1] = SAT_MAGIC_MSB;1264 wbuf[2] = SAT_MSG_VER;1265 wbuf[3] = SAT_MSG_PROT;1266 txn.msg = &msg;1267 txn.msg->wbuf = wbuf;1268 txn.msg->num_bytes = 4;1269 txn.rl = 8;1270 1271 dev_info(ctrl->dev, "SLIM SAT: Rcvd master capability\n");1272 1273capability_retry:1274 ret = qcom_slim_ngd_xfer_msg(&ctrl->ctrl, &txn);1275 if (!ret) {1276 if (ctrl->state >= QCOM_SLIM_NGD_CTRL_ASLEEP)1277 complete(&ctrl->reconf);1278 else1279 dev_err(ctrl->dev, "unexpected state:%d\n",1280 ctrl->state);1281 1282 if (ctrl->state == QCOM_SLIM_NGD_CTRL_DOWN)1283 qcom_slim_ngd_notify_slaves(ctrl);1284 1285 } else if (ret == -EIO) {1286 dev_err(ctrl->dev, "capability message NACKed, retrying\n");1287 if (retries < INIT_MX_RETRIES) {1288 msleep(DEF_RETRY_MS);1289 retries++;1290 goto capability_retry;1291 }1292 } else {1293 dev_err(ctrl->dev, "SLIM: capability TX failed:%d\n", ret);1294 }1295}1296 1297static int qcom_slim_ngd_update_device_status(struct device *dev, void *null)1298{1299 slim_report_absent(to_slim_device(dev));1300 1301 return 0;1302}1303 1304static int qcom_slim_ngd_runtime_resume(struct device *dev)1305{1306 struct qcom_slim_ngd_ctrl *ctrl = dev_get_drvdata(dev);1307 int ret = 0;1308 1309 if (!ctrl->qmi.handle)1310 return 0;1311 1312 if (ctrl->state >= QCOM_SLIM_NGD_CTRL_ASLEEP)1313 ret = qcom_slim_ngd_power_up(ctrl);1314 if (ret) {1315 /* Did SSR cause this power up failure */1316 if (ctrl->state != QCOM_SLIM_NGD_CTRL_DOWN)1317 ctrl->state = QCOM_SLIM_NGD_CTRL_ASLEEP;1318 else1319 dev_err(ctrl->dev, "HW wakeup attempt during SSR\n");1320 } else {1321 ctrl->state = QCOM_SLIM_NGD_CTRL_AWAKE;1322 }1323 1324 return 0;1325}1326 1327static int qcom_slim_ngd_enable(struct qcom_slim_ngd_ctrl *ctrl, bool enable)1328{1329 if (enable) {1330 int ret = qcom_slim_qmi_init(ctrl, false);1331 1332 if (ret) {1333 dev_err(ctrl->dev, "qmi init fail, ret:%d, state:%d\n",1334 ret, ctrl->state);1335 return ret;1336 }1337 /* controller state should be in sync with framework state */1338 complete(&ctrl->qmi.qmi_comp);1339 if (!pm_runtime_enabled(ctrl->ctrl.dev) ||1340 !pm_runtime_suspended(ctrl->ctrl.dev))1341 qcom_slim_ngd_runtime_resume(ctrl->ctrl.dev);1342 else1343 pm_runtime_resume(ctrl->ctrl.dev);1344 1345 pm_runtime_mark_last_busy(ctrl->ctrl.dev);1346 pm_runtime_put(ctrl->ctrl.dev);1347 1348 ret = slim_register_controller(&ctrl->ctrl);1349 if (ret) {1350 dev_err(ctrl->dev, "error adding slim controller\n");1351 return ret;1352 }1353 1354 dev_info(ctrl->dev, "SLIM controller Registered\n");1355 } else {1356 qcom_slim_qmi_exit(ctrl);1357 slim_unregister_controller(&ctrl->ctrl);1358 }1359 1360 return 0;1361}1362 1363static int qcom_slim_ngd_qmi_new_server(struct qmi_handle *hdl,1364 struct qmi_service *service)1365{1366 struct qcom_slim_ngd_qmi *qmi =1367 container_of(hdl, struct qcom_slim_ngd_qmi, svc_event_hdl);1368 struct qcom_slim_ngd_ctrl *ctrl =1369 container_of(qmi, struct qcom_slim_ngd_ctrl, qmi);1370 1371 qmi->svc_info.sq_family = AF_QIPCRTR;1372 qmi->svc_info.sq_node = service->node;1373 qmi->svc_info.sq_port = service->port;1374 1375 complete(&ctrl->qmi_up);1376 1377 return 0;1378}1379 1380static void qcom_slim_ngd_qmi_del_server(struct qmi_handle *hdl,1381 struct qmi_service *service)1382{1383 struct qcom_slim_ngd_qmi *qmi =1384 container_of(hdl, struct qcom_slim_ngd_qmi, svc_event_hdl);1385 struct qcom_slim_ngd_ctrl *ctrl =1386 container_of(qmi, struct qcom_slim_ngd_ctrl, qmi);1387 1388 reinit_completion(&ctrl->qmi_up);1389 qmi->svc_info.sq_node = 0;1390 qmi->svc_info.sq_port = 0;1391}1392 1393static const struct qmi_ops qcom_slim_ngd_qmi_svc_event_ops = {1394 .new_server = qcom_slim_ngd_qmi_new_server,1395 .del_server = qcom_slim_ngd_qmi_del_server,1396};1397 1398static int qcom_slim_ngd_qmi_svc_event_init(struct qcom_slim_ngd_ctrl *ctrl)1399{1400 struct qcom_slim_ngd_qmi *qmi = &ctrl->qmi;1401 int ret;1402 1403 ret = qmi_handle_init(&qmi->svc_event_hdl, 0,1404 &qcom_slim_ngd_qmi_svc_event_ops, NULL);1405 if (ret < 0) {1406 dev_err(ctrl->dev, "qmi_handle_init failed: %d\n", ret);1407 return ret;1408 }1409 1410 ret = qmi_add_lookup(&qmi->svc_event_hdl, SLIMBUS_QMI_SVC_ID,1411 SLIMBUS_QMI_SVC_V1, SLIMBUS_QMI_INS_ID);1412 if (ret < 0) {1413 dev_err(ctrl->dev, "qmi_add_lookup failed: %d\n", ret);1414 qmi_handle_release(&qmi->svc_event_hdl);1415 }1416 return ret;1417}1418 1419static void qcom_slim_ngd_qmi_svc_event_deinit(struct qcom_slim_ngd_qmi *qmi)1420{1421 qmi_handle_release(&qmi->svc_event_hdl);1422}1423 1424static struct platform_driver qcom_slim_ngd_driver;1425#define QCOM_SLIM_NGD_DRV_NAME "qcom,slim-ngd"1426 1427static const struct of_device_id qcom_slim_ngd_dt_match[] = {1428 {1429 .compatible = "qcom,slim-ngd-v1.5.0",1430 .data = &ngd_v1_5_offset_info,1431 },{1432 .compatible = "qcom,slim-ngd-v2.1.0",1433 .data = &ngd_v1_5_offset_info,1434 },1435 {}1436};1437 1438MODULE_DEVICE_TABLE(of, qcom_slim_ngd_dt_match);1439 1440static void qcom_slim_ngd_down(struct qcom_slim_ngd_ctrl *ctrl)1441{1442 mutex_lock(&ctrl->ssr_lock);1443 device_for_each_child(ctrl->ctrl.dev, NULL,1444 qcom_slim_ngd_update_device_status);1445 qcom_slim_ngd_enable(ctrl, false);1446 mutex_unlock(&ctrl->ssr_lock);1447}1448 1449static void qcom_slim_ngd_up_worker(struct work_struct *work)1450{1451 struct qcom_slim_ngd_ctrl *ctrl;1452 1453 ctrl = container_of(work, struct qcom_slim_ngd_ctrl, ngd_up_work);1454 1455 /* Make sure qmi service is up before continuing */1456 if (!wait_for_completion_interruptible_timeout(&ctrl->qmi_up,1457 msecs_to_jiffies(MSEC_PER_SEC))) {1458 dev_err(ctrl->dev, "QMI wait timeout\n");1459 return;1460 }1461 1462 mutex_lock(&ctrl->ssr_lock);1463 qcom_slim_ngd_enable(ctrl, true);1464 mutex_unlock(&ctrl->ssr_lock);1465}1466 1467static int qcom_slim_ngd_ssr_pdr_notify(struct qcom_slim_ngd_ctrl *ctrl,1468 unsigned long action)1469{1470 switch (action) {1471 case QCOM_SSR_BEFORE_SHUTDOWN:1472 case SERVREG_SERVICE_STATE_DOWN:1473 /* Make sure the last dma xfer is finished */1474 mutex_lock(&ctrl->tx_lock);1475 if (ctrl->state != QCOM_SLIM_NGD_CTRL_DOWN) {1476 pm_runtime_get_noresume(ctrl->ctrl.dev);1477 ctrl->state = QCOM_SLIM_NGD_CTRL_DOWN;1478 qcom_slim_ngd_down(ctrl);1479 qcom_slim_ngd_exit_dma(ctrl);1480 }1481 mutex_unlock(&ctrl->tx_lock);1482 break;1483 case QCOM_SSR_AFTER_POWERUP:1484 case SERVREG_SERVICE_STATE_UP:1485 schedule_work(&ctrl->ngd_up_work);1486 break;1487 default:1488 break;1489 }1490 1491 return NOTIFY_OK;1492}1493 1494static int qcom_slim_ngd_ssr_notify(struct notifier_block *nb,1495 unsigned long action,1496 void *data)1497{1498 struct qcom_slim_ngd_ctrl *ctrl = container_of(nb,1499 struct qcom_slim_ngd_ctrl, nb);1500 1501 return qcom_slim_ngd_ssr_pdr_notify(ctrl, action);1502}1503 1504static void slim_pd_status(int state, char *svc_path, void *priv)1505{1506 struct qcom_slim_ngd_ctrl *ctrl = (struct qcom_slim_ngd_ctrl *)priv;1507 1508 qcom_slim_ngd_ssr_pdr_notify(ctrl, state);1509}1510static int of_qcom_slim_ngd_register(struct device *parent,1511 struct qcom_slim_ngd_ctrl *ctrl)1512{1513 const struct ngd_reg_offset_data *data;1514 struct qcom_slim_ngd *ngd;1515 const struct of_device_id *match;1516 struct device_node *node;1517 u32 id;1518 int ret;1519 1520 match = of_match_node(qcom_slim_ngd_dt_match, parent->of_node);1521 data = match->data;1522 for_each_available_child_of_node(parent->of_node, node) {1523 if (of_property_read_u32(node, "reg", &id))1524 continue;1525 1526 ngd = kzalloc(sizeof(*ngd), GFP_KERNEL);1527 if (!ngd) {1528 of_node_put(node);1529 return -ENOMEM;1530 }1531 1532 ngd->pdev = platform_device_alloc(QCOM_SLIM_NGD_DRV_NAME, id);1533 if (!ngd->pdev) {1534 kfree(ngd);1535 of_node_put(node);1536 return -ENOMEM;1537 }1538 ngd->id = id;1539 ngd->pdev->dev.parent = parent;1540 1541 ret = driver_set_override(&ngd->pdev->dev,1542 &ngd->pdev->driver_override,1543 QCOM_SLIM_NGD_DRV_NAME,1544 strlen(QCOM_SLIM_NGD_DRV_NAME));1545 if (ret) {1546 platform_device_put(ngd->pdev);1547 kfree(ngd);1548 of_node_put(node);1549 return ret;1550 }1551 ngd->pdev->dev.of_node = node;1552 ctrl->ngd = ngd;1553 1554 ret = platform_device_add(ngd->pdev);1555 if (ret) {1556 platform_device_put(ngd->pdev);1557 kfree(ngd);1558 of_node_put(node);1559 return ret;1560 }1561 ngd->base = ctrl->base + ngd->id * data->offset +1562 (ngd->id - 1) * data->size;1563 1564 return 0;1565 }1566 1567 return -ENODEV;1568}1569 1570static int qcom_slim_ngd_probe(struct platform_device *pdev)1571{1572 struct device *dev = &pdev->dev;1573 struct qcom_slim_ngd_ctrl *ctrl = dev_get_drvdata(dev->parent);1574 int ret;1575 1576 ctrl->ctrl.dev = dev;1577 1578 platform_set_drvdata(pdev, ctrl);1579 pm_runtime_use_autosuspend(dev);1580 pm_runtime_set_autosuspend_delay(dev, 100);1581 pm_runtime_set_suspended(dev);1582 pm_runtime_enable(dev);1583 pm_runtime_get_noresume(dev);1584 ret = qcom_slim_ngd_qmi_svc_event_init(ctrl);1585 if (ret) {1586 dev_err(&pdev->dev, "QMI service registration failed:%d", ret);1587 return ret;1588 }1589 1590 INIT_WORK(&ctrl->m_work, qcom_slim_ngd_master_worker);1591 INIT_WORK(&ctrl->ngd_up_work, qcom_slim_ngd_up_worker);1592 ctrl->mwq = create_singlethread_workqueue("ngd_master");1593 if (!ctrl->mwq) {1594 dev_err(&pdev->dev, "Failed to start master worker\n");1595 ret = -ENOMEM;1596 goto wq_err;1597 }1598 1599 return 0;1600wq_err:1601 qcom_slim_ngd_qmi_svc_event_deinit(&ctrl->qmi);1602 if (ctrl->mwq)1603 destroy_workqueue(ctrl->mwq);1604 1605 return ret;1606}1607 1608static int qcom_slim_ngd_ctrl_probe(struct platform_device *pdev)1609{1610 struct device *dev = &pdev->dev;1611 struct qcom_slim_ngd_ctrl *ctrl;1612 int ret;1613 struct pdr_service *pds;1614 1615 ctrl = devm_kzalloc(dev, sizeof(*ctrl), GFP_KERNEL);1616 if (!ctrl)1617 return -ENOMEM;1618 1619 dev_set_drvdata(dev, ctrl);1620 1621 ctrl->base = devm_platform_get_and_ioremap_resource(pdev, 0, NULL);1622 if (IS_ERR(ctrl->base))1623 return PTR_ERR(ctrl->base);1624 1625 ret = platform_get_irq(pdev, 0);1626 if (ret < 0)1627 return ret;1628 1629 ret = devm_request_irq(dev, ret, qcom_slim_ngd_interrupt,1630 IRQF_TRIGGER_HIGH, "slim-ngd", ctrl);1631 if (ret)1632 return dev_err_probe(&pdev->dev, ret, "request IRQ failed\n");1633 1634 ctrl->nb.notifier_call = qcom_slim_ngd_ssr_notify;1635 ctrl->notifier = qcom_register_ssr_notifier("lpass", &ctrl->nb);1636 if (IS_ERR(ctrl->notifier))1637 return PTR_ERR(ctrl->notifier);1638 1639 ctrl->dev = dev;1640 ctrl->framer.rootfreq = SLIM_ROOT_FREQ >> 3;1641 ctrl->framer.superfreq =1642 ctrl->framer.rootfreq / SLIM_CL_PER_SUPERFRAME_DIV8;1643 1644 ctrl->ctrl.a_framer = &ctrl->framer;1645 ctrl->ctrl.clkgear = SLIM_MAX_CLK_GEAR;1646 ctrl->ctrl.get_laddr = qcom_slim_ngd_get_laddr;1647 ctrl->ctrl.enable_stream = qcom_slim_ngd_enable_stream;1648 ctrl->ctrl.xfer_msg = qcom_slim_ngd_xfer_msg;1649 ctrl->ctrl.wakeup = NULL;1650 ctrl->state = QCOM_SLIM_NGD_CTRL_DOWN;1651 1652 mutex_init(&ctrl->tx_lock);1653 mutex_init(&ctrl->ssr_lock);1654 spin_lock_init(&ctrl->tx_buf_lock);1655 init_completion(&ctrl->reconf);1656 init_completion(&ctrl->qmi.qmi_comp);1657 init_completion(&ctrl->qmi_up);1658 1659 ctrl->pdr = pdr_handle_alloc(slim_pd_status, ctrl);1660 if (IS_ERR(ctrl->pdr)) {1661 ret = dev_err_probe(dev, PTR_ERR(ctrl->pdr),1662 "Failed to init PDR handle\n");1663 goto err_pdr_alloc;1664 }1665 1666 pds = pdr_add_lookup(ctrl->pdr, "avs/audio", "msm/adsp/audio_pd");1667 if (IS_ERR(pds) && PTR_ERR(pds) != -EALREADY) {1668 ret = dev_err_probe(dev, PTR_ERR(pds), "pdr add lookup failed\n");1669 goto err_pdr_lookup;1670 }1671 1672 platform_driver_register(&qcom_slim_ngd_driver);1673 return of_qcom_slim_ngd_register(dev, ctrl);1674 1675err_pdr_alloc:1676 qcom_unregister_ssr_notifier(ctrl->notifier, &ctrl->nb);1677 1678err_pdr_lookup:1679 pdr_handle_release(ctrl->pdr);1680 1681 return ret;1682}1683 1684static void qcom_slim_ngd_ctrl_remove(struct platform_device *pdev)1685{1686 platform_driver_unregister(&qcom_slim_ngd_driver);1687}1688 1689static void qcom_slim_ngd_remove(struct platform_device *pdev)1690{1691 struct qcom_slim_ngd_ctrl *ctrl = platform_get_drvdata(pdev);1692 1693 pm_runtime_disable(&pdev->dev);1694 pdr_handle_release(ctrl->pdr);1695 qcom_unregister_ssr_notifier(ctrl->notifier, &ctrl->nb);1696 qcom_slim_ngd_enable(ctrl, false);1697 qcom_slim_ngd_exit_dma(ctrl);1698 qcom_slim_ngd_qmi_svc_event_deinit(&ctrl->qmi);1699 if (ctrl->mwq)1700 destroy_workqueue(ctrl->mwq);1701 1702 kfree(ctrl->ngd);1703 ctrl->ngd = NULL;1704}1705 1706static int __maybe_unused qcom_slim_ngd_runtime_idle(struct device *dev)1707{1708 struct qcom_slim_ngd_ctrl *ctrl = dev_get_drvdata(dev);1709 1710 if (ctrl->state == QCOM_SLIM_NGD_CTRL_AWAKE)1711 ctrl->state = QCOM_SLIM_NGD_CTRL_IDLE;1712 pm_request_autosuspend(dev);1713 return -EAGAIN;1714}1715 1716static int __maybe_unused qcom_slim_ngd_runtime_suspend(struct device *dev)1717{1718 struct qcom_slim_ngd_ctrl *ctrl = dev_get_drvdata(dev);1719 int ret = 0;1720 1721 qcom_slim_ngd_exit_dma(ctrl);1722 if (!ctrl->qmi.handle)1723 return 0;1724 1725 ret = qcom_slim_qmi_power_request(ctrl, false);1726 if (ret && ret != -EBUSY)1727 dev_info(ctrl->dev, "slim resource not idle:%d\n", ret);1728 if (!ret || ret == -ETIMEDOUT)1729 ctrl->state = QCOM_SLIM_NGD_CTRL_ASLEEP;1730 1731 return ret;1732}1733 1734static const struct dev_pm_ops qcom_slim_ngd_dev_pm_ops = {1735 SET_SYSTEM_SLEEP_PM_OPS(pm_runtime_force_suspend,1736 pm_runtime_force_resume)1737 SET_RUNTIME_PM_OPS(1738 qcom_slim_ngd_runtime_suspend,1739 qcom_slim_ngd_runtime_resume,1740 qcom_slim_ngd_runtime_idle1741 )1742};1743 1744static struct platform_driver qcom_slim_ngd_ctrl_driver = {1745 .probe = qcom_slim_ngd_ctrl_probe,1746 .remove_new = qcom_slim_ngd_ctrl_remove,1747 .driver = {1748 .name = "qcom,slim-ngd-ctrl",1749 .of_match_table = qcom_slim_ngd_dt_match,1750 },1751};1752 1753static struct platform_driver qcom_slim_ngd_driver = {1754 .probe = qcom_slim_ngd_probe,1755 .remove_new = qcom_slim_ngd_remove,1756 .driver = {1757 .name = QCOM_SLIM_NGD_DRV_NAME,1758 .pm = &qcom_slim_ngd_dev_pm_ops,1759 },1760};1761 1762module_platform_driver(qcom_slim_ngd_ctrl_driver);1763MODULE_LICENSE("GPL v2");1764MODULE_DESCRIPTION("Qualcomm SLIMBus NGD controller");1765