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1# SPDX-License-Identifier: GPL-2.0-only2#3# QE Communication options4#5 6config QUICC_ENGINE7 bool "QUICC Engine (QE) framework support"8 depends on OF && HAS_IOMEM9 depends on PPC || ARM || ARM64 || COMPILE_TEST10 select GENERIC_ALLOCATOR11 select CRC3212 help13 The QUICC Engine (QE) is a new generation of communications14 coprocessors on Freescale embedded CPUs (akin to CPM in older chips).15 Selecting this option means that you wish to build a kernel16 for a machine with a QE coprocessor.17 18config UCC_SLOW19 bool20 default y if SERIAL_QE || (CPM_QMC && QUICC_ENGINE)21 help22 This option provides qe_lib support to UCC slow23 protocols: UART, BISYNC, QMC24 25config UCC_FAST26 bool27 default y if UCC_GETH || QE_TDM28 help29 This option provides qe_lib support to UCC fast30 protocols: HDLC, Ethernet, ATM, transparent31 32config UCC33 bool34 default y if UCC_FAST || UCC_SLOW || (CPM_TSA && QUICC_ENGINE)35 36config CPM_TSA37 tristate "CPM/QE TSA support"38 depends on OF && HAS_IOMEM39 depends on CPM1 || QUICC_ENGINE || \40 ((CPM || QUICC_ENGINE) && COMPILE_TEST)41 help42 Freescale CPM/QE Time Slot Assigner (TSA)43 controller.44 45 This option enables support for this46 controller47 48config CPM_QMC49 tristate "CPM/QE QMC support"50 depends on OF && HAS_IOMEM51 depends on FSL_SOC52 depends on CPM_TSA53 help54 Freescale CPM/QE QUICC Multichannel Controller55 (QMC)56 57 This option enables support for this58 controller59 60config QE_TDM61 bool62 default y if FSL_UCC_HDLC63 64config QE_USB65 bool66 depends on QUICC_ENGINE67 default y if USB_FSL_QE68 help69 QE USB Controller support70