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1/* SPDX-License-Identifier: GPL-2.0-only */2 3#ifndef __SOC_MEDIATEK_MT8173_MMSYS_H4#define __SOC_MEDIATEK_MT8173_MMSYS_H5 6#define MT8173_DISP_REG_CONFIG_DISP_OVL0_MOUT_EN 0x0407#define MT8173_DISP_REG_CONFIG_DISP_OVL1_MOUT_EN 0x0448#define MT8173_DISP_REG_CONFIG_DISP_OD_MOUT_EN 0x0489#define MT8173_DISP_REG_CONFIG_DISP_GAMMA_MOUT_EN 0x04c10#define MT8173_DISP_REG_CONFIG_DISP_UFOE_MOUT_EN 0x05011#define MT8173_DISP_REG_CONFIG_DISP_COLOR0_SEL_IN 0x08412#define MT8173_DISP_REG_CONFIG_DISP_COLOR1_SEL_IN 0x08813#define MT8173_DISP_REG_CONFIG_DISP_AAL_SEL_IN 0x08c14#define MT8173_DISP_REG_CONFIG_DISP_UFOE_SEL_IN 0x0a015#define MT8173_DISP_REG_CONFIG_DSI0_SEL_IN 0x0a416#define MT8173_DISP_REG_CONFIG_DPI_SEL_IN 0x0ac17#define MT8173_DISP_REG_CONFIG_DISP_RDMA0_SOUT_SEL_IN 0x0b018#define MT8173_DISP_REG_CONFIG_DISP_RDMA1_SOUT_EN 0x0c819#define MT8173_DISP_REG_CONFIG_DISP_COLOR0_SOUT_SEL_IN 0x0bc20 21#define MT8173_AAL_SEL_IN_MERGE BIT(0)22#define MT8173_COLOR0_SEL_IN_OVL0 BIT(0)23#define MT8173_COLOR0_SOUT_MERGE BIT(0)24#define MT8173_DPI0_SEL_IN_MASK GENMASK(1, 0)25#define MT8173_DPI0_SEL_IN_RDMA1 BIT(0)26#define MT8173_DSI0_SEL_IN_UFOE BIT(0)27#define MT8173_GAMMA_MOUT_EN_RDMA1 BIT(0)28#define MT8173_OD0_MOUT_EN_RDMA0 BIT(0)29#define MT8173_OVL0_MOUT_EN_COLOR0 BIT(0)30#define MT8173_OVL1_MOUT_EN_COLOR1 BIT(0)31#define MT8173_UFOE_MOUT_EN_DSI0 BIT(0)32#define MT8173_UFOE_SEL_IN_RDMA0 BIT(0)33#define MT8173_RDMA0_SOUT_COLOR0 BIT(0)34 35static const struct mtk_mmsys_routes mt8173_mmsys_routing_table[] = {36 {37 DDP_COMPONENT_OVL0, DDP_COMPONENT_COLOR0,38 MT8173_DISP_REG_CONFIG_DISP_OVL0_MOUT_EN,39 MT8173_OVL0_MOUT_EN_COLOR0, MT8173_OVL0_MOUT_EN_COLOR040 }, {41 DDP_COMPONENT_OD0, DDP_COMPONENT_RDMA0,42 MT8173_DISP_REG_CONFIG_DISP_OD_MOUT_EN,43 MT8173_OD0_MOUT_EN_RDMA0, MT8173_OD0_MOUT_EN_RDMA044 }, {45 DDP_COMPONENT_UFOE, DDP_COMPONENT_DSI0,46 MT8173_DISP_REG_CONFIG_DISP_UFOE_MOUT_EN,47 MT8173_UFOE_MOUT_EN_DSI0, MT8173_UFOE_MOUT_EN_DSI048 }, {49 DDP_COMPONENT_COLOR0, DDP_COMPONENT_AAL0,50 MT8173_DISP_REG_CONFIG_DISP_COLOR0_SOUT_SEL_IN,51 MT8173_COLOR0_SOUT_MERGE, 0 /* SOUT to AAL */52 }, {53 DDP_COMPONENT_RDMA0, DDP_COMPONENT_UFOE,54 MT8173_DISP_REG_CONFIG_DISP_RDMA0_SOUT_SEL_IN,55 MT8173_RDMA0_SOUT_COLOR0, 0 /* SOUT to UFOE */56 }, {57 DDP_COMPONENT_OVL0, DDP_COMPONENT_COLOR0,58 MT8173_DISP_REG_CONFIG_DISP_COLOR0_SEL_IN,59 MT8173_COLOR0_SEL_IN_OVL0, MT8173_COLOR0_SEL_IN_OVL060 }, {61 DDP_COMPONENT_AAL0, DDP_COMPONENT_COLOR0,62 MT8173_DISP_REG_CONFIG_DISP_AAL_SEL_IN,63 MT8173_AAL_SEL_IN_MERGE, 0 /* SEL_IN from COLOR0 */64 }, {65 DDP_COMPONENT_RDMA0, DDP_COMPONENT_UFOE,66 MT8173_DISP_REG_CONFIG_DISP_UFOE_SEL_IN,67 MT8173_UFOE_SEL_IN_RDMA0, 0 /* SEL_IN from RDMA0 */68 }, {69 DDP_COMPONENT_UFOE, DDP_COMPONENT_DSI0,70 MT8173_DISP_REG_CONFIG_DSI0_SEL_IN,71 MT8173_DSI0_SEL_IN_UFOE, 0, /* SEL_IN from UFOE */72 }, {73 DDP_COMPONENT_OVL1, DDP_COMPONENT_COLOR1,74 MT8173_DISP_REG_CONFIG_DISP_OVL1_MOUT_EN,75 MT8173_OVL1_MOUT_EN_COLOR1, MT8173_OVL1_MOUT_EN_COLOR176 }, {77 DDP_COMPONENT_GAMMA, DDP_COMPONENT_RDMA1,78 MT8173_DISP_REG_CONFIG_DISP_GAMMA_MOUT_EN,79 MT8173_GAMMA_MOUT_EN_RDMA1, MT8173_GAMMA_MOUT_EN_RDMA180 }, {81 DDP_COMPONENT_RDMA1, DDP_COMPONENT_DPI0,82 MT8173_DISP_REG_CONFIG_DISP_RDMA1_SOUT_EN,83 RDMA1_SOUT_MASK, RDMA1_SOUT_DPI084 }, {85 DDP_COMPONENT_OVL1, DDP_COMPONENT_COLOR1,86 MT8173_DISP_REG_CONFIG_DISP_COLOR1_SEL_IN,87 COLOR1_SEL_IN_OVL1, COLOR1_SEL_IN_OVL188 }, {89 DDP_COMPONENT_RDMA1, DDP_COMPONENT_DPI0,90 MT8173_DISP_REG_CONFIG_DPI_SEL_IN,91 MT8173_DPI0_SEL_IN_MASK, MT8173_DPI0_SEL_IN_RDMA192 }93};94 95#endif /* __SOC_MEDIATEK_MT8173_MMSYS_H */96