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1# SPDX-License-Identifier: GPL-2.0-only2#3# QCOM Soc drivers4#5menu "Qualcomm SoC drivers"6 7config QCOM_AOSS_QMP8 tristate "Qualcomm AOSS Driver"9 depends on ARCH_QCOM || COMPILE_TEST10 depends on MAILBOX11 depends on COMMON_CLK && PM12 select PM_GENERIC_DOMAINS13 help14 This driver provides the means of communicating with and controlling15 the low-power state for resources related to the remoteproc16 subsystems as well as controlling the debug clocks exposed by the Always On17 Subsystem (AOSS) using Qualcomm Messaging Protocol (QMP).18 19config QCOM_COMMAND_DB20 tristate "Qualcomm Command DB"21 depends on ARCH_QCOM || COMPILE_TEST22 depends on OF_RESERVED_MEM23 help24 Command DB queries shared memory by key string for shared system25 resources. Platform drivers that require to set state of a shared26 resource on a RPM-hardened platform must use this database to get27 SoC specific identifier and information for the shared resources.28 29config QCOM_GENI_SE30 tristate "QCOM GENI Serial Engine Driver"31 depends on ARCH_QCOM || COMPILE_TEST32 help33 This driver is used to manage Generic Interface (GENI) firmware based34 Qualcomm Technologies, Inc. Universal Peripheral (QUP) Wrapper. This35 driver is also used to manage the common aspects of multiple Serial36 Engines present in the QUP.37 38config QCOM_GSBI39 tristate "QCOM General Serial Bus Interface"40 depends on ARCH_QCOM || COMPILE_TEST41 select MFD_SYSCON42 help43 Say y here to enable GSBI support. The GSBI provides control44 functions for connecting the underlying serial UART, SPI, and I2C45 devices to the output pins.46 47config QCOM_LLCC48 tristate "Qualcomm Technologies, Inc. LLCC driver"49 depends on ARCH_QCOM || COMPILE_TEST50 select REGMAP_MMIO51 help52 Qualcomm Technologies, Inc. platform specific53 Last Level Cache Controller(LLCC) driver for platforms such as,54 SDM845. This provides interfaces to clients that use the LLCC.55 Say yes here to enable LLCC slice driver.56 57config QCOM_KRYO_L2_ACCESSORS58 bool59 depends on (ARCH_QCOM || COMPILE_TEST) && ARM6460 61config QCOM_MDT_LOADER62 tristate63 select QCOM_SCM64 65config QCOM_OCMEM66 tristate "Qualcomm On Chip Memory (OCMEM) driver"67 depends on ARCH_QCOM68 select QCOM_SCM69 help70 The On Chip Memory (OCMEM) allocator allows various clients to71 allocate memory from OCMEM based on performance, latency and power72 requirements. This is typically used by the GPU, camera/video, and73 audio components on some Snapdragon SoCs.74 75config QCOM_PD_MAPPER76 tristate "Qualcomm Protection Domain Mapper"77 select QCOM_QMI_HELPERS78 select QCOM_PDR_MSG79 select AUXILIARY_BUS80 depends on NET && QRTR && (ARCH_QCOM || COMPILE_TEST)81 default QCOM_RPROC_COMMON82 help83 The Protection Domain Mapper maps registered services to the domains84 and instances handled by the remote DSPs. This is a kernel-space85 implementation of the service. It is a simpler alternative to the86 userspace daemon.87 88config QCOM_PDR_HELPERS89 tristate90 select QCOM_QMI_HELPERS91 select QCOM_PDR_MSG92 depends on NET93 94config QCOM_PDR_MSG95 tristate96 97config QCOM_PMIC_PDCHARGER_ULOG98 tristate "Qualcomm PMIC PDCharger ULOG driver"99 depends on RPMSG100 depends on EVENT_TRACING101 help102 The Qualcomm PMIC PDCharger ULOG driver provides access to logs of103 the ADSP firmware PDCharger module in charge of Battery and Power104 Delivery on modern systems.105 106 Say yes here to support PDCharger ULOG event tracing on modern107 Qualcomm platforms.108 109config QCOM_PMIC_GLINK110 tristate "Qualcomm PMIC GLINK driver"111 depends on RPMSG112 depends on TYPEC113 depends on DRM114 depends on NET115 depends on OF116 select AUXILIARY_BUS117 select QCOM_PDR_HELPERS118 select DRM_AUX_HPD_BRIDGE119 help120 The Qualcomm PMIC GLINK driver provides access, over GLINK, to the121 USB and battery firmware running on one of the coprocessors in122 several modern Qualcomm platforms.123 124 Say yes here to support USB-C and battery status on modern Qualcomm125 platforms.126 127config QCOM_QMI_HELPERS128 tristate129 depends on NET130 131config QCOM_RAMP_CTRL132 tristate "Qualcomm Ramp Controller driver"133 depends on ARCH_QCOM || COMPILE_TEST134 help135 The Ramp Controller is used to program the sequence ID for pulse136 swallowing, enable sequence and link sequence IDs for the CPU137 cores on some Qualcomm SoCs.138 Say y here to enable support for the ramp controller.139 140config QCOM_RMTFS_MEM141 tristate "Qualcomm Remote Filesystem memory driver"142 depends on ARCH_QCOM143 select QCOM_SCM144 help145 The Qualcomm remote filesystem memory driver is used for allocating146 and exposing regions of shared memory with remote processors for the147 purpose of exchanging sector-data between the remote filesystem148 service and its clients.149 150 Say y here if you intend to boot the modem remoteproc.151 152config QCOM_RPM_MASTER_STATS153 tristate "Qualcomm RPM Master stats"154 depends on ARCH_QCOM || COMPILE_TEST155 help156 The RPM Master sleep stats driver provides detailed per-subsystem157 sleep/wake data, read from the RPM message RAM. It can be used to158 assess whether all the low-power modes available are entered as159 expected or to check which part of the SoC prevents it from sleeping.160 161 Say y here if you intend to debug or monitor platform sleep.162 163config QCOM_RPMH164 tristate "Qualcomm RPM-Hardened (RPMH) Communication"165 depends on ARCH_QCOM || COMPILE_TEST166 depends on (QCOM_COMMAND_DB || !QCOM_COMMAND_DB)167 help168 Support for communication with the hardened-RPM blocks in169 Qualcomm Technologies Inc (QTI) SoCs. RPMH communication uses an170 internal bus to transmit state requests for shared resources. A set171 of hardware components aggregate requests for these resources and172 help apply the aggregated state on the resource.173 174config QCOM_SMEM175 tristate "Qualcomm Shared Memory Manager (SMEM)"176 depends on ARCH_QCOM || COMPILE_TEST177 depends on HWSPINLOCK178 help179 Say y here to enable support for the Qualcomm Shared Memory Manager.180 The driver provides an interface to items in a heap shared among all181 processors in a Qualcomm platform.182 183config QCOM_SMD_RPM184 tristate "Qualcomm Resource Power Manager (RPM) over SMD"185 depends on ARCH_QCOM || COMPILE_TEST186 depends on RPMSG187 depends on RPMSG_QCOM_SMD || RPMSG_QCOM_SMD=n188 help189 If you say yes to this option, support will be included for the190 Resource Power Manager system found in the Qualcomm 8974 based191 devices.192 193 This is required to access many regulators, clocks and bus194 frequencies controlled by the RPM on these devices.195 196 Say M here if you want to include support for the Qualcomm RPM as a197 module. This will build a module called "qcom-smd-rpm".198 199config QCOM_SMEM_STATE200 bool201 202config QCOM_SMP2P203 tristate "Qualcomm Shared Memory Point to Point support"204 depends on MAILBOX205 depends on QCOM_SMEM206 select QCOM_SMEM_STATE207 select IRQ_DOMAIN208 help209 Say yes here to support the Qualcomm Shared Memory Point to Point210 protocol.211 212config QCOM_SMSM213 tristate "Qualcomm Shared Memory State Machine"214 depends on MAILBOX215 depends on QCOM_SMEM216 select QCOM_SMEM_STATE217 select IRQ_DOMAIN218 help219 Say yes here to support the Qualcomm Shared Memory State Machine.220 The state machine is represented by bits in shared memory.221 222config QCOM_SOCINFO223 tristate "Qualcomm socinfo driver"224 depends on QCOM_SMEM225 select SOC_BUS226 help227 Say yes here to support the Qualcomm socinfo driver, providing228 information about the SoC to user space.229 230config QCOM_SPM231 tristate "Qualcomm Subsystem Power Manager (SPM)"232 depends on ARCH_QCOM || COMPILE_TEST233 select QCOM_SCM234 help235 Enable the support for the Qualcomm Subsystem Power Manager, used236 to manage cores, L2 low power modes and to configure the internal237 Adaptive Voltage Scaler parameters, where supported.238 239config QCOM_STATS240 tristate "Qualcomm Technologies, Inc. (QTI) Sleep stats driver"241 depends on (ARCH_QCOM && DEBUG_FS) || COMPILE_TEST242 depends on QCOM_SMEM243 depends on QCOM_AOSS_QMP || QCOM_AOSS_QMP=n244 help245 Qualcomm Technologies, Inc. (QTI) Sleep stats driver to read246 the shared memory exported by the remote processor related to247 various SoC level low power modes statistics and export to debugfs248 interface.249 250config QCOM_WCNSS_CTRL251 tristate "Qualcomm WCNSS control driver"252 depends on ARCH_QCOM || COMPILE_TEST253 depends on RPMSG254 help255 Client driver for the WCNSS_CTRL SMD channel, used to download nv256 firmware to a newly booted WCNSS chip.257 258config QCOM_APR259 tristate "Qualcomm APR/GPR Bus (Asynchronous/Generic Packet Router)"260 depends on ARCH_QCOM || COMPILE_TEST261 depends on RPMSG262 depends on NET263 select QCOM_PDR_HELPERS264 help265 Enable APR IPC protocol support between266 application processor and QDSP6. APR is267 used by audio driver to configure QDSP6268 ASM, ADM and AFE modules.269 270config QCOM_ICC_BWMON271 tristate "QCOM Interconnect Bandwidth Monitor driver"272 depends on ARCH_QCOM || COMPILE_TEST273 select PM_OPP274 select REGMAP_MMIO275 help276 Sets up driver monitoring bandwidth on various interconnects and277 based on that voting for interconnect bandwidth, adjusting their278 speed to current demand.279 Current implementation brings support for BWMON v4, used for example280 on SDM845 to measure bandwidth between CPU (gladiator_noc) and Last281 Level Cache (memnoc). Usage of this BWMON allows to remove some of282 the fixed bandwidth votes from cpufreq (CPU nodes) thus achieve high283 memory throughput even with lower CPU frequencies.284 285config QCOM_INLINE_CRYPTO_ENGINE286 tristate287 select QCOM_SCM288 289config QCOM_PBS290 tristate "PBS trigger support for Qualcomm Technologies, Inc. PMICS"291 depends on SPMI292 help293 This driver supports configuring software programmable boot sequencer (PBS)294 trigger event through PBS RAM on Qualcomm Technologies, Inc. PMICs.295 This module provides the APIs to the client drivers that wants to send the296 PBS trigger event to the PBS RAM.297 298endmenu299