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1Xilinx AXI-Stream FIFO v4.1 IP core2 3This IP core has read and write AXI-Stream FIFOs, the contents of which can4be accessed from the AXI4 memory-mapped interface. This is useful for5transferring data from a processor into the FPGA fabric. The driver creates6a character device that can be read/written to with standard7open/read/write/close.8 9See Xilinx PG080 document for IP details.10 11Currently supports only store-forward mode with a 32-bit12AXI4-Lite interface. DOES NOT support:13 - cut-through mode14 - AXI4 (non-lite)15 16Required properties:17- compatible: Should be "xlnx,axi-fifo-mm-s-4.1"18- interrupt-names: Should be "interrupt"19- interrupt-parent: Should be <&intc>20- interrupts: Should contain interrupts lines.21- reg: Should contain registers location and length.22- xlnx,axi-str-rxd-protocol: Should be "XIL_AXI_STREAM_ETH_DATA"23- xlnx,axi-str-rxd-tdata-width: Should be <0x20>24- xlnx,axi-str-txc-protocol: Should be "XIL_AXI_STREAM_ETH_CTRL"25- xlnx,axi-str-txc-tdata-width: Should be <0x20>26- xlnx,axi-str-txd-protocol: Should be "XIL_AXI_STREAM_ETH_DATA"27- xlnx,axi-str-txd-tdata-width: Should be <0x20>28- xlnx,axis-tdest-width: AXI-Stream TDEST width (ignored by the driver)29- xlnx,axis-tid-width: AXI-Stream TID width (ignored by the driver)30- xlnx,axis-tuser-width: AXI-Stream TUSER width (ignored by the driver)31- xlnx,data-interface-type: Should be <0x0> (ignored by the driver)32- xlnx,has-axis-tdest: Should be <0x0> (this feature isn't supported)33- xlnx,has-axis-tid: Should be <0x0> (this feature isn't supported)34- xlnx,has-axis-tkeep: Should be <0x0> (this feature isn't supported)35- xlnx,has-axis-tstrb: Should be <0x0> (this feature isn't supported)36- xlnx,has-axis-tuser: Should be <0x0> (this feature isn't supported)37- xlnx,rx-fifo-depth: Depth of RX FIFO in words38- xlnx,rx-fifo-pe-threshold: RX programmable empty interrupt threshold39 (ignored by the driver)40- xlnx,rx-fifo-pf-threshold: RX programmable full interrupt threshold41 (ignored by the driver)42- xlnx,s-axi-id-width: Should be <0x4> (ignored by the driver)43- xlnx,s-axi4-data-width: Should be <0x20> (ignored by the driver)44- xlnx,select-xpm: Should be <0x0> (ignored by the driver)45- xlnx,tx-fifo-depth: Depth of TX FIFO in words46- xlnx,tx-fifo-pe-threshold: TX programmable empty interrupt threshold47 (ignored by the driver)48- xlnx,tx-fifo-pf-threshold: TX programmable full interrupt threshold49 (ignored by the driver)50- xlnx,use-rx-cut-through: Should be <0x0> (this feature isn't supported)51- xlnx,use-rx-data: <0x1> if RX FIFO is enabled, <0x0> otherwise52- xlnx,use-tx-ctrl: Should be <0x0> (this feature isn't supported)53- xlnx,use-tx-cut-through: Should be <0x0> (this feature isn't supported)54- xlnx,use-tx-data: <0x1> if TX FIFO is enabled, <0x0> otherwise55 56Example:57 58axi_fifo_mm_s_0: axi_fifo_mm_s@43c00000 {59 compatible = "xlnx,axi-fifo-mm-s-4.1";60 interrupt-names = "interrupt";61 interrupt-parent = <&intc>;62 interrupts = <0 29 4>;63 reg = <0x43c00000 0x10000>;64 xlnx,axi-str-rxd-protocol = "XIL_AXI_STREAM_ETH_DATA";65 xlnx,axi-str-rxd-tdata-width = <0x20>;66 xlnx,axi-str-txc-protocol = "XIL_AXI_STREAM_ETH_CTRL";67 xlnx,axi-str-txc-tdata-width = <0x20>;68 xlnx,axi-str-txd-protocol = "XIL_AXI_STREAM_ETH_DATA";69 xlnx,axi-str-txd-tdata-width = <0x20>;70 xlnx,axis-tdest-width = <0x4>;71 xlnx,axis-tid-width = <0x4>;72 xlnx,axis-tuser-width = <0x4>;73 xlnx,data-interface-type = <0x0>;74 xlnx,has-axis-tdest = <0x0>;75 xlnx,has-axis-tid = <0x0>;76 xlnx,has-axis-tkeep = <0x0>;77 xlnx,has-axis-tstrb = <0x0>;78 xlnx,has-axis-tuser = <0x0>;79 xlnx,rx-fifo-depth = <0x200>;80 xlnx,rx-fifo-pe-threshold = <0x2>;81 xlnx,rx-fifo-pf-threshold = <0x1fb>;82 xlnx,s-axi-id-width = <0x4>;83 xlnx,s-axi4-data-width = <0x20>;84 xlnx,select-xpm = <0x0>;85 xlnx,tx-fifo-depth = <0x8000>;86 xlnx,tx-fifo-pe-threshold = <0x200>;87 xlnx,tx-fifo-pf-threshold = <0x7ffb>;88 xlnx,use-rx-cut-through = <0x0>;89 xlnx,use-rx-data = <0x0>;90 xlnx,use-tx-ctrl = <0x0>;91 xlnx,use-tx-cut-through = <0x0>;92 xlnx,use-tx-data = <0x1>;93};94