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1/* SPDX-License-Identifier: GPL-2.0+ */2/*3 * Driver for Realtek PCI-Express card reader4 *5 * Copyright(c) 2009-2013 Realtek Semiconductor Corp. All rights reserved.6 *7 * Author:8 * Wei WANG (wei_wang@realsil.com.cn)9 * Micky Ching (micky_ching@realsil.com.cn)10 */11 12#ifndef __REALTEK_RTSX_MS_H13#define __REALTEK_RTSX_MS_H14 15#define MS_DELAY_WRITE16 17#define MS_MAX_RETRY_COUNT 318 19#define MS_EXTRA_SIZE 0x920 21#define WRT_PRTCT 0x0122 23/* Error Code */24#define MS_NO_ERROR 0x0025#define MS_CRC16_ERROR 0x8026#define MS_TO_ERROR 0x4027#define MS_NO_CARD 0x2028#define MS_NO_MEMORY 0x1029#define MS_CMD_NK 0x0830#define MS_FLASH_READ_ERROR 0x0431#define MS_FLASH_WRITE_ERROR 0x0232#define MS_BREQ_ERROR 0x0133#define MS_NOT_FOUND 0x0334 35/* Transfer Protocol Command */36#define READ_PAGE_DATA 0x0237#define READ_REG 0x0438#define GET_INT 0x0739#define WRITE_PAGE_DATA 0x0D40#define WRITE_REG 0x0B41#define SET_RW_REG_ADRS 0x0842#define SET_CMD 0x0E43 44#define PRO_READ_LONG_DATA 0x0245#define PRO_READ_SHORT_DATA 0x0346#define PRO_READ_REG 0x0447#define PRO_READ_QUAD_DATA 0x0548#define PRO_GET_INT 0x0749#define PRO_WRITE_LONG_DATA 0x0D50#define PRO_WRITE_SHORT_DATA 0x0C51#define PRO_WRITE_QUAD_DATA 0x0A52#define PRO_WRITE_REG 0x0B53#define PRO_SET_RW_REG_ADRS 0x0854#define PRO_SET_CMD 0x0E55#define PRO_EX_SET_CMD 0x0956 57#ifdef SUPPORT_MAGIC_GATE58 59#define MG_GET_ID 0x4060#define MG_SET_LID 0x4161#define MG_GET_LEKB 0x4262#define MG_SET_RD 0x4363#define MG_MAKE_RMS 0x4464#define MG_MAKE_KSE 0x4565#define MG_SET_IBD 0x4666#define MG_GET_IBD 0x4767 68#endif69 70#ifdef XC_POWERCLASS71#define XC_CHG_POWER 0x1672#endif73 74#define BLOCK_READ 0xAA75#define BLOCK_WRITE 0x5576#define BLOCK_END 0x3377#define BLOCK_ERASE 0x9978#define FLASH_STOP 0xCC79 80#define SLEEP 0x5A81#define CLEAR_BUF 0xC382#define MS_RESET 0x3C83 84#define PRO_READ_DATA 0x2085#define PRO_WRITE_DATA 0x2186#define PRO_READ_ATRB 0x2487#define PRO_STOP 0x2588#define PRO_ERASE 0x2689#define PRO_READ_2K_DATA 0x2790#define PRO_WRITE_2K_DATA 0x2891 92#define PRO_FORMAT 0x1093#define PRO_SLEEP 0x1194 95#define INT_REG 0x0196#define STATUS_REG0 0x0297#define STATUS_REG1 0x0398 99#define SYSTEM_PARAM 0x10100#define BLOCK_ADRS 0x11101#define CMD_PARM 0x14102#define PAGE_ADRS 0x15103 104#define OVERWRITE_FLAG 0x16105#define MANAGEMEN_FLAG 0x17106#define LOGICAL_ADRS 0x18107#define RESERVE_AREA 0x1A108 109#define PRO_INT_REG 0x01110#define PRO_STATUS_REG 0x02111#define PRO_TYPE_REG 0x04112#define PRO_IF_mode_REG 0x05113#define PRO_CATEGORY_REG 0x06114#define PRO_CLASS_REG 0x07115 116#define PRO_SYSTEM_PARAM 0x10117#define PRO_DATA_COUNT1 0x11118#define PRO_DATA_COUNT0 0x12119#define PRO_DATA_ADDR3 0x13120#define PRO_DATA_ADDR2 0x14121#define PRO_DATA_ADDR1 0x15122#define PRO_DATA_ADDR0 0x16123 124#define PRO_TPC_PARM 0x17125#define PRO_CMD_PARM 0x18126 127#define INT_REG_CED 0x80128#define INT_REG_ERR 0x40129#define INT_REG_BREQ 0x20130#define INT_REG_CMDNK 0x01131 132#define BLOCK_BOOT 0xC0133#define BLOCK_OK 0x80134#define PAGE_OK 0x60135#define DATA_COMPL 0x10136 137#define NOT_BOOT_BLOCK 0x4138#define NOT_TRANSLATION_TABLE 0x8139 140#define HEADER_ID0 PPBUF_BASE2141#define HEADER_ID1 (PPBUF_BASE2 + 1)142#define DISABLED_BLOCK0 (PPBUF_BASE2 + 0x170 + 4)143#define DISABLED_BLOCK1 (PPBUF_BASE2 + 0x170 + 5)144#define DISABLED_BLOCK2 (PPBUF_BASE2 + 0x170 + 6)145#define DISABLED_BLOCK3 (PPBUF_BASE2 + 0x170 + 7)146#define BLOCK_SIZE_0 (PPBUF_BASE2 + 0x1a0 + 2)147#define BLOCK_SIZE_1 (PPBUF_BASE2 + 0x1a0 + 3)148#define BLOCK_COUNT_0 (PPBUF_BASE2 + 0x1a0 + 4)149#define BLOCK_COUNT_1 (PPBUF_BASE2 + 0x1a0 + 5)150#define EBLOCK_COUNT_0 (PPBUF_BASE2 + 0x1a0 + 6)151#define EBLOCK_COUNT_1 (PPBUF_BASE2 + 0x1a0 + 7)152#define PAGE_SIZE_0 (PPBUF_BASE2 + 0x1a0 + 8)153#define PAGE_SIZE_1 (PPBUF_BASE2 + 0x1a0 + 9)154 155#define MS_device_type (PPBUF_BASE2 + 0x1D8)156 157#define MS_4bit_support (PPBUF_BASE2 + 0x1D3)158 159#define set_PS_NG 1160#define set_PS_error 0161 162#define PARALLEL_8BIT_IF 0x40163#define PARALLEL_4BIT_IF 0x00164#define SERIAL_IF 0x80165 166#define BUF_FULL 0x10167#define BUF_EMPTY 0x20168 169#define MEDIA_BUSY 0x80170#define FLASH_BUSY 0x40171#define DATA_ERROR 0x20172#define STS_UCDT 0x10173#define EXTRA_ERROR 0x08174#define STS_UCEX 0x04175#define FLAG_ERROR 0x02176#define STS_UCFG 0x01177 178#define MS_SHORT_DATA_LEN 32179 180#define FORMAT_SUCCESS 0181#define FORMAT_FAIL 1182#define FORMAT_IN_PROGRESS 2183 184#define MS_SET_BAD_BLOCK_FLG(ms_card) ((ms_card)->multi_flag |= 0x80)185#define MS_CLR_BAD_BLOCK_FLG(ms_card) ((ms_card)->multi_flag &= 0x7F)186#define MS_TST_BAD_BLOCK_FLG(ms_card) ((ms_card)->multi_flag & 0x80)187 188void mspro_polling_format_status(struct rtsx_chip *chip);189 190void mspro_stop_seq_mode(struct rtsx_chip *chip);191int reset_ms_card(struct rtsx_chip *chip);192int ms_rw(struct scsi_cmnd *srb, struct rtsx_chip *chip,193 u32 start_sector, u16 sector_cnt);194int mspro_format(struct scsi_cmnd *srb, struct rtsx_chip *chip,195 int short_data_len, bool quick_format);196void ms_free_l2p_tbl(struct rtsx_chip *chip);197void ms_cleanup_work(struct rtsx_chip *chip);198int ms_power_off_card3v3(struct rtsx_chip *chip);199int release_ms_card(struct rtsx_chip *chip);200#ifdef MS_DELAY_WRITE201int ms_delay_write(struct rtsx_chip *chip);202#endif203 204#ifdef SUPPORT_MAGIC_GATE205int mg_set_leaf_id(struct scsi_cmnd *srb, struct rtsx_chip *chip);206int mg_get_local_EKB(struct scsi_cmnd *srb, struct rtsx_chip *chip);207int mg_chg(struct scsi_cmnd *srb, struct rtsx_chip *chip);208int mg_get_rsp_chg(struct scsi_cmnd *srb, struct rtsx_chip *chip);209int mg_rsp(struct scsi_cmnd *srb, struct rtsx_chip *chip);210int mg_get_ICV(struct scsi_cmnd *srb, struct rtsx_chip *chip);211int mg_set_ICV(struct scsi_cmnd *srb, struct rtsx_chip *chip);212#endif213 214#endif /* __REALTEK_RTSX_MS_H */215