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1/* SPDX-License-Identifier: GPL-2.0+ */2/*3 * Copyright (c) 1996, 2003 VIA Networking Technologies, Inc.4 * All rights reserved.5 *6 * Purpose: MAC routines7 *8 * Author: Tevin Chen9 *10 * Date: May 21, 199611 *12 * Revision History:13 * 07-01-2003 Bryan YC Fan: Re-write codes to support VT3253 spec.14 * 08-25-2003 Kyle Hsu: Porting MAC functions from sim53.15 * 09-03-2003 Bryan YC Fan: Add vt6655_mac_dis_protect_md & vt6655_mac_en_protect_md16 */17 18#ifndef __MAC_H__19#define __MAC_H__20 21#include "device.h"22 23/*--------------------- Export Definitions -------------------------*/24/* Registers in the MAC */25#define MAC_MAX_CONTEXT_SIZE_PAGE0 25626#define MAC_MAX_CONTEXT_SIZE_PAGE1 12827 28/* Registers not related to 802.11b */29#define MAC_REG_BCFG0 0x0030#define MAC_REG_BCFG1 0x0131#define MAC_REG_FCR0 0x0232#define MAC_REG_FCR1 0x0333#define MAC_REG_BISTCMD 0x0434#define MAC_REG_BISTSR0 0x0535#define MAC_REG_BISTSR1 0x0636#define MAC_REG_BISTSR2 0x0737#define MAC_REG_I2MCSR 0x0838#define MAC_REG_I2MTGID 0x0939#define MAC_REG_I2MTGAD 0x0A40#define MAC_REG_I2MCFG 0x0B41#define MAC_REG_I2MDIPT 0x0C42#define MAC_REG_I2MDOPT 0x0E43#define MAC_REG_PMC0 0x1044#define MAC_REG_PMC1 0x1145#define MAC_REG_STICKHW 0x1246#define MAC_REG_LOCALID 0x1447#define MAC_REG_TESTCFG 0x1548#define MAC_REG_JUMPER0 0x1649#define MAC_REG_JUMPER1 0x1750#define MAC_REG_TMCTL0 0x1851#define MAC_REG_TMCTL1 0x1952#define MAC_REG_TMDATA0 0x1C53 54/* MAC Parameter related */55#define MAC_REG_LRT 0x2056#define MAC_REG_SRT 0x2157#define MAC_REG_SIFS 0x2258#define MAC_REG_DIFS 0x2359#define MAC_REG_EIFS 0x2460#define MAC_REG_SLOT 0x2561#define MAC_REG_BI 0x2662#define MAC_REG_CWMAXMIN0 0x2863#define MAC_REG_LINKOFFTOTM 0x2A64#define MAC_REG_SWTMOT 0x2B65#define MAC_REG_MIBCNTR 0x2C66#define MAC_REG_RTSOKCNT 0x2C67#define MAC_REG_RTSFAILCNT 0x2D68#define MAC_REG_ACKFAILCNT 0x2E69#define MAC_REG_FCSERRCNT 0x2F70 71/* TSF Related */72#define MAC_REG_TSFCNTR 0x3073#define MAC_REG_NEXTTBTT 0x3874#define MAC_REG_TSFOFST 0x4075#define MAC_REG_TFTCTL 0x4876 77/* WMAC Control/Status Related */78#define MAC_REG_ENCFG 0x4C79#define MAC_REG_PAGE1SEL 0x4F80#define MAC_REG_CFG 0x5081#define MAC_REG_TEST 0x5282#define MAC_REG_HOSTCR 0x5483#define MAC_REG_MACCR 0x5584#define MAC_REG_RCR 0x5685#define MAC_REG_TCR 0x5786#define MAC_REG_IMR 0x5887#define MAC_REG_ISR 0x5C88 89/* Power Saving Related */90#define MAC_REG_PSCFG 0x6091#define MAC_REG_PSCTL 0x6192#define MAC_REG_PSPWRSIG 0x6293#define MAC_REG_BBCR13 0x6394#define MAC_REG_AIDATIM 0x6495#define MAC_REG_PWBT 0x6696#define MAC_REG_WAKEOKTMR 0x6897#define MAC_REG_CALTMR 0x6998#define MAC_REG_SYNSPACCNT 0x6A99#define MAC_REG_WAKSYNOPT 0x6B100 101/* Baseband/IF Control Group */102#define MAC_REG_BBREGCTL 0x6C103#define MAC_REG_CHANNEL 0x6D104#define MAC_REG_BBREGADR 0x6E105#define MAC_REG_BBREGDATA 0x6F106#define MAC_REG_IFREGCTL 0x70107#define MAC_REG_IFDATA 0x71108#define MAC_REG_ITRTMSET 0x74109#define MAC_REG_PAPEDELAY 0x77110#define MAC_REG_SOFTPWRCTL 0x78111#define MAC_REG_GPIOCTL0 0x7A112#define MAC_REG_GPIOCTL1 0x7B113 114/* MAC DMA Related Group */115#define MAC_REG_TXDMACTL0 0x7C116#define MAC_REG_TXDMAPTR0 0x80117#define MAC_REG_AC0DMACTL 0x84118#define MAC_REG_AC0DMAPTR 0x88119#define MAC_REG_BCNDMACTL 0x8C120#define MAC_REG_BCNDMAPTR 0x90121#define MAC_REG_RXDMACTL0 0x94122#define MAC_REG_RXDMAPTR0 0x98123#define MAC_REG_RXDMACTL1 0x9C124#define MAC_REG_RXDMAPTR1 0xA0125#define MAC_REG_SYNCDMACTL 0xA4126#define MAC_REG_SYNCDMAPTR 0xA8127#define MAC_REG_ATIMDMACTL 0xAC128#define MAC_REG_ATIMDMAPTR 0xB0129 130/* MiscFF PIO related */131#define MAC_REG_MISCFFNDEX 0xB4132#define MAC_REG_MISCFFCTL 0xB6133#define MAC_REG_MISCFFDATA 0xB8134 135/* Extend SW Timer */136#define MAC_REG_TMDATA1 0xBC137 138/* WOW Related Group */139#define MAC_REG_WAKEUPEN0 0xC0140#define MAC_REG_WAKEUPEN1 0xC1141#define MAC_REG_WAKEUPSR0 0xC2142#define MAC_REG_WAKEUPSR1 0xC3143#define MAC_REG_WAKE128_0 0xC4144#define MAC_REG_WAKE128_1 0xD4145#define MAC_REG_WAKE128_2 0xE4146#define MAC_REG_WAKE128_3 0xF4147 148/************** Page 1 ******************/149#define MAC_REG_CRC_128_0 0x04150#define MAC_REG_CRC_128_1 0x06151#define MAC_REG_CRC_128_2 0x08152#define MAC_REG_CRC_128_3 0x0A153 154/* MAC Configuration Group */155#define MAC_REG_PAR0 0x0C156#define MAC_REG_PAR4 0x10157#define MAC_REG_BSSID0 0x14158#define MAC_REG_BSSID4 0x18159#define MAC_REG_MAR0 0x1C160#define MAC_REG_MAR4 0x20161 162/* MAC RSPPKT INFO Group */163#define MAC_REG_RSPINF_B_1 0x24164#define MAC_REG_RSPINF_B_2 0x28165#define MAC_REG_RSPINF_B_5 0x2C166#define MAC_REG_RSPINF_B_11 0x30167#define MAC_REG_RSPINF_A_6 0x34168#define MAC_REG_RSPINF_A_9 0x36169#define MAC_REG_RSPINF_A_12 0x38170#define MAC_REG_RSPINF_A_18 0x3A171#define MAC_REG_RSPINF_A_24 0x3C172#define MAC_REG_RSPINF_A_36 0x3E173#define MAC_REG_RSPINF_A_48 0x40174#define MAC_REG_RSPINF_A_54 0x42175#define MAC_REG_RSPINF_A_72 0x44176 177/* 802.11h relative */178#define MAC_REG_QUIETINIT 0x60179#define MAC_REG_QUIETGAP 0x62180#define MAC_REG_QUIETDUR 0x64181#define MAC_REG_MSRCTL 0x66182#define MAC_REG_MSRBBSTS 0x67183#define MAC_REG_MSRSTART 0x68184#define MAC_REG_MSRDURATION 0x70185#define MAC_REG_CCAFRACTION 0x72186#define MAC_REG_PWRCCK 0x73187#define MAC_REG_PWROFDM 0x7C188 189/* Bits in the BCFG0 register */190#define BCFG0_PERROFF 0x40191#define BCFG0_MRDMDIS 0x20192#define BCFG0_MRDLDIS 0x10193#define BCFG0_MWMEN 0x08194#define BCFG0_VSERREN 0x02195#define BCFG0_LATMEN 0x01196 197/* Bits in the BCFG1 register */198#define BCFG1_CFUNOPT 0x80199#define BCFG1_CREQOPT 0x40200#define BCFG1_DMA8 0x10201#define BCFG1_ARBITOPT 0x08202#define BCFG1_PCIMEN 0x04203#define BCFG1_MIOEN 0x02204#define BCFG1_CISDLYEN 0x01205 206/* Bits in RAMBIST registers */207#define BISTCMD_TSTPAT5 0x00208#define BISTCMD_TSTPATA 0x80209#define BISTCMD_TSTERR 0x20210#define BISTCMD_TSTPATF 0x18211#define BISTCMD_TSTPAT0 0x10212#define BISTCMD_TSTMODE 0x04213#define BISTCMD_TSTITTX 0x03214#define BISTCMD_TSTATRX 0x02215#define BISTCMD_TSTATTX 0x01216#define BISTCMD_TSTRX 0x00217#define BISTSR0_BISTGO 0x01218#define BISTSR1_TSTSR 0x01219#define BISTSR2_CMDPRTEN 0x02220#define BISTSR2_RAMTSTEN 0x01221 222/* Bits in the I2MCFG EEPROM register */223#define I2MCFG_BOUNDCTL 0x80224#define I2MCFG_WAITCTL 0x20225#define I2MCFG_SCLOECTL 0x10226#define I2MCFG_WBUSYCTL 0x08227#define I2MCFG_NORETRY 0x04228#define I2MCFG_I2MLDSEQ 0x02229#define I2MCFG_I2CMFAST 0x01230 231/* Bits in the I2MCSR EEPROM register */232#define I2MCSR_EEMW 0x80233#define I2MCSR_EEMR 0x40234#define I2MCSR_AUTOLD 0x08235#define I2MCSR_NACK 0x02236#define I2MCSR_DONE 0x01237 238/* Bits in the PMC1 register */239#define SPS_RST 0x80240#define PCISTIKY 0x40241#define PME_OVR 0x02242 243/* Bits in the STICKYHW register */244#define STICKHW_DS1_SHADOW 0x02245#define STICKHW_DS0_SHADOW 0x01246 247/* Bits in the TMCTL register */248#define TMCTL_TSUSP 0x04249#define TMCTL_TMD 0x02250#define TMCTL_TE 0x01251 252/* Bits in the TFTCTL register */253#define TFTCTL_HWUTSF 0x80254#define TFTCTL_TBTTSYNC 0x40255#define TFTCTL_HWUTSFEN 0x20256#define TFTCTL_TSFCNTRRD 0x10257#define TFTCTL_TBTTSYNCEN 0x08258#define TFTCTL_TSFSYNCEN 0x04259#define TFTCTL_TSFCNTRST 0x02260#define TFTCTL_TSFCNTREN 0x01261 262/* Bits in the EnhanceCFG register */263#define ENCFG_BARKERPREAM 0x00020000264#define ENCFG_NXTBTTCFPSTR 0x00010000265#define ENCFG_BCNSUSCLR 0x00000200266#define ENCFG_BCNSUSIND 0x00000100267#define ENCFG_CFP_PROTECTEN 0x00000040268#define ENCFG_PROTECTMD 0x00000020269#define ENCFG_HWPARCFP 0x00000010270#define ENCFG_CFNULRSP 0x00000004271#define ENCFG_BBTYPE_MASK 0x00000003272#define ENCFG_BBTYPE_G 0x00000002273#define ENCFG_BBTYPE_B 0x00000001274#define ENCFG_BBTYPE_A 0x00000000275 276/* Bits in the Page1Sel register */277#define PAGE1_SEL 0x01278 279/* Bits in the CFG register */280#define CFG_TKIPOPT 0x80281#define CFG_RXDMAOPT 0x40282#define CFG_TMOT_SW 0x20283#define CFG_TMOT_HWLONG 0x10284#define CFG_TMOT_HW 0x00285#define CFG_CFPENDOPT 0x08286#define CFG_BCNSUSEN 0x04287#define CFG_NOTXTIMEOUT 0x02288#define CFG_NOBUFOPT 0x01289 290/* Bits in the TEST register */291#define TEST_LBEXT 0x80292#define TEST_LBINT 0x40293#define TEST_LBNONE 0x00294#define TEST_SOFTINT 0x20295#define TEST_CONTTX 0x10296#define TEST_TXPE 0x08297#define TEST_NAVDIS 0x04298#define TEST_NOCTS 0x02299#define TEST_NOACK 0x01300 301/* Bits in the HOSTCR register */302#define HOSTCR_TXONST 0x80303#define HOSTCR_RXONST 0x40304#define HOSTCR_ADHOC 0x20 /* Network Type 1 = Ad-hoc */305#define HOSTCR_AP 0x10 /* Port Type 1 = AP */306#define HOSTCR_TXON 0x08 /* 0000 1000 */307#define HOSTCR_RXON 0x04 /* 0000 0100 */308#define HOSTCR_MACEN 0x02 /* 0000 0010 */309#define HOSTCR_SOFTRST 0x01 /* 0000 0001 */310 311/* Bits in the MACCR register */312#define MACCR_SYNCFLUSHOK 0x04313#define MACCR_SYNCFLUSH 0x02314#define MACCR_CLRNAV 0x01315 316/* Bits in the MAC_REG_GPIOCTL0 register */317#define LED_ACTSET 0x01318#define LED_RFOFF 0x02319#define LED_NOCONNECT 0x04320 321/* Bits in the RCR register */322#define RCR_SSID 0x80323#define RCR_RXALLTYPE 0x40324#define RCR_UNICAST 0x20325#define RCR_BROADCAST 0x10326#define RCR_MULTICAST 0x08327#define RCR_WPAERR 0x04328#define RCR_ERRCRC 0x02329#define RCR_BSSID 0x01330 331/* Bits in the TCR register */332#define TCR_SYNCDCFOPT 0x02333#define TCR_AUTOBCNTX 0x01 /* Beacon automatically transmit enable */334 335/* Bits in the IMR register */336#define IMR_MEASURESTART 0x80000000337#define IMR_QUIETSTART 0x20000000338#define IMR_RADARDETECT 0x10000000339#define IMR_MEASUREEND 0x08000000340#define IMR_SOFTTIMER1 0x00200000341#define IMR_RXDMA1 0x00001000 /* 0000 0000 0001 0000 0000 0000 */342#define IMR_RXNOBUF 0x00000800343#define IMR_MIBNEARFULL 0x00000400344#define IMR_SOFTINT 0x00000200345#define IMR_FETALERR 0x00000100346#define IMR_WATCHDOG 0x00000080347#define IMR_SOFTTIMER 0x00000040348#define IMR_GPIO 0x00000020349#define IMR_TBTT 0x00000010350#define IMR_RXDMA0 0x00000008351#define IMR_BNTX 0x00000004352#define IMR_AC0DMA 0x00000002353#define IMR_TXDMA0 0x00000001354 355/* Bits in the ISR register */356#define ISR_MEASURESTART 0x80000000357#define ISR_QUIETSTART 0x20000000358#define ISR_RADARDETECT 0x10000000359#define ISR_MEASUREEND 0x08000000360#define ISR_SOFTTIMER1 0x00200000361#define ISR_RXDMA1 0x00001000 /* 0000 0000 0001 0000 0000 0000 */362#define ISR_RXNOBUF 0x00000800 /* 0000 0000 0000 1000 0000 0000 */363#define ISR_MIBNEARFULL 0x00000400 /* 0000 0000 0000 0100 0000 0000 */364#define ISR_SOFTINT 0x00000200365#define ISR_FETALERR 0x00000100366#define ISR_WATCHDOG 0x00000080367#define ISR_SOFTTIMER 0x00000040368#define ISR_GPIO 0x00000020369#define ISR_TBTT 0x00000010370#define ISR_RXDMA0 0x00000008371#define ISR_BNTX 0x00000004372#define ISR_AC0DMA 0x00000002373#define ISR_TXDMA0 0x00000001374 375/* Bits in the PSCFG register */376#define PSCFG_PHILIPMD 0x40377#define PSCFG_WAKECALEN 0x20378#define PSCFG_WAKETMREN 0x10379#define PSCFG_BBPSPROG 0x08380#define PSCFG_WAKESYN 0x04381#define PSCFG_SLEEPSYN 0x02382#define PSCFG_AUTOSLEEP 0x01383 384/* Bits in the PSCTL register */385#define PSCTL_WAKEDONE 0x20386#define PSCTL_PS 0x10387#define PSCTL_GO2DOZE 0x08388#define PSCTL_LNBCN 0x04389#define PSCTL_ALBCN 0x02390#define PSCTL_PSEN 0x01391 392/* Bits in the PSPWSIG register */393#define PSSIG_WPE3 0x80394#define PSSIG_WPE2 0x40395#define PSSIG_WPE1 0x20396#define PSSIG_WRADIOPE 0x10397#define PSSIG_SPE3 0x08398#define PSSIG_SPE2 0x04399#define PSSIG_SPE1 0x02400#define PSSIG_SRADIOPE 0x01401 402/* Bits in the BBREGCTL register */403#define BBREGCTL_DONE 0x04404#define BBREGCTL_REGR 0x02405#define BBREGCTL_REGW 0x01406 407/* Bits in the IFREGCTL register */408#define IFREGCTL_DONE 0x04409#define IFREGCTL_IFRF 0x02410#define IFREGCTL_REGW 0x01411 412/* Bits in the SOFTPWRCTL register */413#define SOFTPWRCTL_RFLEOPT 0x0800414#define SOFTPWRCTL_TXPEINV 0x0200415#define SOFTPWRCTL_SWPECTI 0x0100416#define SOFTPWRCTL_SWPAPE 0x0020417#define SOFTPWRCTL_SWCALEN 0x0010418#define SOFTPWRCTL_SWRADIO_PE 0x0008419#define SOFTPWRCTL_SWPE2 0x0004420#define SOFTPWRCTL_SWPE1 0x0002421#define SOFTPWRCTL_SWPE3 0x0001422 423/* Bits in the GPIOCTL1 register */424#define GPIO1_DATA1 0x20425#define GPIO1_MD1 0x10426#define GPIO1_DATA0 0x02427#define GPIO1_MD0 0x01428 429/* Bits in the DMACTL register */430#define DMACTL_CLRRUN 0x00080000431#define DMACTL_RUN 0x00000008432#define DMACTL_WAKE 0x00000004433#define DMACTL_DEAD 0x00000002434#define DMACTL_ACTIVE 0x00000001435 436/* Bits in the RXDMACTL0 register */437#define RX_PERPKT 0x00000100438#define RX_PERPKTCLR 0x01000000439 440/* Bits in the BCNDMACTL register */441#define BEACON_READY 0x01442 443/* Bits in the MISCFFCTL register */444#define MISCFFCTL_WRITE 0x0001445 446/* Bits in WAKEUPEN0 */447#define WAKEUPEN0_DIRPKT 0x10448#define WAKEUPEN0_LINKOFF 0x08449#define WAKEUPEN0_ATIMEN 0x04450#define WAKEUPEN0_TIMEN 0x02451#define WAKEUPEN0_MAGICEN 0x01452 453/* Bits in WAKEUPEN1 */454#define WAKEUPEN1_128_3 0x08455#define WAKEUPEN1_128_2 0x04456#define WAKEUPEN1_128_1 0x02457#define WAKEUPEN1_128_0 0x01458 459/* Bits in WAKEUPSR0 */460#define WAKEUPSR0_DIRPKT 0x10461#define WAKEUPSR0_LINKOFF 0x08462#define WAKEUPSR0_ATIMEN 0x04463#define WAKEUPSR0_TIMEN 0x02464#define WAKEUPSR0_MAGICEN 0x01465 466/* Bits in WAKEUPSR1 */467#define WAKEUPSR1_128_3 0x08468#define WAKEUPSR1_128_2 0x04469#define WAKEUPSR1_128_1 0x02470#define WAKEUPSR1_128_0 0x01471 472/* Bits in the MAC_REG_GPIOCTL register */473#define GPIO0_MD 0x01474#define GPIO0_DATA 0x02475#define GPIO0_INTMD 0x04476#define GPIO1_MD 0x10477#define GPIO1_DATA 0x20478 479/* Bits in the MSRCTL register */480#define MSRCTL_FINISH 0x80481#define MSRCTL_READY 0x40482#define MSRCTL_RADARDETECT 0x20483#define MSRCTL_EN 0x10484#define MSRCTL_QUIETTXCHK 0x08485#define MSRCTL_QUIETRPT 0x04486#define MSRCTL_QUIETINT 0x02487#define MSRCTL_QUIETEN 0x01488 489/* Bits in the MSRCTL1 register */490#define MSRCTL1_TXPWR 0x08491#define MSRCTL1_CSAPAREN 0x04492#define MSRCTL1_TXPAUSE 0x01493 494/* Loopback mode */495#define MAC_LB_EXT 0x02496#define MAC_LB_INTERNAL 0x01497#define MAC_LB_NONE 0x00498 499#define DEFAULT_BI 0x200500 501/* MiscFIFO Offset */502#define MISCFIFO_KEYETRY0 32503#define MISCFIFO_KEYENTRYSIZE 22504#define MISCFIFO_SYNINFO_IDX 10505#define MISCFIFO_SYNDATA_IDX 11506#define MISCFIFO_SYNDATASIZE 21507 508/* enabled mask value of irq */509#define IMR_MASK_VALUE (IMR_SOFTTIMER1 | \510 IMR_RXDMA1 | \511 IMR_RXNOBUF | \512 IMR_MIBNEARFULL | \513 IMR_SOFTINT | \514 IMR_FETALERR | \515 IMR_WATCHDOG | \516 IMR_SOFTTIMER | \517 IMR_GPIO | \518 IMR_TBTT | \519 IMR_RXDMA0 | \520 IMR_BNTX | \521 IMR_AC0DMA | \522 IMR_TXDMA0)523 524/* max time out delay time */525#define W_MAX_TIMEOUT 0xFFF0U526 527/* wait time within loop */528#define CB_DELAY_LOOP_WAIT 10 /* 10ms */529 530/* revision id */531#define REV_ID_VT3253_A0 0x00532#define REV_ID_VT3253_A1 0x01533#define REV_ID_VT3253_B0 0x08534#define REV_ID_VT3253_B1 0x09535 536/*--------------------- Export Types ------------------------------*/537 538/*--------------------- Export Macros ------------------------------*/539 540#define VT6655_MAC_SELECT_PAGE0(iobase) iowrite8(0, (iobase) + MAC_REG_PAGE1SEL)541 542#define VT6655_MAC_SELECT_PAGE1(iobase) iowrite8(1, (iobase) + MAC_REG_PAGE1SEL)543 544#define MAKEWORD(lb, hb) \545 ((unsigned short)(((unsigned char)(lb)) | (((unsigned short)((unsigned char)(hb))) << 8)))546 547void vt6655_mac_reg_bits_on(void __iomem *iobase, const u8 reg_offset, const u8 bit_mask);548void vt6655_mac_word_reg_bits_on(void __iomem *iobase, const u8 reg_offset, const u16 bit_mask);549void vt6655_mac_reg_bits_off(void __iomem *iobase, const u8 reg_offset, const u8 bit_mask);550void vt6655_mac_word_reg_bits_off(void __iomem *iobase, const u8 reg_offset, const u16 bit_mask);551 552void vt6655_mac_set_short_retry_limit(struct vnt_private *priv, unsigned char retry_limit);553 554void MACvSetLongRetryLimit(struct vnt_private *priv, unsigned char byRetryLimit);555 556bool MACbSoftwareReset(struct vnt_private *priv);557bool MACbShutdown(struct vnt_private *priv);558void MACvInitialize(struct vnt_private *priv);559void vt6655_mac_set_curr_rx_0_desc_addr(struct vnt_private *priv, u32 curr_desc_addr);560void vt6655_mac_set_curr_rx_1_desc_addr(struct vnt_private *priv, u32 curr_desc_addr);561void vt6655_mac_set_curr_tx_desc_addr(int tx_type, struct vnt_private *priv, u32 curr_desc_addr);562void MACvSetCurrSyncDescAddrEx(struct vnt_private *priv,563 u32 curr_desc_addr);564void MACvSetCurrATIMDescAddrEx(struct vnt_private *priv,565 u32 curr_desc_addr);566void MACvTimer0MicroSDelay(struct vnt_private *priv, unsigned int uDelay);567void MACvOneShotTimer1MicroSec(struct vnt_private *priv, unsigned int uDelayTime);568 569void MACvSetMISCFifo(struct vnt_private *priv, unsigned short wOffset,570 u32 dwData);571 572bool MACbPSWakeup(struct vnt_private *priv);573 574void MACvSetKeyEntry(struct vnt_private *priv, unsigned short wKeyCtl,575 unsigned int uEntryIdx, unsigned int uKeyIdx,576 unsigned char *pbyAddr, u32 *pdwKey,577 unsigned char local_id);578void MACvDisableKeyEntry(struct vnt_private *priv, unsigned int uEntryIdx);579 580#endif /* __MAC_H__ */581