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1/* SPDX-License-Identifier: GPL-2.0+ */2/*3 * Copyright (c) 1996, 2003 VIA Networking Technologies, Inc.4 * All rights reserved.5 *6 * Purpose: MAC routines7 *8 * Author: Tevin Chen9 *10 * Date: May 21, 199611 *12 * Revision History:13 * 07-01-2003 Bryan YC Fan: Re-write codes to support VT3253 spec.14 * 08-25-2003 Kyle Hsu: Porting MAC functions from sim53.15 * 09-03-2003 Bryan YC Fan: Add MACvDisableProtectMD & MACvEnableProtectMD16 */17 18#ifndef __MAC_H__19#define __MAC_H__20 21#include <linux/bits.h>22#include "device.h"23 24#define REV_ID_VT3253_A0 0x0025#define REV_ID_VT3253_A1 0x0126#define REV_ID_VT3253_B0 0x0827#define REV_ID_VT3253_B1 0x0928 29/* Registers in the MAC */30#define MAC_REG_BISTCMD 0x0431#define MAC_REG_BISTSR0 0x0532#define MAC_REG_BISTSR1 0x0633#define MAC_REG_BISTSR2 0x0734#define MAC_REG_I2MCSR 0x0835#define MAC_REG_I2MTGID 0x0936#define MAC_REG_I2MTGAD 0x0a37#define MAC_REG_I2MCFG 0x0b38#define MAC_REG_I2MDIPT 0x0c39#define MAC_REG_I2MDOPT 0x0e40#define MAC_REG_USBSUS 0x0f41 42#define MAC_REG_LOCALID 0x1443#define MAC_REG_TESTCFG 0x1544#define MAC_REG_JUMPER0 0x1645#define MAC_REG_JUMPER1 0x1746#define MAC_REG_TMCTL 0x1847#define MAC_REG_TMDATA0 0x1c48#define MAC_REG_TMDATA1 0x1d49#define MAC_REG_TMDATA2 0x1e50#define MAC_REG_TMDATA3 0x1f51 52/* MAC Parameter related */53#define MAC_REG_LRT 0x2054#define MAC_REG_SRT 0x2155#define MAC_REG_SIFS 0x2256#define MAC_REG_DIFS 0x2357#define MAC_REG_EIFS 0x2458#define MAC_REG_SLOT 0x2559#define MAC_REG_BI 0x2660#define MAC_REG_CWMAXMIN0 0x2861#define MAC_REG_LINKOFFTOTM 0x2a62#define MAC_REG_SWTMOT 0x2b63#define MAC_REG_RTSOKCNT 0x2c64#define MAC_REG_RTSFAILCNT 0x2d65#define MAC_REG_ACKFAILCNT 0x2e66#define MAC_REG_FCSERRCNT 0x2f67 68/* TSF Related */69#define MAC_REG_TSFCNTR 0x3070#define MAC_REG_NEXTTBTT 0x3871#define MAC_REG_TSFOFST 0x4072#define MAC_REG_TFTCTL 0x4873 74/* WMAC Control/Status Related */75#define MAC_REG_ENCFG0 0x4c76#define MAC_REG_ENCFG1 0x4d77#define MAC_REG_ENCFG2 0x4e78 79#define MAC_REG_CFG 0x5080#define MAC_REG_TEST 0x5281#define MAC_REG_HOSTCR 0x5482#define MAC_REG_MACCR 0x5583#define MAC_REG_RCR 0x5684#define MAC_REG_TCR 0x5785#define MAC_REG_IMR 0x5886#define MAC_REG_ISR 0x5c87#define MAC_REG_ISR1 0x5d88 89/* Power Saving Related */90#define MAC_REG_PSCFG 0x6091#define MAC_REG_PSCTL 0x6192#define MAC_REG_PSPWRSIG 0x6293#define MAC_REG_BBCR13 0x6394#define MAC_REG_AIDATIM 0x6495#define MAC_REG_PWBT 0x6696#define MAC_REG_WAKEOKTMR 0x6897#define MAC_REG_CALTMR 0x6998#define MAC_REG_SYNSPACCNT 0x6a99#define MAC_REG_WAKSYNOPT 0x6b100 101/* Baseband/IF Control Group */102#define MAC_REG_BBREGCTL 0x6c103#define MAC_REG_CHANNEL 0x6d104#define MAC_REG_BBREGADR 0x6e105#define MAC_REG_BBREGDATA 0x6f106#define MAC_REG_IFREGCTL 0x70107#define MAC_REG_IFDATA 0x71108#define MAC_REG_ITRTMSET 0x74109#define MAC_REG_PAPEDELAY 0x77110#define MAC_REG_SOFTPWRCTL 0x78111#define MAC_REG_SOFTPWRCTL2 0x79112#define MAC_REG_GPIOCTL0 0x7a113#define MAC_REG_GPIOCTL1 0x7b114 115/* MiscFF PIO related */116#define MAC_REG_MISCFFNDEX 0xbc117#define MAC_REG_MISCFFCTL 0xbe118#define MAC_REG_MISCFFDATA 0xc0119 120/* MAC Configuration Group */121#define MAC_REG_PAR0 0xc4122#define MAC_REG_PAR4 0xc8123#define MAC_REG_BSSID0 0xcc124#define MAC_REG_BSSID4 0xd0125#define MAC_REG_MAR0 0xd4126#define MAC_REG_MAR4 0xd8127 128/* MAC RSPPKT INFO Group */129#define MAC_REG_RSPINF_B_1 0xdC130#define MAC_REG_RSPINF_B_2 0xe0131#define MAC_REG_RSPINF_B_5 0xe4132#define MAC_REG_RSPINF_B_11 0xe8133#define MAC_REG_RSPINF_A_6 0xec134#define MAC_REG_RSPINF_A_9 0xee135#define MAC_REG_RSPINF_A_12 0xf0136#define MAC_REG_RSPINF_A_18 0xf2137#define MAC_REG_RSPINF_A_24 0xf4138#define MAC_REG_RSPINF_A_36 0xf6139#define MAC_REG_RSPINF_A_48 0xf8140#define MAC_REG_RSPINF_A_54 0xfa141#define MAC_REG_RSPINF_A_72 0xfc142 143/* Bits in the I2MCFG EEPROM register */144#define I2MCFG_BOUNDCTL BIT(7)145#define I2MCFG_WAITCTL BIT(5)146#define I2MCFG_SCLOECTL BIT(4)147#define I2MCFG_WBUSYCTL BIT(3)148#define I2MCFG_NORETRY BIT(2)149#define I2MCFG_I2MLDSEQ BIT(1)150#define I2MCFG_I2CMFAST BIT(0)151 152/* Bits in the I2MCSR EEPROM register */153#define I2MCSR_EEMW BIT(7)154#define I2MCSR_EEMR BIT(6)155#define I2MCSR_AUTOLD BIT(3)156#define I2MCSR_NACK BIT(1)157#define I2MCSR_DONE BIT(0)158 159/* Bits in the TMCTL register */160#define TMCTL_TSUSP BIT(2)161#define TMCTL_TMD BIT(1)162#define TMCTL_TE BIT(0)163 164/* Bits in the TFTCTL register */165#define TFTCTL_HWUTSF BIT(7)166#define TFTCTL_TBTTSYNC BIT(6)167#define TFTCTL_HWUTSFEN BIT(5)168#define TFTCTL_TSFCNTRRD BIT(4)169#define TFTCTL_TBTTSYNCEN BIT(3)170#define TFTCTL_TSFSYNCEN BIT(2)171#define TFTCTL_TSFCNTRST BIT(1)172#define TFTCTL_TSFCNTREN BIT(0)173 174/* Bits in the EnhanceCFG_0 register */175#define EN_CFG_BB_TYPE_A 0x00176#define EN_CFG_BB_TYPE_B BIT(0)177#define EN_CFG_BB_TYPE_G BIT(1)178#define EN_CFG_BB_TYPE_MASK (EN_CFG_BB_TYPE_B | EN_CFG_BB_TYPE_G)179#define EN_CFG_PROTECT_MD BIT(5)180 181/* Bits in the EnhanceCFG_1 register */182#define EN_CFG_BCN_SUS_IND BIT(0)183#define EN_CFG_BCN_SUS_CLR BIT(1)184 185/* Bits in the EnhanceCFG_2 register */186#define EN_CFG_NXTBTTCFPSTR BIT(0)187#define EN_CFG_BARKER_PREAM BIT(1)188#define EN_CFG_PKT_BURST_MD BIT(2)189 190/* Bits in the CFG register */191#define CFG_TKIPOPT BIT(7)192#define CFG_RXDMAOPT BIT(6)193#define CFG_TMOT_SW BIT(5)194#define CFG_TMOT_HWLONG BIT(4)195#define CFG_TMOT_HW 0x00196#define CFG_CFPENDOPT BIT(3)197#define CFG_BCNSUSEN BIT(2)198#define CFG_NOTXTIMEOUT BIT(1)199#define CFG_NOBUFOPT BIT(0)200 201/* Bits in the TEST register */202#define TEST_LBEXT BIT(7)203#define TEST_LBINT BIT(6)204#define TEST_LBNONE 0x00205#define TEST_SOFTINT BIT(5)206#define TEST_CONTTX BIT(4)207#define TEST_TXPE BIT(3)208#define TEST_NAVDIS BIT(2)209#define TEST_NOCTS BIT(1)210#define TEST_NOACK BIT(0)211 212/* Bits in the HOSTCR register */213#define HOSTCR_TXONST BIT(7)214#define HOSTCR_RXONST BIT(6)215#define HOSTCR_ADHOC BIT(5)216#define HOSTCR_AP BIT(4)217#define HOSTCR_TXON BIT(3)218#define HOSTCR_RXON BIT(2)219#define HOSTCR_MACEN BIT(1)220#define HOSTCR_SOFTRST BIT(0)221 222/* Bits in the MACCR register */223#define MACCR_SYNCFLUSHOK BIT(2)224#define MACCR_SYNCFLUSH BIT(1)225#define MACCR_CLRNAV BIT(0)226 227/* Bits in the RCR register */228#define RCR_SSID BIT(7)229#define RCR_RXALLTYPE BIT(6)230#define RCR_UNICAST BIT(5)231#define RCR_BROADCAST BIT(4)232#define RCR_MULTICAST BIT(3)233#define RCR_WPAERR BIT(2)234#define RCR_ERRCRC BIT(1)235#define RCR_BSSID BIT(0)236 237/* Bits in the TCR register */238#define TCR_SYNCDCFOPT BIT(1)239#define TCR_AUTOBCNTX BIT(0)240 241/* ISR1 */242#define ISR_GPIO3 BIT(6)243#define ISR_RXNOBUF BIT(3)244#define ISR_MIBNEARFULL BIT(2)245#define ISR_SOFTINT BIT(1)246#define ISR_FETALERR BIT(0)247 248#define LEDSTS_STS 0x06249#define LEDSTS_TMLEN 0x78250#define LEDSTS_OFF 0x00251#define LEDSTS_ON 0x02252#define LEDSTS_SLOW 0x04253#define LEDSTS_INTER 0x06254 255/* ISR0 */256#define ISR_WATCHDOG BIT(7)257#define ISR_SOFTTIMER BIT(6)258#define ISR_GPIO0 BIT(5)259#define ISR_TBTT BIT(4)260#define ISR_RXDMA0 BIT(3)261#define ISR_BNTX BIT(2)262#define ISR_ACTX BIT(0)263 264/* Bits in the PSCFG register */265#define PSCFG_PHILIPMD BIT(6)266#define PSCFG_WAKECALEN BIT(5)267#define PSCFG_WAKETMREN BIT(4)268#define PSCFG_BBPSPROG BIT(3)269#define PSCFG_WAKESYN BIT(2)270#define PSCFG_SLEEPSYN BIT(1)271#define PSCFG_AUTOSLEEP BIT(0)272 273/* Bits in the PSCTL register */274#define PSCTL_WAKEDONE BIT(5)275#define PSCTL_PS BIT(4)276#define PSCTL_GO2DOZE BIT(3)277#define PSCTL_LNBCN BIT(2)278#define PSCTL_ALBCN BIT(1)279#define PSCTL_PSEN BIT(0)280 281/* Bits in the PSPWSIG register */282#define PSSIG_WPE3 BIT(7)283#define PSSIG_WPE2 BIT(6)284#define PSSIG_WPE1 BIT(5)285#define PSSIG_WRADIOPE BIT(4)286#define PSSIG_SPE3 BIT(3)287#define PSSIG_SPE2 BIT(2)288#define PSSIG_SPE1 BIT(1)289#define PSSIG_SRADIOPE BIT(0)290 291/* Bits in the BBREGCTL register */292#define BBREGCTL_DONE BIT(2)293#define BBREGCTL_REGR BIT(1)294#define BBREGCTL_REGW BIT(0)295 296/* Bits in the IFREGCTL register */297#define IFREGCTL_DONE BIT(2)298#define IFREGCTL_IFRF BIT(1)299#define IFREGCTL_REGW BIT(0)300 301/* Bits in the SOFTPWRCTL register */302#define SOFTPWRCTL_RFLEOPT BIT(3)303#define SOFTPWRCTL_TXPEINV BIT(1)304#define SOFTPWRCTL_SWPECTI BIT(0)305#define SOFTPWRCTL_SWPAPE BIT(5)306#define SOFTPWRCTL_SWCALEN BIT(4)307#define SOFTPWRCTL_SWRADIO_PE BIT(3)308#define SOFTPWRCTL_SWPE2 BIT(2)309#define SOFTPWRCTL_SWPE1 BIT(1)310#define SOFTPWRCTL_SWPE3 BIT(0)311 312/* Bits in the GPIOCTL1 register */313#define GPIO3_MD BIT(5)314#define GPIO3_DATA BIT(6)315#define GPIO3_INTMD BIT(7)316 317/* Bits in the MISCFFCTL register */318#define MISCFFCTL_WRITE BIT(0)319 320/* Loopback mode */321#define MAC_LB_EXT BIT(1)322#define MAC_LB_INTERNAL BIT(0)323#define MAC_LB_NONE 0x00324 325/* Ethernet address filter type */326#define PKT_TYPE_NONE 0x00 /* turn off receiver */327#define PKT_TYPE_ALL_MULTICAST BIT(7)328#define PKT_TYPE_PROMISCUOUS BIT(6)329#define PKT_TYPE_DIRECTED BIT(5) /* obselete */330#define PKT_TYPE_BROADCAST BIT(4)331#define PKT_TYPE_MULTICAST BIT(3)332#define PKT_TYPE_ERROR_WPA BIT(2)333#define PKT_TYPE_ERROR_CRC BIT(1)334#define PKT_TYPE_BSSID BIT(0)335 336#define DEFAULT_BI 0x200337 338/* MiscFIFO Offset */339#define MISCFIFO_KEYETRY0 32340#define MISCFIFO_KEYENTRYSIZE 22341 342#define MAC_REVISION_A0 0x00343#define MAC_REVISION_A1 0x01344 345struct vnt_mac_set_key {346 union {347 struct {348 u8 addr[ETH_ALEN];349 __le16 key_ctl;350 } write __packed;351 u32 swap[2];352 } u;353 u8 key[WLAN_KEY_LEN_CCMP];354} __packed;355 356int vnt_mac_set_filter(struct vnt_private *priv, u64 mc_filter);357int vnt_mac_shutdown(struct vnt_private *priv);358int vnt_mac_set_bb_type(struct vnt_private *priv, u8 type);359int vnt_mac_disable_keyentry(struct vnt_private *priv, u8 entry_idx);360int vnt_mac_set_keyentry(struct vnt_private *priv, u16 key_ctl, u32 entry_idx,361 u32 key_idx, u8 *addr, u8 *key);362int vnt_mac_reg_bits_off(struct vnt_private *priv, u8 reg_ofs, u8 bits);363int vnt_mac_reg_bits_on(struct vnt_private *priv, u8 reg_ofs, u8 bits);364int vnt_mac_write_word(struct vnt_private *priv, u8 reg_ofs, u16 word);365int vnt_mac_set_bssid_addr(struct vnt_private *priv, u8 *addr);366int vnt_mac_enable_protect_mode(struct vnt_private *priv);367int vnt_mac_disable_protect_mode(struct vnt_private *priv);368int vnt_mac_enable_barker_preamble_mode(struct vnt_private *priv);369int vnt_mac_disable_barker_preamble_mode(struct vnt_private *priv);370int vnt_mac_set_beacon_interval(struct vnt_private *priv, u16 interval);371int vnt_mac_set_led(struct vnt_private *privpriv, u8 state, u8 led);372 373#endif /* __MAC_H__ */374