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1// SPDX-License-Identifier: GPL-2.02/*3 * ARC On-Chip(fpga) UART Driver4 *5 * Copyright (C) 2010-2012 Synopsys, Inc. (www.synopsys.com)6 *7 * vineetg: July 10th 20128 * -Decoupled the driver from arch/arc9 * +Using platform_get_resource() for irq/membase (thx to bfin_uart.c)10 * +Using early_platform_xxx() for early console (thx to mach-shmobile/xxx)11 *12 * Vineetg: Aug 21st 201013 * -Is uart_tx_stopped() not done in tty write path as it has already been14 * taken care of, in serial core15 *16 * Vineetg: Aug 18th 201017 * -New Serial Core based ARC UART driver18 * -Derived largely from blackfin driver albiet with some major tweaks19 *20 * TODO:21 * -check if sysreq works22 */23 24#include <linux/module.h>25#include <linux/serial.h>26#include <linux/console.h>27#include <linux/sysrq.h>28#include <linux/platform_device.h>29#include <linux/tty.h>30#include <linux/tty_flip.h>31#include <linux/serial_core.h>32#include <linux/io.h>33#include <linux/of_irq.h>34#include <linux/of_address.h>35 36/*************************************37 * ARC UART Hardware Specs38 ************************************/39#define ARC_UART_TX_FIFO_SIZE 140 41/*42 * UART Register set (this is not a Standards Compliant IP)43 * Also each reg is Word aligned, but only 8 bits wide44 */45#define R_ID0 046#define R_ID1 447#define R_ID2 848#define R_ID3 1249#define R_DATA 1650#define R_STS 2051#define R_BAUDL 2452#define R_BAUDH 2853 54/* Bits for UART Status Reg (R/W) */55#define RXIENB 0x04 /* Receive Interrupt Enable */56#define TXIENB 0x40 /* Transmit Interrupt Enable */57 58#define RXEMPTY 0x20 /* Receive FIFO Empty: No char receivede */59#define TXEMPTY 0x80 /* Transmit FIFO Empty, thus char can be written into */60 61#define RXFULL 0x08 /* Receive FIFO full */62#define RXFULL1 0x10 /* Receive FIFO has space for 1 char (tot space=4) */63 64#define RXFERR 0x01 /* Frame Error: Stop Bit not detected */65#define RXOERR 0x02 /* OverFlow Err: Char recv but RXFULL still set */66 67/* Uart bit fiddling helpers: lowest level */68#define RBASE(port, reg) (port->membase + reg)69#define UART_REG_SET(u, r, v) writeb((v), RBASE(u, r))70#define UART_REG_GET(u, r) readb(RBASE(u, r))71 72#define UART_REG_OR(u, r, v) UART_REG_SET(u, r, UART_REG_GET(u, r) | (v))73#define UART_REG_CLR(u, r, v) UART_REG_SET(u, r, UART_REG_GET(u, r) & ~(v))74 75/* Uart bit fiddling helpers: API level */76#define UART_SET_DATA(uart, val) UART_REG_SET(uart, R_DATA, val)77#define UART_GET_DATA(uart) UART_REG_GET(uart, R_DATA)78 79#define UART_SET_BAUDH(uart, val) UART_REG_SET(uart, R_BAUDH, val)80#define UART_SET_BAUDL(uart, val) UART_REG_SET(uart, R_BAUDL, val)81 82#define UART_CLR_STATUS(uart, val) UART_REG_CLR(uart, R_STS, val)83#define UART_GET_STATUS(uart) UART_REG_GET(uart, R_STS)84 85#define UART_ALL_IRQ_DISABLE(uart) UART_REG_CLR(uart, R_STS, RXIENB|TXIENB)86#define UART_RX_IRQ_DISABLE(uart) UART_REG_CLR(uart, R_STS, RXIENB)87#define UART_TX_IRQ_DISABLE(uart) UART_REG_CLR(uart, R_STS, TXIENB)88 89#define UART_ALL_IRQ_ENABLE(uart) UART_REG_OR(uart, R_STS, RXIENB|TXIENB)90#define UART_RX_IRQ_ENABLE(uart) UART_REG_OR(uart, R_STS, RXIENB)91#define UART_TX_IRQ_ENABLE(uart) UART_REG_OR(uart, R_STS, TXIENB)92 93#define ARC_SERIAL_DEV_NAME "ttyARC"94 95struct arc_uart_port {96 struct uart_port port;97 unsigned long baud;98};99 100#define to_arc_port(uport) container_of(uport, struct arc_uart_port, port)101 102static struct arc_uart_port arc_uart_ports[CONFIG_SERIAL_ARC_NR_PORTS];103 104#ifdef CONFIG_SERIAL_ARC_CONSOLE105static struct console arc_console;106#endif107 108#define DRIVER_NAME "arc-uart"109 110static struct uart_driver arc_uart_driver = {111 .owner = THIS_MODULE,112 .driver_name = DRIVER_NAME,113 .dev_name = ARC_SERIAL_DEV_NAME,114 .major = 0,115 .minor = 0,116 .nr = CONFIG_SERIAL_ARC_NR_PORTS,117#ifdef CONFIG_SERIAL_ARC_CONSOLE118 .cons = &arc_console,119#endif120};121 122static void arc_serial_stop_rx(struct uart_port *port)123{124 UART_RX_IRQ_DISABLE(port);125}126 127static void arc_serial_stop_tx(struct uart_port *port)128{129 while (!(UART_GET_STATUS(port) & TXEMPTY))130 cpu_relax();131 132 UART_TX_IRQ_DISABLE(port);133}134 135/*136 * Return TIOCSER_TEMT when transmitter is not busy.137 */138static unsigned int arc_serial_tx_empty(struct uart_port *port)139{140 unsigned int stat;141 142 stat = UART_GET_STATUS(port);143 if (stat & TXEMPTY)144 return TIOCSER_TEMT;145 146 return 0;147}148 149/*150 * Driver internal routine, used by both tty(serial core) as well as tx-isr151 * -Called under spinlock in either cases152 * -also tty->flow.stopped has already been checked153 * = by uart_start( ) before calling us154 * = tx_ist checks that too before calling155 */156static void arc_serial_tx_chars(struct uart_port *port)157{158 struct tty_port *tport = &port->state->port;159 int sent = 0;160 unsigned char ch;161 162 if (unlikely(port->x_char)) {163 UART_SET_DATA(port, port->x_char);164 port->icount.tx++;165 port->x_char = 0;166 sent = 1;167 } else if (uart_fifo_get(port, &ch)) {168 while (!(UART_GET_STATUS(port) & TXEMPTY))169 cpu_relax();170 UART_SET_DATA(port, ch);171 sent = 1;172 }173 174 /*175 * If num chars in xmit buffer are too few, ask tty layer for more.176 * By Hard ISR to schedule processing in software interrupt part177 */178 if (kfifo_len(&tport->xmit_fifo) < WAKEUP_CHARS)179 uart_write_wakeup(port);180 181 if (sent)182 UART_TX_IRQ_ENABLE(port);183}184 185/*186 * port is locked and interrupts are disabled187 * uart_start( ) calls us under the port spinlock irqsave188 */189static void arc_serial_start_tx(struct uart_port *port)190{191 arc_serial_tx_chars(port);192}193 194static void arc_serial_rx_chars(struct uart_port *port, unsigned int status)195{196 /*197 * UART has 4 deep RX-FIFO. Driver's recongnition of this fact198 * is very subtle. Here's how ...199 * Upon getting a RX-Intr, such that RX-EMPTY=0, meaning data available,200 * driver reads the DATA Reg and keeps doing that in a loop, until201 * RX-EMPTY=1. Multiple chars being avail, with a single Interrupt,202 * before RX-EMPTY=0, implies some sort of buffering going on in the203 * controller, which is indeed the Rx-FIFO.204 */205 do {206 u8 ch, flg = TTY_NORMAL;207 208 /*209 * This could be an Rx Intr for err (no data),210 * so check err and clear that Intr first211 */212 if (status & RXOERR) {213 port->icount.overrun++;214 flg = TTY_OVERRUN;215 UART_CLR_STATUS(port, RXOERR);216 }217 218 if (status & RXFERR) {219 port->icount.frame++;220 flg = TTY_FRAME;221 UART_CLR_STATUS(port, RXFERR);222 }223 224 if (status & RXEMPTY)225 continue;226 227 ch = UART_GET_DATA(port);228 port->icount.rx++;229 230 if (!(uart_handle_sysrq_char(port, ch)))231 uart_insert_char(port, status, RXOERR, ch, flg);232 233 tty_flip_buffer_push(&port->state->port);234 } while (!((status = UART_GET_STATUS(port)) & RXEMPTY));235}236 237/*238 * A note on the Interrupt handling state machine of this driver239 *240 * kernel printk writes funnel thru the console driver framework and in order241 * to keep things simple as well as efficient, it writes to UART in polled242 * mode, in one shot, and exits.243 *244 * OTOH, Userland output (via tty layer), uses interrupt based writes as there245 * can be undeterministic delay between char writes.246 *247 * Thus Rx-interrupts are always enabled, while tx-interrupts are by default248 * disabled.249 *250 * When tty has some data to send out, serial core calls driver's start_tx251 * which252 * -checks-if-tty-buffer-has-char-to-send253 * -writes-data-to-uart254 * -enable-tx-intr255 *256 * Once data bits are pushed out, controller raises the Tx-room-avail-Interrupt.257 * The first thing Tx ISR does is disable further Tx interrupts (as this could258 * be the last char to send, before settling down into the quiet polled mode).259 * It then calls the exact routine used by tty layer write to send out any260 * more char in tty buffer. In case of sending, it re-enables Tx-intr. In case261 * of no data, it remains disabled.262 * This is how the transmit state machine is dynamically switched on/off263 */264 265static irqreturn_t arc_serial_isr(int irq, void *dev_id)266{267 struct uart_port *port = dev_id;268 unsigned int status;269 270 status = UART_GET_STATUS(port);271 272 /*273 * Single IRQ for both Rx (data available) Tx (room available) Interrupt274 * notifications from the UART Controller.275 * To demultiplex between the two, we check the relevant bits276 */277 if (status & RXIENB) {278 279 /* already in ISR, no need of xx_irqsave */280 uart_port_lock(port);281 arc_serial_rx_chars(port, status);282 uart_port_unlock(port);283 }284 285 if ((status & TXIENB) && (status & TXEMPTY)) {286 287 /* Unconditionally disable further Tx-Interrupts.288 * will be enabled by tx_chars() if needed.289 */290 UART_TX_IRQ_DISABLE(port);291 292 uart_port_lock(port);293 294 if (!uart_tx_stopped(port))295 arc_serial_tx_chars(port);296 297 uart_port_unlock(port);298 }299 300 return IRQ_HANDLED;301}302 303static unsigned int arc_serial_get_mctrl(struct uart_port *port)304{305 /*306 * Pretend we have a Modem status reg and following bits are307 * always set, to satify the serial core state machine308 * (DSR) Data Set Ready309 * (CTS) Clear To Send310 * (CAR) Carrier Detect311 */312 return TIOCM_CTS | TIOCM_DSR | TIOCM_CAR;313}314 315static void arc_serial_set_mctrl(struct uart_port *port, unsigned int mctrl)316{317 /* MCR not present */318}319 320static void arc_serial_break_ctl(struct uart_port *port, int break_state)321{322 /* ARC UART doesn't support sending Break signal */323}324 325static int arc_serial_startup(struct uart_port *port)326{327 /* Before we hook up the ISR, Disable all UART Interrupts */328 UART_ALL_IRQ_DISABLE(port);329 330 if (request_irq(port->irq, arc_serial_isr, 0, "arc uart rx-tx", port)) {331 dev_warn(port->dev, "Unable to attach ARC UART intr\n");332 return -EBUSY;333 }334 335 UART_RX_IRQ_ENABLE(port); /* Only Rx IRQ enabled to begin with */336 337 return 0;338}339 340/* This is not really needed */341static void arc_serial_shutdown(struct uart_port *port)342{343 free_irq(port->irq, port);344}345 346static void347arc_serial_set_termios(struct uart_port *port, struct ktermios *new,348 const struct ktermios *old)349{350 struct arc_uart_port *uart = to_arc_port(port);351 unsigned int baud, uartl, uarth, hw_val;352 unsigned long flags;353 354 /*355 * Use the generic handler so that any specially encoded baud rates356 * such as SPD_xx flags or "%B0" can be handled357 * Max Baud I suppose will not be more than current 115K * 4358 * Formula for ARC UART is: hw-val = ((CLK/(BAUD*4)) -1)359 * spread over two 8-bit registers360 */361 baud = uart_get_baud_rate(port, new, old, 0, 460800);362 363 hw_val = port->uartclk / (uart->baud * 4) - 1;364 uartl = hw_val & 0xFF;365 uarth = (hw_val >> 8) & 0xFF;366 367 uart_port_lock_irqsave(port, &flags);368 369 UART_ALL_IRQ_DISABLE(port);370 371 UART_SET_BAUDL(port, uartl);372 UART_SET_BAUDH(port, uarth);373 374 UART_RX_IRQ_ENABLE(port);375 376 /*377 * UART doesn't support Parity/Hardware Flow Control;378 * Only supports 8N1 character size379 */380 new->c_cflag &= ~(CMSPAR|CRTSCTS|CSIZE);381 new->c_cflag |= CS8;382 383 if (old)384 tty_termios_copy_hw(new, old);385 386 /* Don't rewrite B0 */387 if (tty_termios_baud_rate(new))388 tty_termios_encode_baud_rate(new, baud, baud);389 390 uart_update_timeout(port, new->c_cflag, baud);391 392 uart_port_unlock_irqrestore(port, flags);393}394 395static const char *arc_serial_type(struct uart_port *port)396{397 return port->type == PORT_ARC ? DRIVER_NAME : NULL;398}399 400static void arc_serial_release_port(struct uart_port *port)401{402}403 404static int arc_serial_request_port(struct uart_port *port)405{406 return 0;407}408 409/*410 * Verify the new serial_struct (for TIOCSSERIAL).411 */412static int413arc_serial_verify_port(struct uart_port *port, struct serial_struct *ser)414{415 if (port->type != PORT_UNKNOWN && ser->type != PORT_ARC)416 return -EINVAL;417 418 return 0;419}420 421/*422 * Configure/autoconfigure the port.423 */424static void arc_serial_config_port(struct uart_port *port, int flags)425{426 if (flags & UART_CONFIG_TYPE)427 port->type = PORT_ARC;428}429 430#ifdef CONFIG_CONSOLE_POLL431 432static void arc_serial_poll_putchar(struct uart_port *port, unsigned char chr)433{434 while (!(UART_GET_STATUS(port) & TXEMPTY))435 cpu_relax();436 437 UART_SET_DATA(port, chr);438}439 440static int arc_serial_poll_getchar(struct uart_port *port)441{442 unsigned char chr;443 444 while (!(UART_GET_STATUS(port) & RXEMPTY))445 cpu_relax();446 447 chr = UART_GET_DATA(port);448 return chr;449}450#endif451 452static const struct uart_ops arc_serial_pops = {453 .tx_empty = arc_serial_tx_empty,454 .set_mctrl = arc_serial_set_mctrl,455 .get_mctrl = arc_serial_get_mctrl,456 .stop_tx = arc_serial_stop_tx,457 .start_tx = arc_serial_start_tx,458 .stop_rx = arc_serial_stop_rx,459 .break_ctl = arc_serial_break_ctl,460 .startup = arc_serial_startup,461 .shutdown = arc_serial_shutdown,462 .set_termios = arc_serial_set_termios,463 .type = arc_serial_type,464 .release_port = arc_serial_release_port,465 .request_port = arc_serial_request_port,466 .config_port = arc_serial_config_port,467 .verify_port = arc_serial_verify_port,468#ifdef CONFIG_CONSOLE_POLL469 .poll_put_char = arc_serial_poll_putchar,470 .poll_get_char = arc_serial_poll_getchar,471#endif472};473 474#ifdef CONFIG_SERIAL_ARC_CONSOLE475 476static int arc_serial_console_setup(struct console *co, char *options)477{478 struct uart_port *port;479 int baud = 115200;480 int bits = 8;481 int parity = 'n';482 int flow = 'n';483 484 if (co->index < 0 || co->index >= CONFIG_SERIAL_ARC_NR_PORTS)485 return -ENODEV;486 487 /*488 * The uart port backing the console (e.g. ttyARC1) might not have been489 * init yet. If so, defer the console setup to after the port.490 */491 port = &arc_uart_ports[co->index].port;492 if (!port->membase)493 return -ENODEV;494 495 if (options)496 uart_parse_options(options, &baud, &parity, &bits, &flow);497 498 /*499 * Serial core will call port->ops->set_termios( )500 * which will set the baud reg501 */502 return uart_set_options(port, co, baud, parity, bits, flow);503}504 505static void arc_serial_console_putchar(struct uart_port *port, unsigned char ch)506{507 while (!(UART_GET_STATUS(port) & TXEMPTY))508 cpu_relax();509 510 UART_SET_DATA(port, (unsigned char)ch);511}512 513/*514 * Interrupts are disabled on entering515 */516static void arc_serial_console_write(struct console *co, const char *s,517 unsigned int count)518{519 struct uart_port *port = &arc_uart_ports[co->index].port;520 unsigned long flags;521 522 uart_port_lock_irqsave(port, &flags);523 uart_console_write(port, s, count, arc_serial_console_putchar);524 uart_port_unlock_irqrestore(port, flags);525}526 527static struct console arc_console = {528 .name = ARC_SERIAL_DEV_NAME,529 .write = arc_serial_console_write,530 .device = uart_console_device,531 .setup = arc_serial_console_setup,532 .flags = CON_PRINTBUFFER,533 .index = -1,534 .data = &arc_uart_driver535};536 537static void arc_early_serial_write(struct console *con, const char *s,538 unsigned int n)539{540 struct earlycon_device *dev = con->data;541 542 uart_console_write(&dev->port, s, n, arc_serial_console_putchar);543}544 545static int __init arc_early_console_setup(struct earlycon_device *dev,546 const char *opt)547{548 struct uart_port *port = &dev->port;549 unsigned int l, h, hw_val;550 551 if (!dev->port.membase)552 return -ENODEV;553 554 hw_val = port->uartclk / (dev->baud * 4) - 1;555 l = hw_val & 0xFF;556 h = (hw_val >> 8) & 0xFF;557 558 UART_SET_BAUDL(port, l);559 UART_SET_BAUDH(port, h);560 561 dev->con->write = arc_early_serial_write;562 return 0;563}564OF_EARLYCON_DECLARE(arc_uart, "snps,arc-uart", arc_early_console_setup);565 566#endif /* CONFIG_SERIAL_ARC_CONSOLE */567 568static int arc_serial_probe(struct platform_device *pdev)569{570 struct device_node *np = pdev->dev.of_node;571 struct arc_uart_port *uart;572 struct uart_port *port;573 int dev_id;574 u32 val;575 576 /* no device tree device */577 if (!np)578 return -ENODEV;579 580 dev_id = of_alias_get_id(np, "serial");581 if (dev_id < 0)582 dev_id = 0;583 584 if (dev_id >= ARRAY_SIZE(arc_uart_ports)) {585 dev_err(&pdev->dev, "serial%d out of range\n", dev_id);586 return -EINVAL;587 }588 589 uart = &arc_uart_ports[dev_id];590 port = &uart->port;591 592 if (of_property_read_u32(np, "clock-frequency", &val)) {593 dev_err(&pdev->dev, "clock-frequency property NOTset\n");594 return -EINVAL;595 }596 port->uartclk = val;597 598 if (of_property_read_u32(np, "current-speed", &val)) {599 dev_err(&pdev->dev, "current-speed property NOT set\n");600 return -EINVAL;601 }602 uart->baud = val;603 604 port->membase = devm_platform_ioremap_resource(pdev, 0);605 if (IS_ERR(port->membase)) {606 /* No point of dev_err since UART itself is hosed here */607 return PTR_ERR(port->membase);608 }609 610 port->irq = irq_of_parse_and_map(np, 0);611 612 port->dev = &pdev->dev;613 port->iotype = UPIO_MEM;614 port->flags = UPF_BOOT_AUTOCONF;615 port->line = dev_id;616 port->ops = &arc_serial_pops;617 port->has_sysrq = IS_ENABLED(CONFIG_SERIAL_ARC_CONSOLE);618 619 port->fifosize = ARC_UART_TX_FIFO_SIZE;620 621 /*622 * uart_insert_char( ) uses it in decideding whether to ignore a623 * char or not. Explicitly setting it here, removes the subtelty624 */625 port->ignore_status_mask = 0;626 627 return uart_add_one_port(&arc_uart_driver, &arc_uart_ports[dev_id].port);628}629 630static const struct of_device_id arc_uart_dt_ids[] = {631 { .compatible = "snps,arc-uart" },632 { /* Sentinel */ }633};634MODULE_DEVICE_TABLE(of, arc_uart_dt_ids);635 636static struct platform_driver arc_platform_driver = {637 .probe = arc_serial_probe,638 .driver = {639 .name = DRIVER_NAME,640 .of_match_table = arc_uart_dt_ids,641 },642};643 644static int __init arc_serial_init(void)645{646 int ret;647 648 ret = uart_register_driver(&arc_uart_driver);649 if (ret)650 return ret;651 652 ret = platform_driver_register(&arc_platform_driver);653 if (ret)654 uart_unregister_driver(&arc_uart_driver);655 656 return ret;657}658 659static void __exit arc_serial_exit(void)660{661 platform_driver_unregister(&arc_platform_driver);662 uart_unregister_driver(&arc_uart_driver);663}664 665module_init(arc_serial_init);666module_exit(arc_serial_exit);667 668MODULE_LICENSE("GPL");669MODULE_ALIAS("platform:" DRIVER_NAME);670MODULE_AUTHOR("Vineet Gupta");671MODULE_DESCRIPTION("ARC(Synopsys) On-Chip(fpga) serial driver");672