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1/* SPDX-License-Identifier: GPL-2.0-only2 * Copyright (C) 2024 Marvell.3 */4#ifndef __OCTEP_VDPA_H__5#define __OCTEP_VDPA_H__6 7#include <linux/pci.h>8#include <linux/pci_regs.h>9#include <linux/vdpa.h>10#include <linux/virtio_pci_modern.h>11#include <uapi/linux/virtio_net.h>12#include <uapi/linux/virtio_blk.h>13#include <uapi/linux/virtio_config.h>14#include <uapi/linux/virtio_pci.h>15#include <uapi/linux/vdpa.h>16 17#define OCTEP_VDPA_DEVID_CN106K_PF 0xb90018#define OCTEP_VDPA_DEVID_CN106K_VF 0xb90319#define OCTEP_VDPA_DEVID_CN105K_PF 0xba0020#define OCTEP_VDPA_DEVID_CN105K_VF 0xba0321#define OCTEP_VDPA_DEVID_CN103K_PF 0xbd0022#define OCTEP_VDPA_DEVID_CN103K_VF 0xbd0323 24#define OCTEP_HW_MBOX_BAR 025#define OCTEP_HW_CAPS_BAR 426 27#define OCTEP_DEV_READY_SIGNATURE 0xBABABABA28 29#define OCTEP_EPF_RINFO(x) (0x000209f0 | ((x) << 25))30#define OCTEP_VF_MBOX_DATA(x) (0x00010210 | ((x) << 17))31#define OCTEP_PF_MBOX_DATA(x) (0x00022000 | ((x) << 4))32 33#define OCTEP_EPF_RINFO_RPVF(val) (((val) >> 32) & 0xF)34#define OCTEP_EPF_RINFO_NVFS(val) (((val) >> 48) & 0x7F)35 36#define OCTEP_FW_READY_SIGNATURE0 0xFEEDFEED37#define OCTEP_FW_READY_SIGNATURE1 0x3355ffaa38 39enum octep_vdpa_dev_status {40 OCTEP_VDPA_DEV_STATUS_INVALID,41 OCTEP_VDPA_DEV_STATUS_ALLOC,42 OCTEP_VDPA_DEV_STATUS_WAIT_FOR_BAR_INIT,43 OCTEP_VDPA_DEV_STATUS_INIT,44 OCTEP_VDPA_DEV_STATUS_READY,45 OCTEP_VDPA_DEV_STATUS_UNINIT46};47 48struct octep_vring_info {49 struct vdpa_callback cb;50 void __iomem *notify_addr;51 u32 __iomem *cb_notify_addr;52 phys_addr_t notify_pa;53 char msix_name[256];54};55 56struct octep_hw {57 struct pci_dev *pdev;58 u8 __iomem *base[PCI_STD_NUM_BARS];59 struct virtio_pci_common_cfg __iomem *common_cfg;60 u8 __iomem *dev_cfg;61 u8 __iomem *isr;62 void __iomem *notify_base;63 phys_addr_t notify_base_pa;64 u32 notify_off_multiplier;65 u8 notify_bar;66 struct octep_vring_info *vqs;67 struct vdpa_callback config_cb;68 u64 features;69 u16 nr_vring;70 u32 config_size;71 int irq;72};73 74u8 octep_hw_get_status(struct octep_hw *oct_hw);75void octep_hw_set_status(struct octep_hw *dev, uint8_t status);76void octep_hw_reset(struct octep_hw *oct_hw);77void octep_write_queue_select(struct octep_hw *oct_hw, u16 queue_id);78void octep_notify_queue(struct octep_hw *oct_hw, u16 qid);79void octep_read_dev_config(struct octep_hw *oct_hw, u64 offset, void *dst, int length);80int octep_set_vq_address(struct octep_hw *oct_hw, u16 qid, u64 desc_area, u64 driver_area,81 u64 device_area);82void octep_set_vq_num(struct octep_hw *oct_hw, u16 qid, u32 num);83void octep_set_vq_ready(struct octep_hw *oct_hw, u16 qid, bool ready);84bool octep_get_vq_ready(struct octep_hw *oct_hw, u16 qid);85int octep_set_vq_state(struct octep_hw *oct_hw, u16 qid, const struct vdpa_vq_state *state);86int octep_get_vq_state(struct octep_hw *oct_hw, u16 qid, struct vdpa_vq_state *state);87u16 octep_get_vq_size(struct octep_hw *oct_hw);88int octep_hw_caps_read(struct octep_hw *oct_hw, struct pci_dev *pdev);89u64 octep_hw_get_dev_features(struct octep_hw *oct_hw);90void octep_hw_set_drv_features(struct octep_hw *oct_hw, u64 features);91u64 octep_hw_get_drv_features(struct octep_hw *oct_hw);92int octep_verify_features(u64 features);93 94#endif /* __OCTEP_VDPA_H__ */95