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1/* SPDX-License-Identifier: GPL-2.0-only */2/*3 * Register definitions for Samsung LTV350QV Quarter VGA LCD Panel4 *5 * Copyright (C) 2006, 2007 Atmel Corporation6 */7#ifndef __LTV350QV_H8#define __LTV350QV_H9 10#define LTV_OPC_INDEX	0x7411#define LTV_OPC_DATA	0x7612 13#define LTV_ID		0x00		/* ID Read */14#define LTV_IFCTL	0x01		/* Display Interface Control */15#define LTV_DATACTL	0x02		/* Display Data Control */16#define LTV_ENTRY_MODE	0x03		/* Entry Mode */17#define LTV_GATECTL1	0x04		/* Gate Control 1 */18#define LTV_GATECTL2	0x05		/* Gate Control 2 */19#define LTV_VBP		0x06		/* Vertical Back Porch */20#define LTV_HBP		0x07		/* Horizontal Back Porch */21#define LTV_SOTCTL	0x08		/* Source Output Timing Control */22#define LTV_PWRCTL1	0x09		/* Power Control 1 */23#define LTV_PWRCTL2	0x0a		/* Power Control 2 */24#define LTV_GAMMA(x)	(0x10 + (x))	/* Gamma control */25 26/* Bit definitions for LTV_IFCTL */27#define LTV_IM			(1 << 15)28#define LTV_NMD			(1 << 14)29#define LTV_SSMD		(1 << 13)30#define LTV_REV			(1 <<  7)31#define LTV_NL(x)		(((x) & 0x001f) << 0)32 33/* Bit definitions for LTV_DATACTL */34#define LTV_DS_SAME		(0 << 12)35#define LTV_DS_D_TO_S		(1 << 12)36#define LTV_DS_S_TO_D		(2 << 12)37#define LTV_CHS_384		(0 <<  9)38#define LTV_CHS_480		(1 <<  9)39#define LTV_CHS_492		(2 <<  9)40#define LTV_DF_RGB		(0 <<  6)41#define LTV_DF_RGBX		(1 <<  6)42#define LTV_DF_XRGB		(2 <<  6)43#define LTV_RGB_RGB		(0 <<  2)44#define LTV_RGB_BGR		(1 <<  2)45#define LTV_RGB_GRB		(2 <<  2)46#define LTV_RGB_RBG		(3 <<  2)47 48/* Bit definitions for LTV_ENTRY_MODE */49#define LTV_VSPL_ACTIVE_LOW	(0 << 15)50#define LTV_VSPL_ACTIVE_HIGH	(1 << 15)51#define LTV_HSPL_ACTIVE_LOW	(0 << 14)52#define LTV_HSPL_ACTIVE_HIGH	(1 << 14)53#define LTV_DPL_SAMPLE_RISING	(0 << 13)54#define LTV_DPL_SAMPLE_FALLING	(1 << 13)55#define LTV_EPL_ACTIVE_LOW	(0 << 12)56#define LTV_EPL_ACTIVE_HIGH	(1 << 12)57#define LTV_SS_LEFT_TO_RIGHT	(0 <<  8)58#define LTV_SS_RIGHT_TO_LEFT	(1 <<  8)59#define LTV_STB			(1 <<  1)60 61/* Bit definitions for LTV_GATECTL1 */62#define LTV_CLW(x)		(((x) & 0x0007) << 12)63#define LTV_GAON		(1 <<  5)64#define LTV_SDR			(1 <<  3)65 66/* Bit definitions for LTV_GATECTL2 */67#define LTV_NW_INV_FRAME	(0 << 14)68#define LTV_NW_INV_1LINE	(1 << 14)69#define LTV_NW_INV_2LINE	(2 << 14)70#define LTV_DSC			(1 << 12)71#define LTV_GIF			(1 <<  8)72#define LTV_FHN			(1 <<  7)73#define LTV_FTI(x)		(((x) & 0x0003) << 4)74#define LTV_FWI(x)		(((x) & 0x0003) << 0)75 76/* Bit definitions for LTV_SOTCTL */77#define LTV_SDT(x)		(((x) & 0x0007) << 10)78#define LTV_EQ(x)		(((x) & 0x0007) <<  2)79 80/* Bit definitions for LTV_PWRCTL1 */81#define LTV_VCOM_DISABLE	(1 << 14)82#define LTV_VCOMOUT_ENABLE	(1 << 11)83#define LTV_POWER_ON		(1 <<  9)84#define LTV_DRIVE_CURRENT(x)	(((x) & 0x0007) << 4)	/* 0=off, 5=max */85#define LTV_SUPPLY_CURRENT(x)	(((x) & 0x0007) << 0)	/* 0=off, 5=max */86 87/* Bit definitions for LTV_PWRCTL2 */88#define LTV_VCOML_ENABLE	(1 << 13)89#define LTV_VCOML_VOLTAGE(x)	(((x) & 0x001f) << 8)	/* 0=1V, 31=-1V */90#define LTV_VCOMH_VOLTAGE(x)	(((x) & 0x001f) << 0)	/* 0=3V, 31=4.5V */91 92#endif /* __LTV350QV_H */93