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1/*2 * Driver for AT91 LCD Controller3 *4 * Copyright (C) 2007 Atmel Corporation5 *6 * This file is subject to the terms and conditions of the GNU General Public7 * License. See the file COPYING in the main directory of this archive for8 * more details.9 */10 11#include <linux/kernel.h>12#include <linux/platform_device.h>13#include <linux/dma-mapping.h>14#include <linux/interrupt.h>15#include <linux/clk.h>16#include <linux/fb.h>17#include <linux/init.h>18#include <linux/delay.h>19#include <linux/backlight.h>20#include <linux/gfp.h>21#include <linux/gpio/consumer.h>22#include <linux/module.h>23#include <linux/of.h>24#include <linux/of_device.h>25#include <video/of_videomode.h>26#include <video/of_display_timing.h>27#include <linux/regulator/consumer.h>28#include <video/videomode.h>29 30#include <video/atmel_lcdc.h>31 32struct atmel_lcdfb_config {33 bool have_alt_pixclock;34 bool have_hozval;35 bool have_intensity_bit;36};37 38 /* LCD Controller info data structure, stored in device platform_data */39struct atmel_lcdfb_info {40 spinlock_t lock;41 struct fb_info *info;42 void __iomem *mmio;43 int irq_base;44 struct work_struct task;45 46 unsigned int smem_len;47 struct platform_device *pdev;48 struct clk *bus_clk;49 struct clk *lcdc_clk;50 51 struct backlight_device *backlight;52 u8 saved_lcdcon;53 54 u32 pseudo_palette[16];55 bool have_intensity_bit;56 57 struct atmel_lcdfb_pdata pdata;58 59 struct atmel_lcdfb_config *config;60 struct regulator *reg_lcd;61};62 63struct atmel_lcdfb_power_ctrl_gpio {64 struct gpio_desc *gpiod;65 66 struct list_head list;67};68 69#define lcdc_readl(sinfo, reg) __raw_readl((sinfo)->mmio+(reg))70#define lcdc_writel(sinfo, reg, val) __raw_writel((val), (sinfo)->mmio+(reg))71 72/* configurable parameters */73#define ATMEL_LCDC_CVAL_DEFAULT 0xc874#define ATMEL_LCDC_DMA_BURST_LEN 8 /* words */75#define ATMEL_LCDC_FIFO_SIZE 512 /* words */76 77static struct atmel_lcdfb_config at91sam9261_config = {78 .have_hozval = true,79 .have_intensity_bit = true,80};81 82static struct atmel_lcdfb_config at91sam9263_config = {83 .have_intensity_bit = true,84};85 86static struct atmel_lcdfb_config at91sam9g10_config = {87 .have_hozval = true,88};89 90static struct atmel_lcdfb_config at91sam9g45_config = {91 .have_alt_pixclock = true,92};93 94static struct atmel_lcdfb_config at91sam9g45es_config = {95};96 97static struct atmel_lcdfb_config at91sam9rl_config = {98 .have_intensity_bit = true,99};100 101static u32 contrast_ctr = ATMEL_LCDC_PS_DIV8102 | ATMEL_LCDC_POL_POSITIVE103 | ATMEL_LCDC_ENA_PWMENABLE;104 105#ifdef CONFIG_BACKLIGHT_ATMEL_LCDC106 107/* some bl->props field just changed */108static int atmel_bl_update_status(struct backlight_device *bl)109{110 struct atmel_lcdfb_info *sinfo = bl_get_data(bl);111 int brightness = backlight_get_brightness(bl);112 113 lcdc_writel(sinfo, ATMEL_LCDC_CONTRAST_VAL, brightness);114 if (contrast_ctr & ATMEL_LCDC_POL_POSITIVE)115 lcdc_writel(sinfo, ATMEL_LCDC_CONTRAST_CTR,116 brightness ? contrast_ctr : 0);117 else118 lcdc_writel(sinfo, ATMEL_LCDC_CONTRAST_CTR, contrast_ctr);119 120 return 0;121}122 123static int atmel_bl_get_brightness(struct backlight_device *bl)124{125 struct atmel_lcdfb_info *sinfo = bl_get_data(bl);126 127 return lcdc_readl(sinfo, ATMEL_LCDC_CONTRAST_VAL);128}129 130static const struct backlight_ops atmel_lcdc_bl_ops = {131 .update_status = atmel_bl_update_status,132 .get_brightness = atmel_bl_get_brightness,133};134 135static void init_backlight(struct atmel_lcdfb_info *sinfo)136{137 struct backlight_properties props;138 struct backlight_device *bl;139 140 if (sinfo->backlight)141 return;142 143 memset(&props, 0, sizeof(struct backlight_properties));144 props.type = BACKLIGHT_RAW;145 props.max_brightness = 0xff;146 bl = backlight_device_register("backlight", &sinfo->pdev->dev, sinfo,147 &atmel_lcdc_bl_ops, &props);148 if (IS_ERR(bl)) {149 dev_err(&sinfo->pdev->dev, "error %ld on backlight register\n",150 PTR_ERR(bl));151 return;152 }153 sinfo->backlight = bl;154 155 bl->props.power = FB_BLANK_UNBLANK;156 bl->props.brightness = atmel_bl_get_brightness(bl);157}158 159static void exit_backlight(struct atmel_lcdfb_info *sinfo)160{161 if (!sinfo->backlight)162 return;163 164 if (sinfo->backlight->ops) {165 sinfo->backlight->props.power = FB_BLANK_POWERDOWN;166 sinfo->backlight->ops->update_status(sinfo->backlight);167 }168 backlight_device_unregister(sinfo->backlight);169}170 171#else172 173static void init_backlight(struct atmel_lcdfb_info *sinfo)174{175 dev_warn(&sinfo->pdev->dev, "backlight control is not available\n");176}177 178static void exit_backlight(struct atmel_lcdfb_info *sinfo)179{180}181 182#endif183 184static void init_contrast(struct atmel_lcdfb_info *sinfo)185{186 struct atmel_lcdfb_pdata *pdata = &sinfo->pdata;187 188 /* contrast pwm can be 'inverted' */189 if (pdata->lcdcon_pol_negative)190 contrast_ctr &= ~(ATMEL_LCDC_POL_POSITIVE);191 192 /* have some default contrast/backlight settings */193 lcdc_writel(sinfo, ATMEL_LCDC_CONTRAST_CTR, contrast_ctr);194 lcdc_writel(sinfo, ATMEL_LCDC_CONTRAST_VAL, ATMEL_LCDC_CVAL_DEFAULT);195 196 if (pdata->lcdcon_is_backlight)197 init_backlight(sinfo);198}199 200static inline void atmel_lcdfb_power_control(struct atmel_lcdfb_info *sinfo, int on)201{202 int ret;203 struct atmel_lcdfb_pdata *pdata = &sinfo->pdata;204 205 if (pdata->atmel_lcdfb_power_control)206 pdata->atmel_lcdfb_power_control(pdata, on);207 else if (sinfo->reg_lcd) {208 if (on) {209 ret = regulator_enable(sinfo->reg_lcd);210 if (ret)211 dev_err(&sinfo->pdev->dev,212 "lcd regulator enable failed: %d\n", ret);213 } else {214 ret = regulator_disable(sinfo->reg_lcd);215 if (ret)216 dev_err(&sinfo->pdev->dev,217 "lcd regulator disable failed: %d\n", ret);218 }219 }220}221 222static const struct fb_fix_screeninfo atmel_lcdfb_fix = {223 .type = FB_TYPE_PACKED_PIXELS,224 .visual = FB_VISUAL_TRUECOLOR,225 .xpanstep = 0,226 .ypanstep = 1,227 .ywrapstep = 0,228 .accel = FB_ACCEL_NONE,229};230 231static unsigned long compute_hozval(struct atmel_lcdfb_info *sinfo,232 unsigned long xres)233{234 unsigned long lcdcon2;235 unsigned long value;236 237 if (!sinfo->config->have_hozval)238 return xres;239 240 lcdcon2 = lcdc_readl(sinfo, ATMEL_LCDC_LCDCON2);241 value = xres;242 if ((lcdcon2 & ATMEL_LCDC_DISTYPE) != ATMEL_LCDC_DISTYPE_TFT) {243 /* STN display */244 if ((lcdcon2 & ATMEL_LCDC_DISTYPE) == ATMEL_LCDC_DISTYPE_STNCOLOR) {245 value *= 3;246 }247 if ( (lcdcon2 & ATMEL_LCDC_IFWIDTH) == ATMEL_LCDC_IFWIDTH_4248 || ( (lcdcon2 & ATMEL_LCDC_IFWIDTH) == ATMEL_LCDC_IFWIDTH_8249 && (lcdcon2 & ATMEL_LCDC_SCANMOD) == ATMEL_LCDC_SCANMOD_DUAL ))250 value = DIV_ROUND_UP(value, 4);251 else252 value = DIV_ROUND_UP(value, 8);253 }254 255 return value;256}257 258static void atmel_lcdfb_stop_nowait(struct atmel_lcdfb_info *sinfo)259{260 struct atmel_lcdfb_pdata *pdata = &sinfo->pdata;261 262 /* Turn off the LCD controller and the DMA controller */263 lcdc_writel(sinfo, ATMEL_LCDC_PWRCON,264 pdata->guard_time << ATMEL_LCDC_GUARDT_OFFSET);265 266 /* Wait for the LCDC core to become idle */267 while (lcdc_readl(sinfo, ATMEL_LCDC_PWRCON) & ATMEL_LCDC_BUSY)268 msleep(10);269 270 lcdc_writel(sinfo, ATMEL_LCDC_DMACON, 0);271}272 273static void atmel_lcdfb_stop(struct atmel_lcdfb_info *sinfo)274{275 atmel_lcdfb_stop_nowait(sinfo);276 277 /* Wait for DMA engine to become idle... */278 while (lcdc_readl(sinfo, ATMEL_LCDC_DMACON) & ATMEL_LCDC_DMABUSY)279 msleep(10);280}281 282static void atmel_lcdfb_start(struct atmel_lcdfb_info *sinfo)283{284 struct atmel_lcdfb_pdata *pdata = &sinfo->pdata;285 286 lcdc_writel(sinfo, ATMEL_LCDC_DMACON, pdata->default_dmacon);287 lcdc_writel(sinfo, ATMEL_LCDC_PWRCON,288 (pdata->guard_time << ATMEL_LCDC_GUARDT_OFFSET)289 | ATMEL_LCDC_PWR);290}291 292static void atmel_lcdfb_update_dma(struct fb_info *info,293 struct fb_var_screeninfo *var)294{295 struct atmel_lcdfb_info *sinfo = info->par;296 struct fb_fix_screeninfo *fix = &info->fix;297 unsigned long dma_addr;298 299 dma_addr = (fix->smem_start + var->yoffset * fix->line_length300 + var->xoffset * info->var.bits_per_pixel / 8);301 302 dma_addr &= ~3UL;303 304 /* Set framebuffer DMA base address and pixel offset */305 lcdc_writel(sinfo, ATMEL_LCDC_DMABADDR1, dma_addr);306}307 308static inline void atmel_lcdfb_free_video_memory(struct atmel_lcdfb_info *sinfo)309{310 struct fb_info *info = sinfo->info;311 312 dma_free_wc(info->device, info->fix.smem_len, info->screen_base,313 info->fix.smem_start);314}315 316/**317 * atmel_lcdfb_alloc_video_memory - Allocate framebuffer memory318 * @sinfo: the frame buffer to allocate memory for319 *320 * This function is called only from the atmel_lcdfb_probe()321 * so no locking by fb_info->mm_lock around smem_len setting is needed.322 */323static int atmel_lcdfb_alloc_video_memory(struct atmel_lcdfb_info *sinfo)324{325 struct fb_info *info = sinfo->info;326 struct fb_var_screeninfo *var = &info->var;327 unsigned int smem_len;328 329 smem_len = (var->xres_virtual * var->yres_virtual330 * ((var->bits_per_pixel + 7) / 8));331 info->fix.smem_len = max(smem_len, sinfo->smem_len);332 333 info->screen_base = dma_alloc_wc(info->device, info->fix.smem_len,334 (dma_addr_t *)&info->fix.smem_start,335 GFP_KERNEL);336 337 if (!info->screen_base) {338 return -ENOMEM;339 }340 341 memset(info->screen_base, 0, info->fix.smem_len);342 343 return 0;344}345 346static const struct fb_videomode *atmel_lcdfb_choose_mode(struct fb_var_screeninfo *var,347 struct fb_info *info)348{349 struct fb_videomode varfbmode;350 const struct fb_videomode *fbmode = NULL;351 352 fb_var_to_videomode(&varfbmode, var);353 fbmode = fb_find_nearest_mode(&varfbmode, &info->modelist);354 if (fbmode)355 fb_videomode_to_var(var, fbmode);356 return fbmode;357}358 359 360/**361 * atmel_lcdfb_check_var - Validates a var passed in.362 * @var: frame buffer variable screen structure363 * @info: frame buffer structure that represents a single frame buffer364 *365 * Checks to see if the hardware supports the state requested by366 * var passed in. This function does not alter the hardware367 * state!!! This means the data stored in struct fb_info and368 * struct atmel_lcdfb_info do not change. This includes the var369 * inside of struct fb_info. Do NOT change these. This function370 * can be called on its own if we intent to only test a mode and371 * not actually set it. The stuff in modedb.c is a example of372 * this. If the var passed in is slightly off by what the373 * hardware can support then we alter the var PASSED in to what374 * we can do. If the hardware doesn't support mode change a375 * -EINVAL will be returned by the upper layers. You don't need376 * to implement this function then. If you hardware doesn't377 * support changing the resolution then this function is not378 * needed. In this case the driver would just provide a var that379 * represents the static state the screen is in.380 *381 * Returns negative errno on error, or zero on success.382 */383static int atmel_lcdfb_check_var(struct fb_var_screeninfo *var,384 struct fb_info *info)385{386 struct device *dev = info->device;387 struct atmel_lcdfb_info *sinfo = info->par;388 struct atmel_lcdfb_pdata *pdata = &sinfo->pdata;389 unsigned long clk_value_khz;390 391 clk_value_khz = clk_get_rate(sinfo->lcdc_clk) / 1000;392 393 dev_dbg(dev, "%s:\n", __func__);394 395 if (!(var->pixclock && var->bits_per_pixel)) {396 /* choose a suitable mode if possible */397 if (!atmel_lcdfb_choose_mode(var, info)) {398 dev_err(dev, "needed value not specified\n");399 return -EINVAL;400 }401 }402 403 dev_dbg(dev, " resolution: %ux%u\n", var->xres, var->yres);404 dev_dbg(dev, " pixclk: %lu KHz\n", PICOS2KHZ(var->pixclock));405 dev_dbg(dev, " bpp: %u\n", var->bits_per_pixel);406 dev_dbg(dev, " clk: %lu KHz\n", clk_value_khz);407 408 if (PICOS2KHZ(var->pixclock) > clk_value_khz) {409 dev_err(dev, "%lu KHz pixel clock is too fast\n", PICOS2KHZ(var->pixclock));410 return -EINVAL;411 }412 413 /* Do not allow to have real resoulution larger than virtual */414 if (var->xres > var->xres_virtual)415 var->xres_virtual = var->xres;416 417 if (var->yres > var->yres_virtual)418 var->yres_virtual = var->yres;419 420 /* Force same alignment for each line */421 var->xres = (var->xres + 3) & ~3UL;422 var->xres_virtual = (var->xres_virtual + 3) & ~3UL;423 424 var->red.msb_right = var->green.msb_right = var->blue.msb_right = 0;425 var->transp.msb_right = 0;426 var->transp.offset = var->transp.length = 0;427 var->xoffset = var->yoffset = 0;428 429 if (info->fix.smem_len) {430 unsigned int smem_len = (var->xres_virtual * var->yres_virtual431 * ((var->bits_per_pixel + 7) / 8));432 if (smem_len > info->fix.smem_len) {433 dev_err(dev, "Frame buffer is too small (%u) for screen size (need at least %u)\n",434 info->fix.smem_len, smem_len);435 return -EINVAL;436 }437 }438 439 /* Saturate vertical and horizontal timings at maximum values */440 var->vsync_len = min_t(u32, var->vsync_len,441 (ATMEL_LCDC_VPW >> ATMEL_LCDC_VPW_OFFSET) + 1);442 var->upper_margin = min_t(u32, var->upper_margin,443 ATMEL_LCDC_VBP >> ATMEL_LCDC_VBP_OFFSET);444 var->lower_margin = min_t(u32, var->lower_margin,445 ATMEL_LCDC_VFP);446 var->right_margin = min_t(u32, var->right_margin,447 (ATMEL_LCDC_HFP >> ATMEL_LCDC_HFP_OFFSET) + 1);448 var->hsync_len = min_t(u32, var->hsync_len,449 (ATMEL_LCDC_HPW >> ATMEL_LCDC_HPW_OFFSET) + 1);450 var->left_margin = min_t(u32, var->left_margin,451 ATMEL_LCDC_HBP + 1);452 453 /* Some parameters can't be zero */454 var->vsync_len = max_t(u32, var->vsync_len, 1);455 var->right_margin = max_t(u32, var->right_margin, 1);456 var->hsync_len = max_t(u32, var->hsync_len, 1);457 var->left_margin = max_t(u32, var->left_margin, 1);458 459 switch (var->bits_per_pixel) {460 case 1:461 case 2:462 case 4:463 case 8:464 var->red.offset = var->green.offset = var->blue.offset = 0;465 var->red.length = var->green.length = var->blue.length466 = var->bits_per_pixel;467 break;468 case 16:469 /* Older SOCs use IBGR:555 rather than BGR:565. */470 if (sinfo->config->have_intensity_bit)471 var->green.length = 5;472 else473 var->green.length = 6;474 475 if (pdata->lcd_wiring_mode == ATMEL_LCDC_WIRING_RGB) {476 /* RGB:5X5 mode */477 var->red.offset = var->green.length + 5;478 var->blue.offset = 0;479 } else {480 /* BGR:5X5 mode */481 var->red.offset = 0;482 var->blue.offset = var->green.length + 5;483 }484 var->green.offset = 5;485 var->red.length = var->blue.length = 5;486 break;487 case 32:488 var->transp.offset = 24;489 var->transp.length = 8;490 fallthrough;491 case 24:492 if (pdata->lcd_wiring_mode == ATMEL_LCDC_WIRING_RGB) {493 /* RGB:888 mode */494 var->red.offset = 16;495 var->blue.offset = 0;496 } else {497 /* BGR:888 mode */498 var->red.offset = 0;499 var->blue.offset = 16;500 }501 var->green.offset = 8;502 var->red.length = var->green.length = var->blue.length = 8;503 break;504 default:505 dev_err(dev, "color depth %d not supported\n",506 var->bits_per_pixel);507 return -EINVAL;508 }509 510 return 0;511}512 513/*514 * LCD reset sequence515 */516static void atmel_lcdfb_reset(struct atmel_lcdfb_info *sinfo)517{518 might_sleep();519 520 atmel_lcdfb_stop(sinfo);521 atmel_lcdfb_start(sinfo);522}523 524/**525 * atmel_lcdfb_set_par - Alters the hardware state.526 * @info: frame buffer structure that represents a single frame buffer527 *528 * Using the fb_var_screeninfo in fb_info we set the resolution529 * of the this particular framebuffer. This function alters the530 * par AND the fb_fix_screeninfo stored in fb_info. It doesn't531 * not alter var in fb_info since we are using that data. This532 * means we depend on the data in var inside fb_info to be533 * supported by the hardware. atmel_lcdfb_check_var is always called534 * before atmel_lcdfb_set_par to ensure this. Again if you can't535 * change the resolution you don't need this function.536 *537 */538static int atmel_lcdfb_set_par(struct fb_info *info)539{540 struct atmel_lcdfb_info *sinfo = info->par;541 struct atmel_lcdfb_pdata *pdata = &sinfo->pdata;542 unsigned long hozval_linesz;543 unsigned long value;544 unsigned long clk_value_khz;545 unsigned long bits_per_line;546 unsigned long pix_factor = 2;547 548 might_sleep();549 550 dev_dbg(info->device, "%s:\n", __func__);551 dev_dbg(info->device, " * resolution: %ux%u (%ux%u virtual)\n",552 info->var.xres, info->var.yres,553 info->var.xres_virtual, info->var.yres_virtual);554 555 atmel_lcdfb_stop_nowait(sinfo);556 557 if (info->var.bits_per_pixel == 1)558 info->fix.visual = FB_VISUAL_MONO01;559 else if (info->var.bits_per_pixel <= 8)560 info->fix.visual = FB_VISUAL_PSEUDOCOLOR;561 else562 info->fix.visual = FB_VISUAL_TRUECOLOR;563 564 bits_per_line = info->var.xres_virtual * info->var.bits_per_pixel;565 info->fix.line_length = DIV_ROUND_UP(bits_per_line, 8);566 567 /* Re-initialize the DMA engine... */568 dev_dbg(info->device, " * update DMA engine\n");569 atmel_lcdfb_update_dma(info, &info->var);570 571 /* ...set frame size and burst length = 8 words (?) */572 value = (info->var.yres * info->var.xres * info->var.bits_per_pixel) / 32;573 value |= ((ATMEL_LCDC_DMA_BURST_LEN - 1) << ATMEL_LCDC_BLENGTH_OFFSET);574 lcdc_writel(sinfo, ATMEL_LCDC_DMAFRMCFG, value);575 576 /* Now, the LCDC core... */577 578 /* Set pixel clock */579 if (sinfo->config->have_alt_pixclock)580 pix_factor = 1;581 582 clk_value_khz = clk_get_rate(sinfo->lcdc_clk) / 1000;583 584 value = DIV_ROUND_UP(clk_value_khz, PICOS2KHZ(info->var.pixclock));585 586 if (value < pix_factor) {587 dev_notice(info->device, "Bypassing pixel clock divider\n");588 lcdc_writel(sinfo, ATMEL_LCDC_LCDCON1, ATMEL_LCDC_BYPASS);589 } else {590 value = (value / pix_factor) - 1;591 dev_dbg(info->device, " * programming CLKVAL = 0x%08lx\n",592 value);593 lcdc_writel(sinfo, ATMEL_LCDC_LCDCON1,594 value << ATMEL_LCDC_CLKVAL_OFFSET);595 info->var.pixclock =596 KHZ2PICOS(clk_value_khz / (pix_factor * (value + 1)));597 dev_dbg(info->device, " updated pixclk: %lu KHz\n",598 PICOS2KHZ(info->var.pixclock));599 }600 601 602 /* Initialize control register 2 */603 value = pdata->default_lcdcon2;604 605 if (!(info->var.sync & FB_SYNC_HOR_HIGH_ACT))606 value |= ATMEL_LCDC_INVLINE_INVERTED;607 if (!(info->var.sync & FB_SYNC_VERT_HIGH_ACT))608 value |= ATMEL_LCDC_INVFRAME_INVERTED;609 610 switch (info->var.bits_per_pixel) {611 case 1: value |= ATMEL_LCDC_PIXELSIZE_1; break;612 case 2: value |= ATMEL_LCDC_PIXELSIZE_2; break;613 case 4: value |= ATMEL_LCDC_PIXELSIZE_4; break;614 case 8: value |= ATMEL_LCDC_PIXELSIZE_8; break;615 case 15: fallthrough;616 case 16: value |= ATMEL_LCDC_PIXELSIZE_16; break;617 case 24: value |= ATMEL_LCDC_PIXELSIZE_24; break;618 case 32: value |= ATMEL_LCDC_PIXELSIZE_32; break;619 default: BUG(); break;620 }621 dev_dbg(info->device, " * LCDCON2 = %08lx\n", value);622 lcdc_writel(sinfo, ATMEL_LCDC_LCDCON2, value);623 624 /* Vertical timing */625 value = (info->var.vsync_len - 1) << ATMEL_LCDC_VPW_OFFSET;626 value |= info->var.upper_margin << ATMEL_LCDC_VBP_OFFSET;627 value |= info->var.lower_margin;628 dev_dbg(info->device, " * LCDTIM1 = %08lx\n", value);629 lcdc_writel(sinfo, ATMEL_LCDC_TIM1, value);630 631 /* Horizontal timing */632 value = (info->var.right_margin - 1) << ATMEL_LCDC_HFP_OFFSET;633 value |= (info->var.hsync_len - 1) << ATMEL_LCDC_HPW_OFFSET;634 value |= (info->var.left_margin - 1);635 dev_dbg(info->device, " * LCDTIM2 = %08lx\n", value);636 lcdc_writel(sinfo, ATMEL_LCDC_TIM2, value);637 638 /* Horizontal value (aka line size) */639 hozval_linesz = compute_hozval(sinfo, info->var.xres);640 641 /* Display size */642 value = (hozval_linesz - 1) << ATMEL_LCDC_HOZVAL_OFFSET;643 value |= info->var.yres - 1;644 dev_dbg(info->device, " * LCDFRMCFG = %08lx\n", value);645 lcdc_writel(sinfo, ATMEL_LCDC_LCDFRMCFG, value);646 647 /* FIFO Threshold: Use formula from data sheet */648 value = ATMEL_LCDC_FIFO_SIZE - (2 * ATMEL_LCDC_DMA_BURST_LEN + 3);649 lcdc_writel(sinfo, ATMEL_LCDC_FIFO, value);650 651 /* Toggle LCD_MODE every frame */652 lcdc_writel(sinfo, ATMEL_LCDC_MVAL, 0);653 654 /* Disable all interrupts */655 lcdc_writel(sinfo, ATMEL_LCDC_IDR, ~0U);656 /* Enable FIFO & DMA errors */657 lcdc_writel(sinfo, ATMEL_LCDC_IER, ATMEL_LCDC_UFLWI | ATMEL_LCDC_OWRI | ATMEL_LCDC_MERI);658 659 /* ...wait for DMA engine to become idle... */660 while (lcdc_readl(sinfo, ATMEL_LCDC_DMACON) & ATMEL_LCDC_DMABUSY)661 msleep(10);662 663 atmel_lcdfb_start(sinfo);664 665 dev_dbg(info->device, " * DONE\n");666 667 return 0;668}669 670static inline unsigned int chan_to_field(unsigned int chan, const struct fb_bitfield *bf)671{672 chan &= 0xffff;673 chan >>= 16 - bf->length;674 return chan << bf->offset;675}676 677/**678 * atmel_lcdfb_setcolreg - Optional function. Sets a color register.679 * @regno: Which register in the CLUT we are programming680 * @red: The red value which can be up to 16 bits wide681 * @green: The green value which can be up to 16 bits wide682 * @blue: The blue value which can be up to 16 bits wide.683 * @transp: If supported the alpha value which can be up to 16 bits wide.684 * @info: frame buffer info structure685 *686 * Set a single color register. The values supplied have a 16 bit687 * magnitude which needs to be scaled in this function for the hardware.688 * Things to take into consideration are how many color registers, if689 * any, are supported with the current color visual. With truecolor mode690 * no color palettes are supported. Here a pseudo palette is created691 * which we store the value in pseudo_palette in struct fb_info. For692 * pseudocolor mode we have a limited color palette. To deal with this693 * we can program what color is displayed for a particular pixel value.694 * DirectColor is similar in that we can program each color field. If695 * we have a static colormap we don't need to implement this function.696 *697 * Returns negative errno on error, or zero on success. In an698 * ideal world, this would have been the case, but as it turns699 * out, the other drivers return 1 on failure, so that's what700 * we're going to do.701 */702static int atmel_lcdfb_setcolreg(unsigned int regno, unsigned int red,703 unsigned int green, unsigned int blue,704 unsigned int transp, struct fb_info *info)705{706 struct atmel_lcdfb_info *sinfo = info->par;707 struct atmel_lcdfb_pdata *pdata = &sinfo->pdata;708 unsigned int val;709 u32 *pal;710 int ret = 1;711 712 if (info->var.grayscale)713 red = green = blue = (19595 * red + 38470 * green714 + 7471 * blue) >> 16;715 716 switch (info->fix.visual) {717 case FB_VISUAL_TRUECOLOR:718 if (regno < 16) {719 pal = info->pseudo_palette;720 721 val = chan_to_field(red, &info->var.red);722 val |= chan_to_field(green, &info->var.green);723 val |= chan_to_field(blue, &info->var.blue);724 725 pal[regno] = val;726 ret = 0;727 }728 break;729 730 case FB_VISUAL_PSEUDOCOLOR:731 if (regno < 256) {732 if (sinfo->config->have_intensity_bit) {733 /* old style I+BGR:555 */734 val = ((red >> 11) & 0x001f);735 val |= ((green >> 6) & 0x03e0);736 val |= ((blue >> 1) & 0x7c00);737 738 /*739 * TODO: intensity bit. Maybe something like740 * ~(red[10] ^ green[10] ^ blue[10]) & 1741 */742 } else {743 /* new style BGR:565 / RGB:565 */744 if (pdata->lcd_wiring_mode == ATMEL_LCDC_WIRING_RGB) {745 val = ((blue >> 11) & 0x001f);746 val |= ((red >> 0) & 0xf800);747 } else {748 val = ((red >> 11) & 0x001f);749 val |= ((blue >> 0) & 0xf800);750 }751 752 val |= ((green >> 5) & 0x07e0);753 }754 755 lcdc_writel(sinfo, ATMEL_LCDC_LUT(regno), val);756 ret = 0;757 }758 break;759 760 case FB_VISUAL_MONO01:761 if (regno < 2) {762 val = (regno == 0) ? 0x00 : 0x1F;763 lcdc_writel(sinfo, ATMEL_LCDC_LUT(regno), val);764 ret = 0;765 }766 break;767 768 }769 770 return ret;771}772 773static int atmel_lcdfb_pan_display(struct fb_var_screeninfo *var,774 struct fb_info *info)775{776 dev_dbg(info->device, "%s\n", __func__);777 778 atmel_lcdfb_update_dma(info, var);779 780 return 0;781}782 783static int atmel_lcdfb_blank(int blank_mode, struct fb_info *info)784{785 struct atmel_lcdfb_info *sinfo = info->par;786 787 switch (blank_mode) {788 case FB_BLANK_UNBLANK:789 case FB_BLANK_NORMAL:790 atmel_lcdfb_start(sinfo);791 break;792 case FB_BLANK_VSYNC_SUSPEND:793 case FB_BLANK_HSYNC_SUSPEND:794 break;795 case FB_BLANK_POWERDOWN:796 atmel_lcdfb_stop(sinfo);797 break;798 default:799 return -EINVAL;800 }801 802 /* let fbcon do a soft blank for us */803 return ((blank_mode == FB_BLANK_NORMAL) ? 1 : 0);804}805 806static const struct fb_ops atmel_lcdfb_ops = {807 .owner = THIS_MODULE,808 FB_DEFAULT_IOMEM_OPS,809 .fb_check_var = atmel_lcdfb_check_var,810 .fb_set_par = atmel_lcdfb_set_par,811 .fb_setcolreg = atmel_lcdfb_setcolreg,812 .fb_blank = atmel_lcdfb_blank,813 .fb_pan_display = atmel_lcdfb_pan_display,814};815 816static irqreturn_t atmel_lcdfb_interrupt(int irq, void *dev_id)817{818 struct fb_info *info = dev_id;819 struct atmel_lcdfb_info *sinfo = info->par;820 u32 status;821 822 status = lcdc_readl(sinfo, ATMEL_LCDC_ISR);823 if (status & ATMEL_LCDC_UFLWI) {824 dev_warn(info->device, "FIFO underflow %#x\n", status);825 /* reset DMA and FIFO to avoid screen shifting */826 schedule_work(&sinfo->task);827 }828 lcdc_writel(sinfo, ATMEL_LCDC_ICR, status);829 return IRQ_HANDLED;830}831 832/*833 * LCD controller task (to reset the LCD)834 */835static void atmel_lcdfb_task(struct work_struct *work)836{837 struct atmel_lcdfb_info *sinfo =838 container_of(work, struct atmel_lcdfb_info, task);839 840 atmel_lcdfb_reset(sinfo);841}842 843static int atmel_lcdfb_init_fbinfo(struct atmel_lcdfb_info *sinfo)844{845 struct fb_info *info = sinfo->info;846 int ret = 0;847 848 info->var.activate |= FB_ACTIVATE_FORCE | FB_ACTIVATE_NOW;849 850 dev_info(info->device,851 "%luKiB frame buffer at %08lx (mapped at %p)\n",852 (unsigned long)info->fix.smem_len / 1024,853 (unsigned long)info->fix.smem_start,854 info->screen_base);855 856 /* Allocate colormap */857 ret = fb_alloc_cmap(&info->cmap, 256, 0);858 if (ret < 0)859 dev_err(info->device, "Alloc color map failed\n");860 861 return ret;862}863 864static void atmel_lcdfb_start_clock(struct atmel_lcdfb_info *sinfo)865{866 clk_prepare_enable(sinfo->bus_clk);867 clk_prepare_enable(sinfo->lcdc_clk);868}869 870static void atmel_lcdfb_stop_clock(struct atmel_lcdfb_info *sinfo)871{872 clk_disable_unprepare(sinfo->bus_clk);873 clk_disable_unprepare(sinfo->lcdc_clk);874}875 876static const struct of_device_id atmel_lcdfb_dt_ids[] = {877 { .compatible = "atmel,at91sam9261-lcdc" , .data = &at91sam9261_config, },878 { .compatible = "atmel,at91sam9263-lcdc" , .data = &at91sam9263_config, },879 { .compatible = "atmel,at91sam9g10-lcdc" , .data = &at91sam9g10_config, },880 { .compatible = "atmel,at91sam9g45-lcdc" , .data = &at91sam9g45_config, },881 { .compatible = "atmel,at91sam9g45es-lcdc" , .data = &at91sam9g45es_config, },882 { .compatible = "atmel,at91sam9rl-lcdc" , .data = &at91sam9rl_config, },883 { /* sentinel */ }884};885 886MODULE_DEVICE_TABLE(of, atmel_lcdfb_dt_ids);887 888static const char *atmel_lcdfb_wiring_modes[] = {889 [ATMEL_LCDC_WIRING_BGR] = "BRG",890 [ATMEL_LCDC_WIRING_RGB] = "RGB",891};892 893static int atmel_lcdfb_get_of_wiring_modes(struct device_node *np)894{895 const char *mode;896 int err, i;897 898 err = of_property_read_string(np, "atmel,lcd-wiring-mode", &mode);899 if (err < 0)900 return ATMEL_LCDC_WIRING_BGR;901 902 for (i = 0; i < ARRAY_SIZE(atmel_lcdfb_wiring_modes); i++)903 if (!strcasecmp(mode, atmel_lcdfb_wiring_modes[i]))904 return i;905 906 return -ENODEV;907}908 909static void atmel_lcdfb_power_control_gpio(struct atmel_lcdfb_pdata *pdata, int on)910{911 struct atmel_lcdfb_power_ctrl_gpio *og;912 913 list_for_each_entry(og, &pdata->pwr_gpios, list)914 gpiod_set_value(og->gpiod, on);915}916 917static int atmel_lcdfb_of_init(struct atmel_lcdfb_info *sinfo)918{919 struct fb_info *info = sinfo->info;920 struct atmel_lcdfb_pdata *pdata = &sinfo->pdata;921 struct fb_var_screeninfo *var = &info->var;922 struct device *dev = &sinfo->pdev->dev;923 struct device_node *np =dev->of_node;924 struct device_node *display_np;925 struct atmel_lcdfb_power_ctrl_gpio *og;926 bool is_gpio_power = false;927 struct fb_videomode fb_vm;928 struct gpio_desc *gpiod;929 struct videomode vm;930 int ret;931 int i;932 933 sinfo->config = (struct atmel_lcdfb_config*)934 of_match_device(atmel_lcdfb_dt_ids, dev)->data;935 936 display_np = of_parse_phandle(np, "display", 0);937 if (!display_np) {938 dev_err(dev, "failed to find display phandle\n");939 return -ENOENT;940 }941 942 ret = of_property_read_u32(display_np, "bits-per-pixel", &var->bits_per_pixel);943 if (ret < 0) {944 dev_err(dev, "failed to get property bits-per-pixel\n");945 goto put_display_node;946 }947 948 ret = of_property_read_u32(display_np, "atmel,guard-time", &pdata->guard_time);949 if (ret < 0) {950 dev_err(dev, "failed to get property atmel,guard-time\n");951 goto put_display_node;952 }953 954 ret = of_property_read_u32(display_np, "atmel,lcdcon2", &pdata->default_lcdcon2);955 if (ret < 0) {956 dev_err(dev, "failed to get property atmel,lcdcon2\n");957 goto put_display_node;958 }959 960 ret = of_property_read_u32(display_np, "atmel,dmacon", &pdata->default_dmacon);961 if (ret < 0) {962 dev_err(dev, "failed to get property bits-per-pixel\n");963 goto put_display_node;964 }965 966 INIT_LIST_HEAD(&pdata->pwr_gpios);967 for (i = 0; i < gpiod_count(dev, "atmel,power-control"); i++) {968 ret = -ENOMEM;969 gpiod = devm_gpiod_get_index(dev, "atmel,power-control",970 i, GPIOD_ASIS);971 if (IS_ERR(gpiod))972 continue;973 974 og = devm_kzalloc(dev, sizeof(*og), GFP_KERNEL);975 if (!og)976 goto put_display_node;977 978 og->gpiod = gpiod;979 is_gpio_power = true;980 981 ret = gpiod_direction_output(gpiod, gpiod_is_active_low(gpiod));982 if (ret) {983 dev_err(dev, "set direction output gpio atmel,power-control[%d] failed\n", i);984 goto put_display_node;985 }986 list_add(&og->list, &pdata->pwr_gpios);987 }988 989 if (is_gpio_power)990 pdata->atmel_lcdfb_power_control = atmel_lcdfb_power_control_gpio;991 992 ret = atmel_lcdfb_get_of_wiring_modes(display_np);993 if (ret < 0) {994 dev_err(dev, "invalid atmel,lcd-wiring-mode\n");995 goto put_display_node;996 }997 pdata->lcd_wiring_mode = ret;998 999 pdata->lcdcon_is_backlight = of_property_read_bool(display_np, "atmel,lcdcon-backlight");1000 pdata->lcdcon_pol_negative = of_property_read_bool(display_np, "atmel,lcdcon-backlight-inverted");1001 1002 ret = of_get_videomode(display_np, &vm, OF_USE_NATIVE_MODE);1003 if (ret) {1004 dev_err(dev, "failed to get videomode from DT\n");1005 goto put_display_node;1006 }1007 1008 ret = fb_videomode_from_videomode(&vm, &fb_vm);1009 if (ret < 0)1010 goto put_display_node;1011 1012 fb_add_videomode(&fb_vm, &info->modelist);1013 1014put_display_node:1015 of_node_put(display_np);1016 return ret;1017}1018 1019static int atmel_lcdfb_probe(struct platform_device *pdev)1020{1021 struct device *dev = &pdev->dev;1022 struct fb_info *info;1023 struct atmel_lcdfb_info *sinfo;1024 struct resource *regs = NULL;1025 struct resource *map = NULL;1026 struct fb_modelist *modelist;1027 int ret;1028 1029 dev_dbg(dev, "%s BEGIN\n", __func__);1030 1031 ret = -ENOMEM;1032 info = framebuffer_alloc(sizeof(struct atmel_lcdfb_info), dev);1033 if (!info)1034 goto out;1035 1036 sinfo = info->par;1037 sinfo->pdev = pdev;1038 sinfo->info = info;1039 1040 INIT_LIST_HEAD(&info->modelist);1041 1042 if (!pdev->dev.of_node) {1043 dev_err(dev, "cannot get default configuration\n");1044 goto free_info;1045 }1046 1047 ret = atmel_lcdfb_of_init(sinfo);1048 if (ret)1049 goto free_info;1050 1051 ret = -ENODEV;1052 if (!sinfo->config)1053 goto free_info;1054 1055 sinfo->reg_lcd = devm_regulator_get(&pdev->dev, "lcd");1056 if (IS_ERR(sinfo->reg_lcd))1057 sinfo->reg_lcd = NULL;1058 1059 info->flags = FBINFO_PARTIAL_PAN_OK |1060 FBINFO_HWACCEL_YPAN;1061 info->pseudo_palette = sinfo->pseudo_palette;1062 info->fbops = &atmel_lcdfb_ops;1063 1064 info->fix = atmel_lcdfb_fix;1065 strcpy(info->fix.id, sinfo->pdev->name);1066 1067 /* Enable LCDC Clocks */1068 sinfo->bus_clk = clk_get(dev, "hclk");1069 if (IS_ERR(sinfo->bus_clk)) {1070 ret = PTR_ERR(sinfo->bus_clk);1071 goto free_info;1072 }1073 sinfo->lcdc_clk = clk_get(dev, "lcdc_clk");1074 if (IS_ERR(sinfo->lcdc_clk)) {1075 ret = PTR_ERR(sinfo->lcdc_clk);1076 goto put_bus_clk;1077 }1078 atmel_lcdfb_start_clock(sinfo);1079 1080 modelist = list_first_entry(&info->modelist,1081 struct fb_modelist, list);1082 fb_videomode_to_var(&info->var, &modelist->mode);1083 1084 atmel_lcdfb_check_var(&info->var, info);1085 1086 regs = platform_get_resource(pdev, IORESOURCE_MEM, 0);1087 if (!regs) {1088 dev_err(dev, "resources unusable\n");1089 ret = -ENXIO;1090 goto stop_clk;1091 }1092 1093 sinfo->irq_base = platform_get_irq(pdev, 0);1094 if (sinfo->irq_base < 0) {1095 ret = sinfo->irq_base;1096 goto stop_clk;1097 }1098 1099 /* Initialize video memory */1100 map = platform_get_resource(pdev, IORESOURCE_MEM, 1);1101 if (map) {1102 /* use a pre-allocated memory buffer */1103 info->fix.smem_start = map->start;1104 info->fix.smem_len = resource_size(map);1105 if (!request_mem_region(info->fix.smem_start,1106 info->fix.smem_len, pdev->name)) {1107 ret = -EBUSY;1108 goto stop_clk;1109 }1110 1111 info->screen_base = ioremap_wc(info->fix.smem_start,1112 info->fix.smem_len);1113 if (!info->screen_base) {1114 ret = -ENOMEM;1115 goto release_intmem;1116 }1117 1118 /*1119 * Don't clear the framebuffer -- someone may have set1120 * up a splash image.1121 */1122 } else {1123 /* allocate memory buffer */1124 ret = atmel_lcdfb_alloc_video_memory(sinfo);1125 if (ret < 0) {1126 dev_err(dev, "cannot allocate framebuffer: %d\n", ret);1127 goto stop_clk;1128 }1129 }1130 1131 /* LCDC registers */1132 info->fix.mmio_start = regs->start;1133 info->fix.mmio_len = resource_size(regs);1134 1135 if (!request_mem_region(info->fix.mmio_start,1136 info->fix.mmio_len, pdev->name)) {1137 ret = -EBUSY;1138 goto free_fb;1139 }1140 1141 sinfo->mmio = ioremap(info->fix.mmio_start, info->fix.mmio_len);1142 if (!sinfo->mmio) {1143 dev_err(dev, "cannot map LCDC registers\n");1144 ret = -ENOMEM;1145 goto release_mem;1146 }1147 1148 /* Initialize PWM for contrast or backlight ("off") */1149 init_contrast(sinfo);1150 1151 /* interrupt */1152 ret = request_irq(sinfo->irq_base, atmel_lcdfb_interrupt, 0, pdev->name, info);1153 if (ret) {1154 dev_err(dev, "request_irq failed: %d\n", ret);1155 goto unmap_mmio;1156 }1157 1158 /* Some operations on the LCDC might sleep and1159 * require a preemptible task context */1160 INIT_WORK(&sinfo->task, atmel_lcdfb_task);1161 1162 ret = atmel_lcdfb_init_fbinfo(sinfo);1163 if (ret < 0) {1164 dev_err(dev, "init fbinfo failed: %d\n", ret);1165 goto unregister_irqs;1166 }1167 1168 ret = atmel_lcdfb_set_par(info);1169 if (ret < 0) {1170 dev_err(dev, "set par failed: %d\n", ret);1171 goto unregister_irqs;1172 }1173 1174 dev_set_drvdata(dev, info);1175 1176 /*1177 * Tell the world that we're ready to go1178 */1179 ret = register_framebuffer(info);1180 if (ret < 0) {1181 dev_err(dev, "failed to register framebuffer device: %d\n", ret);1182 goto reset_drvdata;1183 }1184 1185 /* Power up the LCDC screen */1186 atmel_lcdfb_power_control(sinfo, 1);1187 1188 dev_info(dev, "fb%d: Atmel LCDC at 0x%08lx (mapped at %p), irq %d\n",1189 info->node, info->fix.mmio_start, sinfo->mmio, sinfo->irq_base);1190 1191 return 0;1192 1193reset_drvdata:1194 dev_set_drvdata(dev, NULL);1195 fb_dealloc_cmap(&info->cmap);1196unregister_irqs:1197 cancel_work_sync(&sinfo->task);1198 free_irq(sinfo->irq_base, info);1199unmap_mmio:1200 exit_backlight(sinfo);1201 iounmap(sinfo->mmio);1202release_mem:1203 release_mem_region(info->fix.mmio_start, info->fix.mmio_len);1204free_fb:1205 if (map)1206 iounmap(info->screen_base);1207 else1208 atmel_lcdfb_free_video_memory(sinfo);1209 1210release_intmem:1211 if (map)1212 release_mem_region(info->fix.smem_start, info->fix.smem_len);1213stop_clk:1214 atmel_lcdfb_stop_clock(sinfo);1215 clk_put(sinfo->lcdc_clk);1216put_bus_clk:1217 clk_put(sinfo->bus_clk);1218free_info:1219 framebuffer_release(info);1220out:1221 dev_dbg(dev, "%s FAILED\n", __func__);1222 return ret;1223}1224 1225static void atmel_lcdfb_remove(struct platform_device *pdev)1226{1227 struct device *dev = &pdev->dev;1228 struct fb_info *info = dev_get_drvdata(dev);1229 struct atmel_lcdfb_info *sinfo;1230 1231 if (!info || !info->par)1232 return;1233 sinfo = info->par;1234 1235 cancel_work_sync(&sinfo->task);1236 exit_backlight(sinfo);1237 atmel_lcdfb_power_control(sinfo, 0);1238 unregister_framebuffer(info);1239 atmel_lcdfb_stop_clock(sinfo);1240 clk_put(sinfo->lcdc_clk);1241 clk_put(sinfo->bus_clk);1242 fb_dealloc_cmap(&info->cmap);1243 free_irq(sinfo->irq_base, info);1244 iounmap(sinfo->mmio);1245 release_mem_region(info->fix.mmio_start, info->fix.mmio_len);1246 if (platform_get_resource(pdev, IORESOURCE_MEM, 1)) {1247 iounmap(info->screen_base);1248 release_mem_region(info->fix.smem_start, info->fix.smem_len);1249 } else {1250 atmel_lcdfb_free_video_memory(sinfo);1251 }1252 1253 framebuffer_release(info);1254}1255 1256#ifdef CONFIG_PM1257 1258static int atmel_lcdfb_suspend(struct platform_device *pdev, pm_message_t mesg)1259{1260 struct fb_info *info = platform_get_drvdata(pdev);1261 struct atmel_lcdfb_info *sinfo = info->par;1262 1263 /*1264 * We don't want to handle interrupts while the clock is1265 * stopped. It may take forever.1266 */1267 lcdc_writel(sinfo, ATMEL_LCDC_IDR, ~0U);1268 1269 sinfo->saved_lcdcon = lcdc_readl(sinfo, ATMEL_LCDC_CONTRAST_CTR);1270 lcdc_writel(sinfo, ATMEL_LCDC_CONTRAST_CTR, 0);1271 atmel_lcdfb_power_control(sinfo, 0);1272 atmel_lcdfb_stop(sinfo);1273 atmel_lcdfb_stop_clock(sinfo);1274 1275 return 0;1276}1277 1278static int atmel_lcdfb_resume(struct platform_device *pdev)1279{1280 struct fb_info *info = platform_get_drvdata(pdev);1281 struct atmel_lcdfb_info *sinfo = info->par;1282 1283 atmel_lcdfb_start_clock(sinfo);1284 atmel_lcdfb_start(sinfo);1285 atmel_lcdfb_power_control(sinfo, 1);1286 lcdc_writel(sinfo, ATMEL_LCDC_CONTRAST_CTR, sinfo->saved_lcdcon);1287 1288 /* Enable FIFO & DMA errors */1289 lcdc_writel(sinfo, ATMEL_LCDC_IER, ATMEL_LCDC_UFLWI1290 | ATMEL_LCDC_OWRI | ATMEL_LCDC_MERI);1291 1292 return 0;1293}1294 1295#else1296#define atmel_lcdfb_suspend NULL1297#define atmel_lcdfb_resume NULL1298#endif1299 1300static struct platform_driver atmel_lcdfb_driver = {1301 .probe = atmel_lcdfb_probe,1302 .remove = atmel_lcdfb_remove,1303 .suspend = atmel_lcdfb_suspend,1304 .resume = atmel_lcdfb_resume,1305 .driver = {1306 .name = "atmel_lcdfb",1307 .of_match_table = atmel_lcdfb_dt_ids,1308 },1309};1310module_platform_driver(atmel_lcdfb_driver);1311 1312MODULE_DESCRIPTION("AT91 LCD Controller framebuffer driver");1313MODULE_AUTHOR("Nicolas Ferre <nicolas.ferre@atmel.com>");1314MODULE_LICENSE("GPL");1315