1019 lines · c
1/*2 * controlfb.c -- frame buffer device for the PowerMac 'control' display3 *4 * Created 12 July 1998 by Dan Jacobowitz <dan@debian.org>5 * Copyright (C) 1998 Dan Jacobowitz6 * Copyright (C) 2001 Takashi Oe7 *8 * Mmap code by Michel Lanners <mlan@cpu.lu>9 *10 * Frame buffer structure from:11 * drivers/video/chipsfb.c -- frame buffer device for12 * Chips & Technologies 65550 chip.13 *14 * Copyright (C) 1998 Paul Mackerras15 *16 * This file is derived from the Powermac "chips" driver:17 * Copyright (C) 1997 Fabio Riccardi.18 * And from the frame buffer device for Open Firmware-initialized devices:19 * Copyright (C) 1997 Geert Uytterhoeven.20 *21 * Hardware information from:22 * control.c: Console support for PowerMac "control" display adaptor.23 * Copyright (C) 1996 Paul Mackerras24 *25 * Updated to 2.5 framebuffer API by Ben Herrenschmidt26 * <benh@kernel.crashing.org>, Paul Mackerras <paulus@samba.org>,27 * and James Simmons <jsimmons@infradead.org>.28 *29 * This file is subject to the terms and conditions of the GNU General Public30 * License. See the file COPYING in the main directory of this archive for31 * more details.32 */33 34#include <linux/kernel.h>35#include <linux/errno.h>36#include <linux/string.h>37#include <linux/mm.h>38#include <linux/slab.h>39#include <linux/vmalloc.h>40#include <linux/delay.h>41#include <linux/interrupt.h>42#include <linux/of.h>43#include <linux/of_address.h>44#include <linux/fb.h>45#include <linux/init.h>46#include <linux/pci.h>47#include <linux/nvram.h>48#include <linux/adb.h>49#include <linux/cuda.h>50#ifdef CONFIG_BOOTX_TEXT51#include <asm/btext.h>52#endif53 54#include "macmodes.h"55#include "controlfb.h"56 57#if !defined(CONFIG_PPC_PMAC) || !defined(CONFIG_PPC32)58#define invalid_vram_cache(addr)59#undef in_860#undef out_861#undef in_le3262#undef out_le3263#define in_8(addr) 064#define out_8(addr, val) (void)(val)65#define in_le32(addr) 066#define out_le32(addr, val) (void)(val)67#ifndef pgprot_cached_wthru68#define pgprot_cached_wthru(prot) (prot)69#endif70#else71static void invalid_vram_cache(void __force *addr)72{73 eieio();74 dcbf(addr);75 mb();76 eieio();77 dcbf(addr);78 mb();79}80#endif81 82struct fb_par_control {83 int vmode, cmode;84 int xres, yres;85 int vxres, vyres;86 int xoffset, yoffset;87 int pitch;88 struct control_regvals regvals;89 unsigned long sync;90 unsigned char ctrl;91};92 93#define DIRTY(z) ((x)->z != (y)->z)94#define DIRTY_CMAP(z) (memcmp(&((x)->z), &((y)->z), sizeof((y)->z)))95static inline int PAR_EQUAL(struct fb_par_control *x, struct fb_par_control *y)96{97 int i, results;98 99 results = 1;100 for (i = 0; i < 3; i++)101 results &= !DIRTY(regvals.clock_params[i]);102 if (!results)103 return 0;104 for (i = 0; i < 16; i++)105 results &= !DIRTY(regvals.regs[i]);106 if (!results)107 return 0;108 return (!DIRTY(cmode) && !DIRTY(xres) && !DIRTY(yres)109 && !DIRTY(vxres) && !DIRTY(vyres));110}111 112struct fb_info_control {113 struct fb_info info;114 struct fb_par_control par;115 u32 pseudo_palette[16];116 117 struct cmap_regs __iomem *cmap_regs;118 unsigned long cmap_regs_phys;119 120 struct control_regs __iomem *control_regs;121 unsigned long control_regs_phys;122 unsigned long control_regs_size;123 124 __u8 __iomem *frame_buffer;125 unsigned long frame_buffer_phys;126 unsigned long fb_orig_base;127 unsigned long fb_orig_size;128 129 int control_use_bank2;130 unsigned long total_vram;131 unsigned char vram_attr;132};133 134/* control register access macro */135#define CNTRL_REG(INFO,REG) (&(((INFO)->control_regs->REG).r))136 137 138/************************** Internal variables *******************************/139 140static struct fb_info_control *control_fb;141 142static int default_vmode __initdata = VMODE_NVRAM;143static int default_cmode __initdata = CMODE_NVRAM;144 145 146static int controlfb_setcolreg(u_int regno, u_int red, u_int green, u_int blue,147 u_int transp, struct fb_info *info)148{149 struct fb_info_control *p =150 container_of(info, struct fb_info_control, info);151 __u8 r, g, b;152 153 if (regno > 255)154 return 1;155 156 r = red >> 8;157 g = green >> 8;158 b = blue >> 8;159 160 out_8(&p->cmap_regs->addr, regno); /* tell clut what addr to fill */161 out_8(&p->cmap_regs->lut, r); /* send one color channel at */162 out_8(&p->cmap_regs->lut, g); /* a time... */163 out_8(&p->cmap_regs->lut, b);164 165 if (regno < 16) {166 int i;167 switch (p->par.cmode) {168 case CMODE_16:169 p->pseudo_palette[regno] =170 (regno << 10) | (regno << 5) | regno;171 break;172 case CMODE_32:173 i = (regno << 8) | regno;174 p->pseudo_palette[regno] = (i << 16) | i;175 break;176 }177 }178 179 return 0;180}181 182 183/******************** End of controlfb_ops implementation ******************/184 185 186 187static void set_control_clock(unsigned char *params)188{189#ifdef CONFIG_ADB_CUDA190 struct adb_request req;191 int i;192 193 for (i = 0; i < 3; ++i) {194 cuda_request(&req, NULL, 5, CUDA_PACKET, CUDA_GET_SET_IIC,195 0x50, i + 1, params[i]);196 while (!req.complete)197 cuda_poll();198 }199#endif200}201 202/*203 * Set screen start address according to var offset values204 */205static inline void set_screen_start(int xoffset, int yoffset,206 struct fb_info_control *p)207{208 struct fb_par_control *par = &p->par;209 210 par->xoffset = xoffset;211 par->yoffset = yoffset;212 out_le32(CNTRL_REG(p,start_addr),213 par->yoffset * par->pitch + (par->xoffset << par->cmode));214}215 216#define RADACAL_WRITE(a,d) \217 out_8(&p->cmap_regs->addr, (a)); \218 out_8(&p->cmap_regs->dat, (d))219 220/* Now how about actually saying, Make it so! */221/* Some things in here probably don't need to be done each time. */222static void control_set_hardware(struct fb_info_control *p, struct fb_par_control *par)223{224 struct control_regvals *r;225 volatile struct preg __iomem *rp;226 int i, cmode;227 228 if (PAR_EQUAL(&p->par, par)) {229 /*230 * check if only xoffset or yoffset differs.231 * this prevents flickers in typical VT switch case.232 */233 if (p->par.xoffset != par->xoffset ||234 p->par.yoffset != par->yoffset)235 set_screen_start(par->xoffset, par->yoffset, p);236 237 return;238 }239 240 p->par = *par;241 cmode = p->par.cmode;242 r = &par->regvals;243 244 /* Turn off display */245 out_le32(CNTRL_REG(p,ctrl), 0x400 | par->ctrl);246 247 set_control_clock(r->clock_params);248 249 RADACAL_WRITE(0x20, r->radacal_ctrl);250 RADACAL_WRITE(0x21, p->control_use_bank2 ? 0 : 1);251 RADACAL_WRITE(0x10, 0);252 RADACAL_WRITE(0x11, 0);253 254 rp = &p->control_regs->vswin;255 for (i = 0; i < 16; ++i, ++rp)256 out_le32(&rp->r, r->regs[i]);257 258 out_le32(CNTRL_REG(p,pitch), par->pitch);259 out_le32(CNTRL_REG(p,mode), r->mode);260 out_le32(CNTRL_REG(p,vram_attr), p->vram_attr);261 out_le32(CNTRL_REG(p,start_addr), par->yoffset * par->pitch262 + (par->xoffset << cmode));263 out_le32(CNTRL_REG(p,rfrcnt), 0x1e5);264 out_le32(CNTRL_REG(p,intr_ena), 0);265 266 /* Turn on display */267 out_le32(CNTRL_REG(p,ctrl), par->ctrl);268 269#ifdef CONFIG_BOOTX_TEXT270 btext_update_display(p->frame_buffer_phys + CTRLFB_OFF,271 p->par.xres, p->par.yres,272 (cmode == CMODE_32? 32: cmode == CMODE_16? 16: 8),273 p->par.pitch);274#endif /* CONFIG_BOOTX_TEXT */275}276 277/* Work out which banks of VRAM we have installed. */278/* danj: I guess the card just ignores writes to nonexistant VRAM... */279 280static void __init find_vram_size(struct fb_info_control *p)281{282 int bank1, bank2;283 284 /*285 * Set VRAM in 2MB (bank 1) mode286 * VRAM Bank 2 will be accessible through offset 0x600000 if present287 * and VRAM Bank 1 will not respond at that offset even if present288 */289 out_le32(CNTRL_REG(p,vram_attr), 0x31);290 291 out_8(&p->frame_buffer[0x600000], 0xb3);292 out_8(&p->frame_buffer[0x600001], 0x71);293 invalid_vram_cache(&p->frame_buffer[0x600000]);294 295 bank2 = (in_8(&p->frame_buffer[0x600000]) == 0xb3)296 && (in_8(&p->frame_buffer[0x600001]) == 0x71);297 298 /*299 * Set VRAM in 2MB (bank 2) mode300 * VRAM Bank 1 will be accessible through offset 0x000000 if present301 * and VRAM Bank 2 will not respond at that offset even if present302 */303 out_le32(CNTRL_REG(p,vram_attr), 0x39);304 305 out_8(&p->frame_buffer[0], 0x5a);306 out_8(&p->frame_buffer[1], 0xc7);307 invalid_vram_cache(&p->frame_buffer[0]);308 309 bank1 = (in_8(&p->frame_buffer[0]) == 0x5a)310 && (in_8(&p->frame_buffer[1]) == 0xc7);311 312 if (bank2) {313 if (!bank1) {314 /*315 * vram bank 2 only316 */317 p->control_use_bank2 = 1;318 p->vram_attr = 0x39;319 p->frame_buffer += 0x600000;320 p->frame_buffer_phys += 0x600000;321 } else {322 /*323 * 4 MB vram324 */325 p->vram_attr = 0x51;326 }327 } else {328 /*329 * vram bank 1 only330 */331 p->vram_attr = 0x31;332 }333 334 p->total_vram = (bank1 + bank2) * 0x200000;335 336 printk(KERN_INFO "controlfb: VRAM Total = %dMB "337 "(%dMB @ bank 1, %dMB @ bank 2)\n",338 (bank1 + bank2) << 1, bank1 << 1, bank2 << 1);339}340 341/*342 * Get the monitor sense value.343 * Note that this can be called before calibrate_delay,344 * so we can't use udelay.345 */346static int read_control_sense(struct fb_info_control *p)347{348 int sense;349 350 out_le32(CNTRL_REG(p,mon_sense), 7); /* drive all lines high */351 __delay(200);352 out_le32(CNTRL_REG(p,mon_sense), 077); /* turn off drivers */353 __delay(2000);354 sense = (in_le32(CNTRL_REG(p,mon_sense)) & 0x1c0) << 2;355 356 /* drive each sense line low in turn and collect the other 2 */357 out_le32(CNTRL_REG(p,mon_sense), 033); /* drive A low */358 __delay(2000);359 sense |= (in_le32(CNTRL_REG(p,mon_sense)) & 0xc0) >> 2;360 out_le32(CNTRL_REG(p,mon_sense), 055); /* drive B low */361 __delay(2000);362 sense |= ((in_le32(CNTRL_REG(p,mon_sense)) & 0x100) >> 5)363 | ((in_le32(CNTRL_REG(p,mon_sense)) & 0x40) >> 4);364 out_le32(CNTRL_REG(p,mon_sense), 066); /* drive C low */365 __delay(2000);366 sense |= (in_le32(CNTRL_REG(p,mon_sense)) & 0x180) >> 7;367 368 out_le32(CNTRL_REG(p,mon_sense), 077); /* turn off drivers */369 370 return sense;371}372 373/********************** Various translation functions **********************/374 375#define CONTROL_PIXCLOCK_BASE 256016376#define CONTROL_PIXCLOCK_MIN 5000 /* ~ 200 MHz dot clock */377 378/*379 * calculate the clock parameters to be sent to CUDA according to given380 * pixclock in pico second.381 */382static int calc_clock_params(unsigned long clk, unsigned char *param)383{384 unsigned long p0, p1, p2, k, l, m, n, min;385 386 if (clk > (CONTROL_PIXCLOCK_BASE << 3))387 return 1;388 389 p2 = ((clk << 4) < CONTROL_PIXCLOCK_BASE)? 3: 2;390 l = clk << p2;391 p0 = 0;392 p1 = 0;393 for (k = 1, min = l; k < 32; k++) {394 unsigned long rem;395 396 m = CONTROL_PIXCLOCK_BASE * k;397 n = m / l;398 rem = m % l;399 if (n && (n < 128) && rem < min) {400 p0 = k;401 p1 = n;402 min = rem;403 }404 }405 if (!p0 || !p1)406 return 1;407 408 param[0] = p0;409 param[1] = p1;410 param[2] = p2;411 412 return 0;413}414 415 416/*417 * This routine takes a user-supplied var, and picks the best vmode/cmode418 * from it.419 */420 421static int control_var_to_par(struct fb_var_screeninfo *var,422 struct fb_par_control *par, const struct fb_info *fb_info)423{424 int cmode, piped_diff, hstep;425 unsigned hperiod, hssync, hsblank, hesync, heblank, piped, heq, hlfln,426 hserr, vperiod, vssync, vesync, veblank, vsblank, vswin, vewin;427 unsigned long pixclock;428 struct fb_info_control *p =429 container_of(fb_info, struct fb_info_control, info);430 struct control_regvals *r = &par->regvals;431 432 switch (var->bits_per_pixel) {433 case 8:434 par->cmode = CMODE_8;435 if (p->total_vram > 0x200000) {436 r->mode = 3;437 r->radacal_ctrl = 0x20;438 piped_diff = 13;439 } else {440 r->mode = 2;441 r->radacal_ctrl = 0x10;442 piped_diff = 9;443 }444 break;445 case 15:446 case 16:447 par->cmode = CMODE_16;448 if (p->total_vram > 0x200000) {449 r->mode = 2;450 r->radacal_ctrl = 0x24;451 piped_diff = 5;452 } else {453 r->mode = 1;454 r->radacal_ctrl = 0x14;455 piped_diff = 3;456 }457 break;458 case 32:459 par->cmode = CMODE_32;460 if (p->total_vram > 0x200000) {461 r->mode = 1;462 r->radacal_ctrl = 0x28;463 } else {464 r->mode = 0;465 r->radacal_ctrl = 0x18;466 }467 piped_diff = 1;468 break;469 default:470 return -EINVAL;471 }472 473 /*474 * adjust xres and vxres so that the corresponding memory widths are475 * 32-byte aligned476 */477 hstep = 31 >> par->cmode;478 par->xres = (var->xres + hstep) & ~hstep;479 par->vxres = (var->xres_virtual + hstep) & ~hstep;480 par->xoffset = (var->xoffset + hstep) & ~hstep;481 if (par->vxres < par->xres)482 par->vxres = par->xres;483 par->pitch = par->vxres << par->cmode;484 485 par->yres = var->yres;486 par->vyres = var->yres_virtual;487 par->yoffset = var->yoffset;488 if (par->vyres < par->yres)489 par->vyres = par->yres;490 491 par->sync = var->sync;492 493 if (par->pitch * par->vyres + CTRLFB_OFF > p->total_vram)494 return -EINVAL;495 496 if (par->xoffset + par->xres > par->vxres)497 par->xoffset = par->vxres - par->xres;498 if (par->yoffset + par->yres > par->vyres)499 par->yoffset = par->vyres - par->yres;500 501 pixclock = (var->pixclock < CONTROL_PIXCLOCK_MIN)? CONTROL_PIXCLOCK_MIN:502 var->pixclock;503 if (calc_clock_params(pixclock, r->clock_params))504 return -EINVAL;505 506 hperiod = ((var->left_margin + par->xres + var->right_margin507 + var->hsync_len) >> 1) - 2;508 hssync = hperiod + 1;509 hsblank = hssync - (var->right_margin >> 1);510 hesync = (var->hsync_len >> 1) - 1;511 heblank = (var->left_margin >> 1) + hesync;512 piped = heblank - piped_diff;513 heq = var->hsync_len >> 2;514 hlfln = (hperiod+2) >> 1;515 hserr = hssync-hesync;516 vperiod = (var->vsync_len + var->lower_margin + par->yres517 + var->upper_margin) << 1;518 vssync = vperiod - 2;519 vesync = (var->vsync_len << 1) - vperiod + vssync;520 veblank = (var->upper_margin << 1) + vesync;521 vsblank = vssync - (var->lower_margin << 1);522 vswin = (vsblank+vssync) >> 1;523 vewin = (vesync+veblank) >> 1;524 525 r->regs[0] = vswin;526 r->regs[1] = vsblank;527 r->regs[2] = veblank;528 r->regs[3] = vewin;529 r->regs[4] = vesync;530 r->regs[5] = vssync;531 r->regs[6] = vperiod;532 r->regs[7] = piped;533 r->regs[8] = hperiod;534 r->regs[9] = hsblank;535 r->regs[10] = heblank;536 r->regs[11] = hesync;537 r->regs[12] = hssync;538 r->regs[13] = heq;539 r->regs[14] = hlfln;540 r->regs[15] = hserr;541 542 if (par->xres >= 1280 && par->cmode >= CMODE_16)543 par->ctrl = 0x7f;544 else545 par->ctrl = 0x3b;546 547 if (mac_var_to_vmode(var, &par->vmode, &cmode))548 par->vmode = 0;549 550 return 0;551}552 553 554/*555 * Convert hardware data in par to an fb_var_screeninfo556 */557 558static void control_par_to_var(struct fb_par_control *par, struct fb_var_screeninfo *var)559{560 struct control_regints *rv;561 562 rv = (struct control_regints *) par->regvals.regs;563 564 memset(var, 0, sizeof(*var));565 var->xres = par->xres;566 var->yres = par->yres;567 var->xres_virtual = par->vxres;568 var->yres_virtual = par->vyres;569 var->xoffset = par->xoffset;570 var->yoffset = par->yoffset;571 572 switch(par->cmode) {573 default:574 case CMODE_8:575 var->bits_per_pixel = 8;576 var->red.length = 8;577 var->green.length = 8;578 var->blue.length = 8;579 break;580 case CMODE_16: /* RGB 555 */581 var->bits_per_pixel = 16;582 var->red.offset = 10;583 var->red.length = 5;584 var->green.offset = 5;585 var->green.length = 5;586 var->blue.length = 5;587 break;588 case CMODE_32: /* RGB 888 */589 var->bits_per_pixel = 32;590 var->red.offset = 16;591 var->red.length = 8;592 var->green.offset = 8;593 var->green.length = 8;594 var->blue.length = 8;595 var->transp.offset = 24;596 var->transp.length = 8;597 break;598 }599 var->height = -1;600 var->width = -1;601 var->vmode = FB_VMODE_NONINTERLACED;602 603 var->left_margin = (rv->heblank - rv->hesync) << 1;604 var->right_margin = (rv->hssync - rv->hsblank) << 1;605 var->hsync_len = (rv->hperiod + 2 - rv->hssync + rv->hesync) << 1;606 607 var->upper_margin = (rv->veblank - rv->vesync) >> 1;608 var->lower_margin = (rv->vssync - rv->vsblank) >> 1;609 var->vsync_len = (rv->vperiod - rv->vssync + rv->vesync) >> 1;610 611 var->sync = par->sync;612 613 /*614 * 10^12 * clock_params[0] / (3906400 * clock_params[1]615 * * 2^clock_params[2])616 * (10^12 * clock_params[0] / (3906400 * clock_params[1]))617 * >> clock_params[2]618 */619 /* (255990.17 * clock_params[0] / clock_params[1]) >> clock_params[2] */620 var->pixclock = CONTROL_PIXCLOCK_BASE * par->regvals.clock_params[0];621 var->pixclock /= par->regvals.clock_params[1];622 var->pixclock >>= par->regvals.clock_params[2];623}624 625/******************** The functions for controlfb_ops ********************/626 627/*628 * Checks a var structure629 */630static int controlfb_check_var (struct fb_var_screeninfo *var, struct fb_info *info)631{632 struct fb_par_control par;633 int err;634 635 err = control_var_to_par(var, &par, info);636 if (err)637 return err;638 control_par_to_var(&par, var);639 640 return 0;641}642 643/*644 * Applies current var to display645 */646static int controlfb_set_par (struct fb_info *info)647{648 struct fb_info_control *p =649 container_of(info, struct fb_info_control, info);650 struct fb_par_control par;651 int err;652 653 if((err = control_var_to_par(&info->var, &par, info))) {654 printk (KERN_ERR "controlfb_set_par: error calling"655 " control_var_to_par: %d.\n", err);656 return err;657 }658 659 control_set_hardware(p, &par);660 661 info->fix.visual = (p->par.cmode == CMODE_8) ?662 FB_VISUAL_PSEUDOCOLOR : FB_VISUAL_DIRECTCOLOR;663 info->fix.line_length = p->par.pitch;664 info->fix.xpanstep = 32 >> p->par.cmode;665 info->fix.ypanstep = 1;666 667 return 0;668}669 670static int controlfb_pan_display(struct fb_var_screeninfo *var,671 struct fb_info *info)672{673 unsigned int xoffset, hstep;674 struct fb_info_control *p =675 container_of(info, struct fb_info_control, info);676 struct fb_par_control *par = &p->par;677 678 /*679 * make sure start addr will be 32-byte aligned680 */681 hstep = 0x1f >> par->cmode;682 xoffset = (var->xoffset + hstep) & ~hstep;683 684 if (xoffset+par->xres > par->vxres ||685 var->yoffset+par->yres > par->vyres)686 return -EINVAL;687 688 set_screen_start(xoffset, var->yoffset, p);689 690 return 0;691}692 693static int controlfb_blank(int blank_mode, struct fb_info *info)694{695 struct fb_info_control __maybe_unused *p =696 container_of(info, struct fb_info_control, info);697 unsigned ctrl;698 699 ctrl = in_le32(CNTRL_REG(p, ctrl));700 if (blank_mode > 0)701 switch (blank_mode) {702 case FB_BLANK_VSYNC_SUSPEND:703 ctrl &= ~3;704 break;705 case FB_BLANK_HSYNC_SUSPEND:706 ctrl &= ~0x30;707 break;708 case FB_BLANK_POWERDOWN:709 ctrl &= ~0x33;710 fallthrough;711 case FB_BLANK_NORMAL:712 ctrl |= 0x400;713 break;714 default:715 break;716 }717 else {718 ctrl &= ~0x400;719 ctrl |= 0x33;720 }721 out_le32(CNTRL_REG(p,ctrl), ctrl);722 723 return 0;724}725 726/*727 * Private mmap since we want to have a different caching on the framebuffer728 * for controlfb.729 * Note there's no locking in here; it's done in fb_mmap() in fbmem.c.730 */731static int controlfb_mmap(struct fb_info *info,732 struct vm_area_struct *vma)733{734 unsigned long mmio_pgoff;735 unsigned long start;736 u32 len;737 738 start = info->fix.smem_start;739 len = info->fix.smem_len;740 mmio_pgoff = PAGE_ALIGN((start & ~PAGE_MASK) + len) >> PAGE_SHIFT;741 if (vma->vm_pgoff >= mmio_pgoff) {742 if (info->var.accel_flags)743 return -EINVAL;744 vma->vm_pgoff -= mmio_pgoff;745 start = info->fix.mmio_start;746 len = info->fix.mmio_len;747 vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot);748 } else {749 /* framebuffer */750 vma->vm_page_prot = pgprot_cached_wthru(vma->vm_page_prot);751 }752 753 return vm_iomap_memory(vma, start, len);754}755 756static const struct fb_ops controlfb_ops = {757 .owner = THIS_MODULE,758 __FB_DEFAULT_IOMEM_OPS_RDWR,759 .fb_check_var = controlfb_check_var,760 .fb_set_par = controlfb_set_par,761 .fb_setcolreg = controlfb_setcolreg,762 .fb_pan_display = controlfb_pan_display,763 .fb_blank = controlfb_blank,764 __FB_DEFAULT_IOMEM_OPS_DRAW,765 .fb_mmap = controlfb_mmap,766};767 768/*769 * Set misc info vars for this driver770 */771static void __init control_init_info(struct fb_info *info, struct fb_info_control *p)772{773 /* Fill fb_info */774 info->par = &p->par;775 info->fbops = &controlfb_ops;776 info->pseudo_palette = p->pseudo_palette;777 info->flags = FBINFO_HWACCEL_YPAN;778 info->screen_base = p->frame_buffer + CTRLFB_OFF;779 780 fb_alloc_cmap(&info->cmap, 256, 0);781 782 /* Fill fix common fields */783 strcpy(info->fix.id, "control");784 info->fix.mmio_start = p->control_regs_phys;785 info->fix.mmio_len = sizeof(struct control_regs);786 info->fix.type = FB_TYPE_PACKED_PIXELS;787 info->fix.smem_start = p->frame_buffer_phys + CTRLFB_OFF;788 info->fix.smem_len = p->total_vram - CTRLFB_OFF;789 info->fix.ywrapstep = 0;790 info->fix.type_aux = 0;791 info->fix.accel = FB_ACCEL_NONE;792}793 794/*795 * Parse user specified options (`video=controlfb:')796 */797static void __init control_setup(char *options)798{799 char *this_opt;800 801 if (!options || !*options)802 return;803 804 while ((this_opt = strsep(&options, ",")) != NULL) {805 if (!strncmp(this_opt, "vmode:", 6)) {806 int vmode = simple_strtoul(this_opt+6, NULL, 0);807 if (vmode > 0 && vmode <= VMODE_MAX &&808 control_mac_modes[vmode - 1].m[1] >= 0)809 default_vmode = vmode;810 } else if (!strncmp(this_opt, "cmode:", 6)) {811 int depth = simple_strtoul(this_opt+6, NULL, 0);812 switch (depth) {813 case CMODE_8:814 case CMODE_16:815 case CMODE_32:816 default_cmode = depth;817 break;818 case 8:819 default_cmode = CMODE_8;820 break;821 case 15:822 case 16:823 default_cmode = CMODE_16;824 break;825 case 24:826 case 32:827 default_cmode = CMODE_32;828 break;829 }830 }831 }832}833 834/*835 * finish off the driver initialization and register836 */837static int __init init_control(struct fb_info_control *p)838{839 int full, sense, vmode, cmode, vyres;840 struct fb_var_screeninfo var;841 int rc;842 843 printk(KERN_INFO "controlfb: ");844 845 full = p->total_vram == 0x400000;846 847 /* Try to pick a video mode out of NVRAM if we have one. */848 cmode = default_cmode;849 if (IS_REACHABLE(CONFIG_NVRAM) && cmode == CMODE_NVRAM)850 cmode = nvram_read_byte(NV_CMODE);851 if (cmode < CMODE_8 || cmode > CMODE_32)852 cmode = CMODE_8;853 854 vmode = default_vmode;855 if (IS_REACHABLE(CONFIG_NVRAM) && vmode == VMODE_NVRAM)856 vmode = nvram_read_byte(NV_VMODE);857 if (vmode < 1 || vmode > VMODE_MAX ||858 control_mac_modes[vmode - 1].m[full] < cmode) {859 sense = read_control_sense(p);860 printk(KERN_CONT "Monitor sense value = 0x%x, ", sense);861 vmode = mac_map_monitor_sense(sense);862 if (control_mac_modes[vmode - 1].m[full] < 0)863 vmode = VMODE_640_480_60;864 cmode = min(cmode, control_mac_modes[vmode - 1].m[full]);865 }866 867 /* Initialize info structure */868 control_init_info(&p->info, p);869 870 /* Setup default var */871 if (mac_vmode_to_var(vmode, cmode, &var) < 0) {872 /* This shouldn't happen! */873 printk("mac_vmode_to_var(%d, %d,) failed\n", vmode, cmode);874try_again:875 vmode = VMODE_640_480_60;876 cmode = CMODE_8;877 if (mac_vmode_to_var(vmode, cmode, &var) < 0) {878 printk(KERN_ERR "controlfb: mac_vmode_to_var() failed\n");879 return -ENXIO;880 }881 printk(KERN_INFO "controlfb: ");882 }883 printk("using video mode %d and color mode %d.\n", vmode, cmode);884 885 vyres = (p->total_vram - CTRLFB_OFF) / (var.xres << cmode);886 if (vyres > var.yres)887 var.yres_virtual = vyres;888 889 /* Apply default var */890 var.activate = FB_ACTIVATE_NOW;891 rc = fb_set_var(&p->info, &var);892 if (rc && (vmode != VMODE_640_480_60 || cmode != CMODE_8))893 goto try_again;894 895 /* Register with fbdev layer */896 if (register_framebuffer(&p->info) < 0)897 return -ENXIO;898 899 fb_info(&p->info, "control display adapter\n");900 901 return 0;902}903 904static void control_cleanup(void)905{906 struct fb_info_control *p = control_fb;907 908 if (!p)909 return;910 911 if (p->cmap_regs)912 iounmap(p->cmap_regs);913 if (p->control_regs)914 iounmap(p->control_regs);915 if (p->frame_buffer) {916 if (p->control_use_bank2)917 p->frame_buffer -= 0x600000;918 iounmap(p->frame_buffer);919 }920 if (p->cmap_regs_phys)921 release_mem_region(p->cmap_regs_phys, 0x1000);922 if (p->control_regs_phys)923 release_mem_region(p->control_regs_phys, p->control_regs_size);924 if (p->fb_orig_base)925 release_mem_region(p->fb_orig_base, p->fb_orig_size);926 kfree(p);927}928 929/*930 * find "control" and initialize931 */932static int __init control_of_init(struct device_node *dp)933{934 struct fb_info_control *p;935 struct resource fb_res, reg_res;936 937 if (control_fb) {938 printk(KERN_ERR "controlfb: only one control is supported\n");939 return -ENXIO;940 }941 942 if (of_pci_address_to_resource(dp, 2, &fb_res) ||943 of_pci_address_to_resource(dp, 1, ®_res)) {944 printk(KERN_ERR "can't get 2 addresses for control\n");945 return -ENXIO;946 }947 p = kzalloc(sizeof(*p), GFP_KERNEL);948 if (!p)949 return -ENOMEM;950 control_fb = p; /* save it for cleanups */951 952 /* Map in frame buffer and registers */953 p->fb_orig_base = fb_res.start;954 p->fb_orig_size = resource_size(&fb_res);955 /* use the big-endian aperture (??) */956 p->frame_buffer_phys = fb_res.start + 0x800000;957 p->control_regs_phys = reg_res.start;958 p->control_regs_size = resource_size(®_res);959 960 if (!p->fb_orig_base ||961 !request_mem_region(p->fb_orig_base,p->fb_orig_size,"controlfb")) {962 p->fb_orig_base = 0;963 goto error_out;964 }965 /* map at most 8MB for the frame buffer */966 p->frame_buffer = ioremap_wt(p->frame_buffer_phys, 0x800000);967 968 if (!p->control_regs_phys ||969 !request_mem_region(p->control_regs_phys, p->control_regs_size,970 "controlfb regs")) {971 p->control_regs_phys = 0;972 goto error_out;973 }974 p->control_regs = ioremap(p->control_regs_phys, p->control_regs_size);975 976 p->cmap_regs_phys = 0xf301b000; /* XXX not in prom? */977 if (!request_mem_region(p->cmap_regs_phys, 0x1000, "controlfb cmap")) {978 p->cmap_regs_phys = 0;979 goto error_out;980 }981 p->cmap_regs = ioremap(p->cmap_regs_phys, 0x1000);982 983 if (!p->cmap_regs || !p->control_regs || !p->frame_buffer)984 goto error_out;985 986 find_vram_size(p);987 if (!p->total_vram)988 goto error_out;989 990 if (init_control(p) < 0)991 goto error_out;992 993 return 0;994 995error_out:996 control_cleanup();997 return -ENXIO;998}999 1000static int __init control_init(void)1001{1002 struct device_node *dp;1003 char *option = NULL;1004 int ret = -ENXIO;1005 1006 if (fb_get_options("controlfb", &option))1007 return -ENODEV;1008 control_setup(option);1009 1010 dp = of_find_node_by_name(NULL, "control");1011 if (dp && !control_of_init(dp))1012 ret = 0;1013 of_node_put(dp);1014 1015 return ret;1016}1017 1018device_initcall(control_init);1019