181 lines · c
1/* SPDX-License-Identifier: GPL-2.0 */2#ifndef __MATROXFB_DAC1064_H__3#define __MATROXFB_DAC1064_H__4 5 6#include "matroxfb_base.h"7 8#ifdef CONFIG_FB_MATROX_MYSTIQUE9extern struct matrox_switch matrox_mystique;10#endif11#ifdef CONFIG_FB_MATROX_G12extern struct matrox_switch matrox_G100;13#endif14#ifdef NEED_DAC106415void DAC1064_global_init(struct matrox_fb_info *minfo);16void DAC1064_global_restore(struct matrox_fb_info *minfo);17#endif18 19#define M1064_INDEX 0x0020#define M1064_PALWRADD 0x0021#define M1064_PALDATA 0x0122#define M1064_PIXRDMSK 0x0223#define M1064_PALRDADD 0x0324#define M1064_X_DATAREG 0x0A25#define M1064_CURPOSXL 0x0C /* can be accessed as DWORD */26#define M1064_CURPOSXH 0x0D27#define M1064_CURPOSYL 0x0E28#define M1064_CURPOSYH 0x0F29 30#define M1064_XCURADDL 0x0431#define M1064_XCURADDH 0x0532#define M1064_XCURCTRL 0x0633#define M1064_XCURCTRL_DIS 0x00 /* transparent, transparent, transparent, transparent */34#define M1064_XCURCTRL_3COLOR 0x01 /* transparent, 0, 1, 2 */35#define M1064_XCURCTRL_XGA 0x02 /* 0, 1, transparent, complement */36#define M1064_XCURCTRL_XWIN 0x03 /* transparent, transparent, 0, 1 */37 /* drive DVI by standard(0)/DVI(1) PLL */38 /* if set(1), C?DVICLKEN and C?DVICLKSEL must be set(1) */39#define M1064_XDVICLKCTRL_DVIDATAPATHSEL 0x0140 /* drive CRTC1 by standard(0)/DVI(1) PLL */41#define M1064_XDVICLKCTRL_C1DVICLKSEL 0x0242 /* drive CRTC2 by standard(0)/DVI(1) PLL */43#define M1064_XDVICLKCTRL_C2DVICLKSEL 0x0444 /* pixel clock allowed to(0)/blocked from(1) driving CRTC1 */45#define M1064_XDVICLKCTRL_C1DVICLKEN 0x0846 /* DVI PLL loop filter bandwidth selection bits */47#define M1064_XDVICLKCTRL_DVILOOPCTL 0x3048 /* CRTC2 pixel clock allowed to(0)/blocked from(1) driving CRTC2 */49#define M1064_XDVICLKCTRL_C2DVICLKEN 0x4050 /* P1PLL loop filter bandwidth selection */51#define M1064_XDVICLKCTRL_P1LOOPBWDTCTL 0x8052#define M1064_XCURCOL0RED 0x0853#define M1064_XCURCOL0GREEN 0x0954#define M1064_XCURCOL0BLUE 0x0A55#define M1064_XCURCOL1RED 0x0C56#define M1064_XCURCOL1GREEN 0x0D57#define M1064_XCURCOL1BLUE 0x0E58#define M1064_XDVICLKCTRL 0x0F59#define M1064_XCURCOL2RED 0x1060#define M1064_XCURCOL2GREEN 0x1161#define M1064_XCURCOL2BLUE 0x1262#define DAC1064_XVREFCTRL 0x1863#define DAC1064_XVREFCTRL_INTERNAL 0x3F64#define DAC1064_XVREFCTRL_EXTERNAL 0x0065#define DAC1064_XVREFCTRL_G100_DEFAULT 0x0366#define M1064_XMULCTRL 0x1967#define M1064_XMULCTRL_DEPTH_8BPP 0x00 /* 8 bpp paletized */68#define M1064_XMULCTRL_DEPTH_15BPP_1BPP 0x01 /* 15 bpp paletized + 1 bpp overlay */69#define M1064_XMULCTRL_DEPTH_16BPP 0x02 /* 16 bpp paletized */70#define M1064_XMULCTRL_DEPTH_24BPP 0x03 /* 24 bpp paletized */71#define M1064_XMULCTRL_DEPTH_24BPP_8BPP 0x04 /* 24 bpp direct + 8 bpp overlay paletized */72#define M1064_XMULCTRL_2G8V16 0x05 /* 15 bpp video direct, half xres, 8bpp paletized */73#define M1064_XMULCTRL_G16V16 0x06 /* 15 bpp video, 15bpp graphics, one of them paletized */74#define M1064_XMULCTRL_DEPTH_32BPP 0x07 /* 24 bpp paletized + 8 bpp unused */75#define M1064_XMULCTRL_GRAPHICS_PALETIZED 0x0076#define M1064_XMULCTRL_VIDEO_PALETIZED 0x0877#define M1064_XPIXCLKCTRL 0x1A78#define M1064_XPIXCLKCTRL_SRC_PCI 0x0079#define M1064_XPIXCLKCTRL_SRC_PLL 0x0180#define M1064_XPIXCLKCTRL_SRC_EXT 0x0281#define M1064_XPIXCLKCTRL_SRC_SYS 0x03 /* G200/G400 */82#define M1064_XPIXCLKCTRL_SRC_PLL2 0x03 /* G450 */83#define M1064_XPIXCLKCTRL_SRC_MASK 0x0384#define M1064_XPIXCLKCTRL_EN 0x0085#define M1064_XPIXCLKCTRL_DIS 0x0486#define M1064_XPIXCLKCTRL_PLL_DOWN 0x0087#define M1064_XPIXCLKCTRL_PLL_UP 0x0888#define M1064_XGENCTRL 0x1D89#define M1064_XGENCTRL_VS_0 0x0090#define M1064_XGENCTRL_VS_1 0x0191#define M1064_XGENCTRL_ALPHA_DIS 0x0092#define M1064_XGENCTRL_ALPHA_EN 0x0293#define M1064_XGENCTRL_BLACK_0IRE 0x0094#define M1064_XGENCTRL_BLACK_75IRE 0x1095#define M1064_XGENCTRL_SYNC_ON_GREEN 0x0096#define M1064_XGENCTRL_NO_SYNC_ON_GREEN 0x2097#define M1064_XGENCTRL_SYNC_ON_GREEN_MASK 0x2098#define M1064_XMISCCTRL 0x1E99#define M1064_XMISCCTRL_DAC_DIS 0x00100#define M1064_XMISCCTRL_DAC_EN 0x01101#define M1064_XMISCCTRL_MFC_VGA 0x00102#define M1064_XMISCCTRL_MFC_MAFC 0x02103#define M1064_XMISCCTRL_MFC_DIS 0x06104#define GX00_XMISCCTRL_MFC_MAFC 0x02105#define GX00_XMISCCTRL_MFC_PANELLINK 0x04106#define GX00_XMISCCTRL_MFC_DIS 0x06107#define GX00_XMISCCTRL_MFC_MASK 0x06108#define M1064_XMISCCTRL_DAC_6BIT 0x00109#define M1064_XMISCCTRL_DAC_8BIT 0x08110#define M1064_XMISCCTRL_DAC_WIDTHMASK 0x08111#define M1064_XMISCCTRL_LUT_DIS 0x00112#define M1064_XMISCCTRL_LUT_EN 0x10113#define G400_XMISCCTRL_VDO_MAFC12 0x00114#define G400_XMISCCTRL_VDO_BYPASS656 0x40115#define G400_XMISCCTRL_VDO_C2_MAFC12 0x80116#define G400_XMISCCTRL_VDO_C2_BYPASS656 0xC0117#define G400_XMISCCTRL_VDO_MASK 0xE0118#define M1064_XGENIOCTRL 0x2A119#define M1064_XGENIODATA 0x2B120#define DAC1064_XSYSPLLM 0x2C121#define DAC1064_XSYSPLLN 0x2D122#define DAC1064_XSYSPLLP 0x2E123#define DAC1064_XSYSPLLSTAT 0x2F124#define M1064_XZOOMCTRL 0x38125#define M1064_XZOOMCTRL_1 0x00126#define M1064_XZOOMCTRL_2 0x01127#define M1064_XZOOMCTRL_4 0x03128#define M1064_XSENSETEST 0x3A129#define M1064_XSENSETEST_BCOMP 0x01130#define M1064_XSENSETEST_GCOMP 0x02131#define M1064_XSENSETEST_RCOMP 0x04132#define M1064_XSENSETEST_PDOWN 0x00133#define M1064_XSENSETEST_PUP 0x80134#define M1064_XCRCREML 0x3C135#define M1064_XCRCREMH 0x3D136#define M1064_XCRCBITSEL 0x3E137#define M1064_XCOLKEYMASKL 0x40138#define M1064_XCOLKEYMASKH 0x41139#define M1064_XCOLKEYL 0x42140#define M1064_XCOLKEYH 0x43141#define M1064_XPIXPLLAM 0x44142#define M1064_XPIXPLLAN 0x45143#define M1064_XPIXPLLAP 0x46144#define M1064_XPIXPLLBM 0x48145#define M1064_XPIXPLLBN 0x49146#define M1064_XPIXPLLBP 0x4A147#define M1064_XPIXPLLCM 0x4C148#define M1064_XPIXPLLCN 0x4D149#define M1064_XPIXPLLCP 0x4E150#define M1064_XPIXPLLSTAT 0x4F151 152#define M1064_XTVO_IDX 0x87153#define M1064_XTVO_DATA 0x88154 155#define M1064_XOUTPUTCONN 0x8A156#define M1064_XSYNCCTRL 0x8B157#define M1064_XVIDPLLSTAT 0x8C158#define M1064_XVIDPLLP 0x8D159#define M1064_XVIDPLLM 0x8E160#define M1064_XVIDPLLN 0x8F161 162#define M1064_XPWRCTRL 0xA0163#define M1064_XPWRCTRL_PANELPDN 0x04164 165#define M1064_XPANMODE 0xA2166 167enum POS1064 {168 POS1064_XCURADDL=0, POS1064_XCURADDH, POS1064_XCURCTRL,169 POS1064_XCURCOL0RED, POS1064_XCURCOL0GREEN, POS1064_XCURCOL0BLUE,170 POS1064_XCURCOL1RED, POS1064_XCURCOL1GREEN, POS1064_XCURCOL1BLUE,171 POS1064_XCURCOL2RED, POS1064_XCURCOL2GREEN, POS1064_XCURCOL2BLUE,172 POS1064_XVREFCTRL, POS1064_XMULCTRL, POS1064_XPIXCLKCTRL, POS1064_XGENCTRL,173 POS1064_XMISCCTRL,174 POS1064_XGENIOCTRL, POS1064_XGENIODATA, POS1064_XZOOMCTRL, POS1064_XSENSETEST,175 POS1064_XCRCBITSEL,176 POS1064_XCOLKEYMASKL, POS1064_XCOLKEYMASKH, POS1064_XCOLKEYL, POS1064_XCOLKEYH,177 POS1064_XOUTPUTCONN, POS1064_XPANMODE, POS1064_XPWRCTRL };178 179 180#endif /* __MATROXFB_DAC1064_H__ */181