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brintos / linux-shallow public Read only

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1/***************************************************************************\2|*                                                                           *|3|*       Copyright 1993-2003 NVIDIA, Corporation.  All rights reserved.      *|4|*                                                                           *|5|*     NOTICE TO USER:   The source code  is copyrighted under  U.S. and     *|6|*     international laws.  Users and possessors of this source code are     *|7|*     hereby granted a nonexclusive,  royalty-free copyright license to     *|8|*     use this code in individual and commercial software.                  *|9|*                                                                           *|10|*     Any use of this source code must include,  in the user documenta-     *|11|*     tion and  internal comments to the code,  notices to the end user     *|12|*     as follows:                                                           *|13|*                                                                           *|14|*       Copyright 1993-1999 NVIDIA, Corporation.  All rights reserved.      *|15|*                                                                           *|16|*     NVIDIA, CORPORATION MAKES NO REPRESENTATION ABOUT THE SUITABILITY     *|17|*     OF  THIS SOURCE  CODE  FOR ANY PURPOSE.  IT IS  PROVIDED  "AS IS"     *|18|*     WITHOUT EXPRESS OR IMPLIED WARRANTY OF ANY KIND.  NVIDIA, CORPOR-     *|19|*     ATION DISCLAIMS ALL WARRANTIES  WITH REGARD  TO THIS SOURCE CODE,     *|20|*     INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY, NONINFRINGE-     *|21|*     MENT,  AND FITNESS  FOR A PARTICULAR PURPOSE.   IN NO EVENT SHALL     *|22|*     NVIDIA, CORPORATION  BE LIABLE FOR ANY SPECIAL,  INDIRECT,  INCI-     *|23|*     DENTAL, OR CONSEQUENTIAL DAMAGES,  OR ANY DAMAGES  WHATSOEVER RE-     *|24|*     SULTING FROM LOSS OF USE,  DATA OR PROFITS,  WHETHER IN AN ACTION     *|25|*     OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION,  ARISING OUT OF     *|26|*     OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOURCE CODE.     *|27|*                                                                           *|28|*     U.S. Government  End  Users.   This source code  is a "commercial     *|29|*     item,"  as that  term is  defined at  48 C.F.R. 2.101 (OCT 1995),     *|30|*     consisting  of "commercial  computer  software"  and  "commercial     *|31|*     computer  software  documentation,"  as such  terms  are  used in     *|32|*     48 C.F.R. 12.212 (SEPT 1995)  and is provided to the U.S. Govern-     *|33|*     ment only as  a commercial end item.   Consistent with  48 C.F.R.     *|34|*     12.212 and  48 C.F.R. 227.7202-1 through  227.7202-4 (JUNE 1995),     *|35|*     all U.S. Government End Users  acquire the source code  with only     *|36|*     those rights set forth herein.                                        *|37|*                                                                           *|38 \***************************************************************************/39 40/*41 * GPL Licensing Note - According to Mark Vojkovich, author of the Xorg/42 * XFree86 'nv' driver, this source code is provided under MIT-style licensing43 * where the source code is provided "as is" without warranty of any kind.44 * The only usage restriction is for the copyright notices to be retained45 * whenever code is used.46 *47 * Antonino Daplas <adaplas@pol.net> 2005-03-1148 */49 50#ifndef __NV_LOCAL_H__51#define __NV_LOCAL_H__52 53/*54 * This file includes any environment or machine specific values to access the55 * HW.  Put all affected includes, typdefs, etc. here so the riva_hw.* files56 * can stay generic in nature.57 */58 59/*60 * HW access macros.  These assume memory-mapped I/O, and not normal I/O space.61 */62#define NV_WR08(p,i,d)  (__raw_writeb((d), (void __iomem *)(p) + (i)))63#define NV_RD08(p,i)    (__raw_readb((void __iomem *)(p) + (i)))64#define NV_WR16(p,i,d)  (__raw_writew((d), (void __iomem *)(p) + (i)))65#define NV_RD16(p,i)    (__raw_readw((void __iomem *)(p) + (i)))66#define NV_WR32(p,i,d)  (__raw_writel((d), (void __iomem *)(p) + (i)))67#define NV_RD32(p,i)    (__raw_readl((void __iomem *)(p) + (i)))68 69/* VGA I/O is now always done through MMIO */70#define VGA_WR08(p,i,d) (writeb((d), (void __iomem *)(p) + (i)))71#define VGA_RD08(p,i)   (readb((void __iomem *)(p) + (i)))72 73#define NVDmaNext(par, data) \74     NV_WR32(&(par)->dmaBase[(par)->dmaCurrent++], 0, (data))75 76#define NVDmaStart(info, par, tag, size) {    \77     if((par)->dmaFree <= (size))             \78        NVDmaWait(info, size);                \79     NVDmaNext(par, ((size) << 18) | (tag));  \80     (par)->dmaFree -= ((size) + 1);          \81}82 83#if defined(__i386__)84#define _NV_FENCE() outb(0, 0x3D0);85#else86#define _NV_FENCE() mb();87#endif88 89#define WRITE_PUT(par, data) {                   \90  _NV_FENCE()                                    \91  NV_RD08((par)->FbStart, 0);                    \92  NV_WR32(&(par)->FIFO[0x0010], 0, (data) << 2); \93  mb();                                          \94}95 96#define READ_GET(par) (NV_RD32(&(par)->FIFO[0x0011], 0) >> 2)97 98#ifdef __LITTLE_ENDIAN99 100#include <linux/bitrev.h>101 102#define reverse_order(l)        \103do {                            \104	u8 *a = (u8 *)(l);      \105	a[0] = bitrev8(a[0]);   \106	a[1] = bitrev8(a[1]);   \107	a[2] = bitrev8(a[2]);   \108	a[3] = bitrev8(a[3]);   \109} while(0)110#else111#define reverse_order(l) do { } while(0)112#endif                          /* __LITTLE_ENDIAN */113 114#endif				/* __NV_LOCAL_H__ */115